Merge branch 'for-next' into master

Conflicts:
	arch/arm/configs/davinci_all_defconfig
	arch/arm/mach-davinci/Kconfig
	arch/arm/mach-davinci/Makefile
	arch/arm/mach-davinci/board-dm355-evm.c
	arch/arm/mach-davinci/board-dm355-leopard.c
	arch/arm/mach-davinci/board-dm644x-evm.c
	arch/arm/mach-davinci/board-dm646x-evm.c
	arch/arm/mach-davinci/board-sffsdr.c
	arch/arm/mach-davinci/clock.c
	arch/arm/mach-davinci/clock.h
	arch/arm/mach-davinci/common.c
	arch/arm/mach-davinci/devices.c
	arch/arm/mach-davinci/dm355.c
	arch/arm/mach-davinci/dm644x.c
	arch/arm/mach-davinci/dm646x.c
	arch/arm/mach-davinci/dma.c
	arch/arm/mach-davinci/gpio.c
	arch/arm/mach-davinci/include/mach/common.h
	arch/arm/mach-davinci/include/mach/dm646x.h
	arch/arm/mach-davinci/include/mach/edma.h
	arch/arm/mach-davinci/include/mach/emac.h
	arch/arm/mach-davinci/include/mach/gpio.h
	arch/arm/mach-davinci/include/mach/mux.h
	arch/arm/mach-davinci/include/mach/uncompress.h
	arch/arm/mach-davinci/irq.c
	arch/arm/mach-davinci/mux.c
	arch/arm/mach-davinci/psc.c
	arch/arm/mach-davinci/serial.c
	arch/arm/mach-davinci/sram.c
	arch/arm/mach-davinci/time.c
	sound/soc/davinci/davinci-evm.c

Makefile

@@ -16,6 +16,9 @@ NAME = Man-Eating Seals of Antiquity
 # o  print "Entering directory ...";
 MAKEFLAGS += -rR --no-print-directory
 
+# Add custom flags here to avoid conflict with updates
+EXTRAVERSION := $(EXTRAVERSION)-davinci1
+
 # We are using a recursive build, so we need to do a little thinking
 # to get the ordering right.
 #
@@ -171,6 +174,8 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
 				  -e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
 				  -e s/sh[234].*/sh/ )
 
+SUBARCH := arm
+
 # Cross compiling and selecting different set of gcc/bin-utils
 # ---------------------------------------------------------------------------
 #
@@ -191,7 +196,7 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
 # Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile
 export KBUILD_BUILDHOST := $(SUBARCH)
 ARCH		?= $(SUBARCH)
-CROSS_COMPILE	?=
+CROSS_COMPILE	?= arm-linux-
 
 # Architecture as present in compile.h
 UTS_MACHINE 	:= $(ARCH)

arch/arm/Makefile

@@ -139,6 +139,10 @@ endif
  machine-$(CONFIG_ARCH_H720X)	   := h720x
  machine-$(CONFIG_ARCH_AAEC2000)   := aaec2000
  machine-$(CONFIG_ARCH_REALVIEW)   := realview
+ machine-$(CONFIG_ARCH_AT91)       := at91rm9200
+ machine-$(CONFIG_ARCH_EP93XX)     := ep93xx
+ machine-$(CONFIG_ARCH_PNX4008)    := pnx4008
+ machine-$(CONFIG_ARCH_NETX)       := netx
  machine-$(CONFIG_ARCH_AT91)	   := at91
  machine-$(CONFIG_ARCH_EP93XX)	   := ep93xx
  machine-$(CONFIG_ARCH_PNX4008)	   := pnx4008

arch/arm/boot/compressed/Makefile

@@ -48,6 +48,10 @@ else
 endif
 endif
 
+ifeq ($(CONFIG_ARCH_DAVINCI),y)
+OBJS		+= head-davinci.o
+endif
+
 #
 # We now have a PIC decompressor implementation.  Decompressors running
 # from RAM should not define ZTEXTADDR.  Decompressors running directly

arch/arm/boot/compressed/head-davinci.S

+/*
+ * DaVinci (and relatives) specific tweaks.
+ * This is merged into head.S by the linker.
+ */
+
+#include <linux/linkage.h>
+#include <asm/mach-types.h>
+
+		.section        ".start", "ax"
+
+__davinci_start:
+		/* Save machine number for later conditional code */
+		adr	r0, davinci_machine_no
+		str	r7, [r0]
+
+		.globl	davinci_machine_no
+davinci_machine_no:
+		.word	0x00000000

arch/arm/configs/davinci_all_defconfig

@@ -487,7 +487,7 @@ CONFIG_MTD_CFI_I1=y
 CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I4 is not set
 # CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_INTELEXT=m
 CONFIG_MTD_CFI_AMDSTD=m
 # CONFIG_MTD_CFI_STAA is not set
 CONFIG_MTD_CFI_UTIL=m
@@ -735,10 +735,7 @@ CONFIG_INPUT=y
 #
 # Userland interfaces
 #
-CONFIG_INPUT_MOUSEDEV=m
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_JOYDEV is not set
 CONFIG_INPUT_EVDEV=m
 CONFIG_INPUT_EVBUG=m
@@ -746,33 +743,11 @@ CONFIG_INPUT_EVBUG=m
 #
 # Input Device Drivers
 #
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=m
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_LKKBD is not set
-CONFIG_KEYBOARD_XTKBD=m
-# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_KEYBOARD_STOWAWAY is not set
-CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
-# CONFIG_TOUCHSCREEN_AD7879 is not set
-# CONFIG_TOUCHSCREEN_FUJITSU is not set
-# CONFIG_TOUCHSCREEN_GUNZE is not set
-# CONFIG_TOUCHSCREEN_ELO is not set
-# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
-# CONFIG_TOUCHSCREEN_MTOUCH is not set
-# CONFIG_TOUCHSCREEN_INEXIO is not set
-# CONFIG_TOUCHSCREEN_MK712 is not set
-# CONFIG_TOUCHSCREEN_PENMOUNT is not set
-# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
-# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
-# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
-# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
-# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
 # CONFIG_INPUT_MISC is not set
 
 #
@@ -814,8 +789,7 @@ CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_IPMI_HANDLER is not set
-CONFIG_HW_RANDOM=m
-# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_HW_RANDOM is not set
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
@@ -875,7 +849,7 @@ CONFIG_GPIOLIB=y
 #
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
-CONFIG_GPIO_PCF857X=m
+CONFIG_GPIO_PCF857X=y
 
 #
 # PCI GPIO expanders:
@@ -994,44 +968,41 @@ CONFIG_SSB_POSSIBLE=y
 #
 # Multimedia core support
 #
-CONFIG_VIDEO_DEV=y
-CONFIG_VIDEO_V4L2_COMMON=y
-CONFIG_VIDEO_ALLOW_V4L1=y
-CONFIG_VIDEO_V4L1_COMPAT=y
+CONFIG_VIDEO_DEV=m
+CONFIG_VIDEO_V4L2_COMMON=m
+# CONFIG_VIDEO_ALLOW_V4L1 is not set
+# CONFIG_VIDEO_V4L1_COMPAT is not set
 # CONFIG_DVB_CORE is not set
-CONFIG_VIDEO_MEDIA=y
+CONFIG_VIDEO_MEDIA=m
 
 #
 # Multimedia drivers
 #
 # CONFIG_MEDIA_ATTACH is not set
-CONFIG_MEDIA_TUNER=y
+CONFIG_MEDIA_TUNER=m
 # CONFIG_MEDIA_TUNER_CUSTOMISE is not set
-CONFIG_MEDIA_TUNER_SIMPLE=y
-CONFIG_MEDIA_TUNER_TDA8290=y
-CONFIG_MEDIA_TUNER_TDA9887=y
-CONFIG_MEDIA_TUNER_TEA5761=y
-CONFIG_MEDIA_TUNER_TEA5767=y
-CONFIG_MEDIA_TUNER_MT20XX=y
-CONFIG_MEDIA_TUNER_XC2028=y
-CONFIG_MEDIA_TUNER_XC5000=y
-CONFIG_MEDIA_TUNER_MC44S803=y
-CONFIG_VIDEO_V4L2=y
-CONFIG_VIDEO_V4L1=y
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_MEDIA_TUNER_MC44S803=m
+CONFIG_VIDEO_V4L2=m
 CONFIG_VIDEO_CAPTURE_DRIVERS=y
 # CONFIG_VIDEO_ADV_DEBUG is not set
 # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
 CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
 # CONFIG_VIDEO_VIVI is not set
-# CONFIG_VIDEO_CPIA is not set
-# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_TVP5146 is not set
 # CONFIG_VIDEO_SAA5246A is not set
 # CONFIG_VIDEO_SAA5249 is not set
 # CONFIG_SOC_CAMERA is not set
 # CONFIG_V4L_USB_DRIVERS is not set
 # CONFIG_RADIO_ADAPTERS is not set
-CONFIG_DAB=y
-# CONFIG_USB_DABUSB is not set
+# CONFIG_DAB is not set
 
 #
 # Graphics support
@@ -1042,9 +1013,9 @@ CONFIG_FB=y
 CONFIG_FIRMWARE_EDID=y
 # CONFIG_FB_DDC is not set
 # CONFIG_FB_BOOT_VESA_SUPPORT is not set
-# CONFIG_FB_CFB_FILLRECT is not set
-# CONFIG_FB_CFB_COPYAREA is not set
-# CONFIG_FB_CFB_IMAGEBLIT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
 # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
 # CONFIG_FB_SYS_FILLRECT is not set
 # CONFIG_FB_SYS_COPYAREA is not set
@@ -1061,6 +1032,7 @@ CONFIG_FIRMWARE_EDID=y
 # Frame buffer hardware drivers
 #
 # CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_DAVINCI=y
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
 # CONFIG_FB_MB862XX is not set
@@ -1112,9 +1084,13 @@ CONFIG_SND_USB=y
 # CONFIG_SND_USB_AUDIO is not set
 # CONFIG_SND_USB_CAIAQ is not set
 CONFIG_SND_SOC=m
-# CONFIG_SND_DAVINCI_SOC is not set
+CONFIG_SND_DAVINCI_SOC=m
+CONFIG_SND_DAVINCI_SOC_I2S=m
+CONFIG_SND_DAVINCI_SOC_EVM=m
+# CONFIG_SND_DAVINCI_SOC_SFFSDR is not set
 CONFIG_SND_SOC_I2C_AND_SPI=m
 # CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_TLV320AIC3X=m
 # CONFIG_SOUND_PRIME is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=m
@@ -1328,7 +1304,7 @@ CONFIG_MMC_BLOCK=m
 # MMC/SD/SDIO Host Controller Drivers
 #
 # CONFIG_MMC_SDHCI is not set
-# CONFIG_MMC_DAVINCI is not set
+CONFIG_MMC_DAVINCI=m
 # CONFIG_MEMSTICK is not set
 # CONFIG_ACCESSIBILITY is not set
 CONFIG_NEW_LEDS=y
@@ -1373,6 +1349,7 @@ CONFIG_RTC_INTF_DEV=y
 #
 # I2C RTC drivers
 #
+# CONFIG_RTC_DRV_DAVINCI_EVM is not set
 # CONFIG_RTC_DRV_DS1307 is not set
 # CONFIG_RTC_DRV_DS1374 is not set
 # CONFIG_RTC_DRV_DS1672 is not set

arch/arm/mach-davinci/devices.c

@@ -62,7 +62,7 @@ void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
 
 #if	defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
 
-static u64 mmcsd0_dma_mask = DMA_32BIT_MASK;
+static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
 
 static struct resource mmcsd0_resources[] = {
 	{
@@ -95,13 +95,13 @@ static struct platform_device davinci_mmcsd0_device = {
 	.id = 0,
 	.dev = {
 		.dma_mask = &mmcsd0_dma_mask,
-		.coherent_dma_mask = DMA_32BIT_MASK,
+		.coherent_dma_mask = DMA_BIT_MASK(32),
 	},
 	.num_resources = ARRAY_SIZE(mmcsd0_resources),
 	.resource = mmcsd0_resources,
 };
 
-static u64 mmcsd1_dma_mask = DMA_32BIT_MASK;
+static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
 
 static struct resource mmcsd1_resources[] = {
 	{
@@ -132,7 +132,7 @@ static struct platform_device davinci_mmcsd1_device = {
 	.id = 1,
 	.dev = {
 		.dma_mask = &mmcsd1_dma_mask,
-		.coherent_dma_mask = DMA_32BIT_MASK,
+		.coherent_dma_mask = DMA_BIT_MASK(32),
 	},
 	.num_resources = ARRAY_SIZE(mmcsd1_resources),
 	.resource = mmcsd1_resources,

arch/arm/mach-davinci/include/mach/system.h

@@ -11,8 +11,7 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
+#include <asm/io.h>
 
 extern void davinci_watchdog_reset(void);
 

arch/arm/mach-davinci/include/mach/timex.h

@@ -12,6 +12,6 @@
 #define __ASM_ARCH_TIMEX_H
 
 /* The source frequency for the timers is the 27MHz clock */
-#define CLOCK_TICK_RATE 27000000
+#define CLOCK_TICK_RATE	        27000000
 
-#endif /* __ASM_ARCH_TIMEX_H__ */
+#endif				/* __ASM_ARCH_TIMEX_H__ */

drivers/i2c/busses/i2c-davinci.c

@@ -112,6 +112,7 @@ struct davinci_i2c_dev {
 	u8			*buf;
 	size_t			buf_len;
 	int			irq;
+	int			stop;
 	u8			terminate;
 	struct i2c_adapter	adapter;
 };
@@ -187,6 +188,11 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
 	davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKH_REG, clkh);
 	davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl);
 
+	/* Respond at reserved "SMBus Host" slave address" (and zero);
+	 * we seem to have no option to not respond...
+	 */
+	davinci_i2c_write_reg(dev, DAVINCI_I2C_OAR_REG, 0x08);
+
 	dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk);
 	dev_dbg(dev->dev, "PSC  = %d\n",
 		davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG));
@@ -244,9 +250,6 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
 	u16 w;
 	int r;
 
-	if (msg->len == 0)
-		return -EINVAL;
-
 	if (!pdata)
 		pdata = &davinci_i2c_platform_data_default;
 	/* Introduce a delay, required for some boards (e.g Davinci EVM) */
@@ -258,6 +261,7 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
 
 	dev->buf = msg->buf;
 	dev->buf_len = msg->len;
+	dev->stop = stop;
 
 	davinci_i2c_write_reg(dev, DAVINCI_I2C_CNT_REG, dev->buf_len);
 
@@ -275,6 +279,10 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
 		flag |= DAVINCI_I2C_MDR_TRX;
 	if (stop)
 		flag |= DAVINCI_I2C_MDR_STP;
+	if (msg->len == 0) {
+		flag |= DAVINCI_I2C_MDR_RM;
+		flag &= ~DAVINCI_I2C_MDR_STP;
+	}
 
 	/* Enable receive or transmit interrupts */
 	w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG);
@@ -285,6 +293,16 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
 	davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w);
 
 	dev->terminate = 0;
+
+	/* First byte should be set here, not after interrupt,
+	 * because transmit-data-ready interrupt can come before
+	 * NACK-interrupt during sending of previous message and
+	 * ICDXR may have wrong data */
+	if ((!(msg->flags & I2C_M_RD)) && dev->buf_len) {
+		davinci_i2c_write_reg(dev, DAVINCI_I2C_DXR_REG, *dev->buf++);
+		dev->buf_len--;
+	}
+
 	/* write the data into mode register */
 	davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
 
@@ -366,7 +384,7 @@ i2c_davinci_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
 
 static u32 i2c_davinci_func(struct i2c_adapter *adap)
 {
-	return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 }
 
 static void terminate_read(struct davinci_i2c_dev *dev)
@@ -387,7 +405,7 @@ static void terminate_write(struct davinci_i2c_dev *dev)
 	davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
 
 	if (!dev->terminate)
-		dev_err(dev->dev, "TDR IRQ while no data to send\n");
+		dev_dbg(dev->dev, "TDR IRQ while no data to send\n");
 }
 
 /*
@@ -425,6 +443,14 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
 		case DAVINCI_I2C_IVR_ARDY:
 			davinci_i2c_write_reg(dev,
 				DAVINCI_I2C_STR_REG, DAVINCI_I2C_STR_ARDY);
+			if (((dev->buf_len == 0) && (dev->stop != 0)) ||
+			    (dev->cmd_err & DAVINCI_I2C_STR_NACK)) {
+				w = davinci_i2c_read_reg(dev,
+							 DAVINCI_I2C_MDR_REG);
+				MOD_REG_BIT(w, DAVINCI_I2C_MDR_STP, 1);
+				davinci_i2c_write_reg(dev,
+						      DAVINCI_I2C_MDR_REG, w);
+			}
 			complete(&dev->cmd_complete);
 			break;
 
@@ -473,9 +499,14 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
 			break;
 
 		case DAVINCI_I2C_IVR_AAS:
-			dev_warn(dev->dev, "Address as slave interrupt\n");
-		}/* switch */
-	}/* while */
+			dev_dbg(dev->dev, "Address as slave interrupt\n");
+			break;
+
+		default:
+			dev_warn(dev->dev, "Unrecognized irq stat %d\n", stat);
+			break;
+		}
+	}
 
 	return count ? IRQ_HANDLED : IRQ_NONE;
 }
@@ -523,7 +554,7 @@ static int davinci_i2c_probe(struct platform_device *pdev)
 	dev->irq = irq->start;
 	platform_set_drvdata(pdev, dev);
 
-	dev->clk = clk_get(&pdev->dev, "I2CCLK");
+	dev->clk = clk_get(&pdev->dev, NULL);
 	if (IS_ERR(dev->clk)) {
 		r = -ENODEV;
 		goto err_free_mem;

drivers/i2c/busses/i2c-davinci.h

+/*
+ * linux/drivers/i2c/busses/davinci/i2c_davinci.h
+ *
+ * Copyright (C) 2006 Texas Instruments.
+ *
+ * ----------------------------------------------------------------------------
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * ----------------------------------------------------------------------------
+ Modifications:
+ ver. 1.0: Feb 2005, Vinod/Sudhakar
+ -
+ *
+ */
+
+#define DAVINCI_I2C_ICOAR_OADDR_MASK        (0x03FFu)
+#define DAVINCI_I2C_ICIMR_AAS_MASK          (0x0040u)
+#define DAVINCI_I2C_ICIMR_SCD_MASK          (0x0020u)
+#define DAVINCI_I2C_ICIMR_ICXRDY_MASK       (0x0010u)
+#define DAVINCI_I2C_ICIMR_ICRRDY_MASK       (0x0008u)
+#define DAVINCI_I2C_ICIMR_ARDY_MASK         (0x0004u)
+#define DAVINCI_I2C_ICIMR_NACK_MASK         (0x0002u)
+#define DAVINCI_I2C_ICIMR_AL_MASK           (0x0001u)
+#define DAVINCI_I2C_ICSTR_SDIR_MASK         (0x4000u)
+#define DAVINCI_I2C_ICSTR_NACKSNT_MASK      (0x2000u)
+#define DAVINCI_I2C_ICSTR_BB_MASK           (0x1000u)
+#define DAVINCI_I2C_ICSTR_RSFULL_MASK       (0x0800u)
+#define DAVINCI_I2C_ICSTR_XSMT_MASK         (0x0400u)
+#define DAVINCI_I2C_ICSTR_AAS_MASK          (0x0200u)
+#define DAVINCI_I2C_ICSTR_AD0_MASK          (0x0100u)
+#define DAVINCI_I2C_ICSTR_SCD_MASK          (0x0020u)
+#define DAVINCI_I2C_ICSTR_ICXRDY_MASK       (0x0010u)
+#define DAVINCI_I2C_ICSTR_ICRRDY_MASK       (0x0008u)
+#define DAVINCI_I2C_ICSTR_ARDY_MASK         (0x0004u)
+#define DAVINCI_I2C_ICSTR_NACK_MASK         (0x0002u)
+#define DAVINCI_I2C_ICSTR_AL_MASK           (0x0001u)
+#define DAVINCI_I2C_ICCLKL_ICCL_MASK        (0xFFFFu)
+#define DAVINCI_I2C_ICCLKH_ICCH_MASK        (0xFFFFu)
+#define DAVINCI_I2C_ICCNT_ICDC_MASK         (0xFFFFu)
+#define DAVINCI_I2C_ICDRR_D_MASK            (0x00FFu)
+#define DAVINCI_I2C_ICSAR_SADDR_MASK        (0x03FFu)
+#define DAVINCI_I2C_ICDXR_D_MASK            (0x00FFu)
+#define DAVINCI_I2C_ICMDR_NACKMOD_MASK      (0x8000u)
+#define DAVINCI_I2C_ICMDR_FREE_MASK         (0x4000u)
+#define DAVINCI_I2C_ICMDR_STT_MASK          (0x2000u)
+#define DAVINCI_I2C_ICMDR_STP_MASK          (0x0800u)
+#define DAVINCI_I2C_ICMDR_MST_MASK          (0x0400u)
+#define DAVINCI_I2C_ICMDR_TRX_MASK          (0x0200u)
+#define DAVINCI_I2C_ICMDR_XA_MASK           (0x0100u)
+#define DAVINCI_I2C_ICMDR_RM_MASK           (0x0080u)
+#define DAVINCI_I2C_ICMDR_DLB_MASK          (0x0040u)
+#define DAVINCI_I2C_ICMDR_IRS_MASK          (0x0020u)
+#define DAVINCI_I2C_ICMDR_STB_MASK          (0x0010u)
+#define DAVINCI_I2C_ICMDR_FDF_MASK          (0x0008u)
+#define DAVINCI_I2C_ICMDR_BC_MASK           (0x0007u)
+#define DAVINCI_I2C_ICIVR_TESTMD_MASK       (0x0F00u)
+#define DAVINCI_I2C_ICIVR_INTCODE_MASK      (0x0007u)
+
+#define DAVINCI_I2C_ICIVR_INTCODE_NONE      (0x0000u)
+#define DAVINCI_I2C_ICIVR_INTCODE_AL        (0x0001u)
+#define DAVINCI_I2C_ICIVR_INTCODE_NACK      (0x0002u)
+#define DAVINCI_I2C_ICIVR_INTCODE_RAR       (0x0003u)
+#define DAVINCI_I2C_ICIVR_INTCODE_RDR       (0x0004u)
+#define DAVINCI_I2C_ICIVR_INTCODE_TDR       (0x0005u)
+#define DAVINCI_I2C_ICIVR_INTCODE_SCD       (0x0006u)
+#define DAVINCI_I2C_ICIVR_INTCODE_AAS       (0x0007u)
+
+#define DAVINCI_I2C_ICEMDR_BCM_MASK         (0x0001u)
+#define DAVINCI_I2C_ICPSC_IPSC_MASK         (0x00FFu)
+#define DAVINCI_I2C_ICPID1_CLASS_MASK       (0xFF00u)
+#define DAVINCI_I2C_ICPID1_REVISION_MASK    (0x00FFu)
+#define DAVINCI_I2C_ICPID2_TYPE_MASK        (0x00FFu)
+#define DAVINCI_I2C_ICPFUNC_PFUNC_MASK      (0x00000001u)
+#define DAVINCI_I2C_ICPDIR_PDIR1_MASK       (0x00000002u)
+#define DAVINCI_I2C_ICPDIR_PDIR0_MASK       (0x00000001u)
+#define DAVINCI_I2C_ICPDIN_PDIN1_MASK       (0x00000002u)
+#define DAVINCI_I2C_ICPDIN_PDIN0_MASK       (0x00000001u)
+#define DAVINCI_I2C_ICPDOUT_PDOUT1_MASK     (0x00000002u)
+#define DAVINCI_I2C_ICPDOUT_PDOUT0_MASK     (0x00000001u)
+#define DAVINCI_I2C_ICPDSET_PDSET1_MASK     (0x00000002u)
+#define DAVINCI_I2C_ICPDSET_PDSET0_MASK     (0x00000001u)
+#define DAVINCI_I2C_ICPDCLR_PDCLR1_MASK     (0x00000002u)
+#define DAVINCI_I2C_ICPDCLR_PDCLR0_MASK     (0x00000001u)
+
+/**************************************************************************\
+* Register Overlay Structure
+\**************************************************************************/
+typedef struct {
+	u16 icoar;
+	u8 rsvd0[2];
+	u16 icimr;
+	u8 rsvd1[2];
+	u16 icstr;
+	u8 rsvd2[2];
+	u16 icclkl;
+	u8 rsvd3[2];
+	u16 icclkh;
+	u8 rsvd4[2];
+	u16 iccnt;
+	u8 rsvd5[2];
+	u16 icdrr;
+	u8 rsvd6[2];
+	u16 icsar;
+	u8 rsvd7[2];
+	u16 icdxr;
+	u8 rsvd8[2];
+	u16 icmdr;
+	u8 rsvd9[2];
+	u16 icivr;
+	u8 rsvd10[2];
+	u16 icemdr;
+	u8 rsvd11[2];
+	u16 icpsc;
+	u8 rsvd12[2];
+	u16 icpid1;
+	u8 rsvd13[2];
+	u16 icpid2;
+	u8 rsvd14[14];
+	u32 ipcfunc;
+	u32 icpdir;
+	u32 icpdin;
+	u32 icpdout;
+	u32 icpdset;
+	u32 icpdclr;
+} davinci_i2cregs;
+
+/**************************************************************************\
+* Overlay structure typedef definition
+\**************************************************************************/
+typedef volatile davinci_i2cregs *davinci_i2cregsovly;
+
+struct i2c_davinci_device {
+	int cmd_err;
+	struct completion cmd_complete;
+	wait_queue_head_t cmd_wait;
+	u8 *buf;
+	size_t buf_len;
+	davinci_i2cregsovly regs;
+
+	int irq;
+	struct i2c_adapter	adapter;
+	struct clk              *clk;
+	struct device           *dev;
+};

drivers/i2c/chips/Makefile

@@ -20,4 +20,3 @@ obj-$(CONFIG_SENSORS_TSL2550)	+= tsl2550.o
 ifeq ($(CONFIG_I2C_DEBUG_CHIP),y)
 EXTRA_CFLAGS += -DDEBUG
 endif
-

drivers/ide/palm_bk3710.c

@@ -317,7 +317,7 @@ static int __init palm_bk3710_probe(struct platform_device *pdev)
 	int i, rc;
 	hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
 
-	clk = clk_get(&pdev->dev, "IDECLK");
+	clk = clk_get(&pdev->dev, NULL);
 	if (IS_ERR(clk))
 		return -ENODEV;
 

drivers/input/keyboard/Kconfig

@@ -332,4 +332,12 @@ config KEYBOARD_SH_KEYSC
 
 	  To compile this driver as a module, choose M here: the
 	  module will be called sh_keysc.
+
+config KEYBOARD_DM355EVM
+	tristate "TI DaVinci DM355 EVM Keypad and IR Remote"
+	depends on MFD_DM355EVM_MSP
+	help
+	  Supports the pushbuttons and IR remote used with
+	  the DM355 EVM board.
+
 endif

drivers/input/keyboard/Makefile

@@ -28,3 +28,4 @@ obj-$(CONFIG_KEYBOARD_HP7XX)		+= jornada720_kbd.o
 obj-$(CONFIG_KEYBOARD_MAPLE)		+= maple_keyb.o
 obj-$(CONFIG_KEYBOARD_BFIN)		+= bf54x-keys.o
 obj-$(CONFIG_KEYBOARD_SH_KEYSC)		+= sh_keysc.o
+obj-$(CONFIG_KEYBOARD_DM355EVM)		+= dm355evm_keys.o

drivers/input/keyboard/dm355evm_keys.c

+/*
+ * dm355evm_keys.c - support buttons and IR remote on DM355 EVM board
+ *
+ * Copyright (c) 2008 by David Brownell
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/input.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+
+#include <linux/i2c/dm355evm_msp.h>
+
+
+/*
+ * The MSP430 firmware on the DM355 EVM monitors on-board pushbuttons
+ * and an IR receptor used for the remote control.  When any key is
+ * pressed, or its autorepeat kicks in, an event is sent.  This driver
+ * read those events from the small (32 event) queue and reports them.
+ *
+ * Because we communicate with the MSP430 using I2C, and all I2C calls
+ * in Linux sleep, we need to cons up a kind of threaded IRQ handler
+ * using a work_struct.  The IRQ is active low, but we use it through
+ * the GPIO controller so we can trigger on falling edges.
+ *
+ * Note that physically there can only be one of these devices.
+ *
+ * This driver was tested with firmware revision A4.
+ */
+struct dm355evm_keys {
+	struct work_struct	work;
+	struct input_dev	*input;
+	struct device		*dev;
+	int			irq;
+};
+
+static irqreturn_t dm355evm_keys_irq(int irq, void *_keys)
+{
+	struct dm355evm_keys	*keys = _keys;
+
+	schedule_work(&keys->work);
+	return IRQ_HANDLED;
+}
+
+/* These initial keycodes can be remapped by dm355evm_setkeycode(). */
+static struct {
+	u16	event;
+	u16	keycode;
+} dm355evm_keys[] = {
+
+	/*
+	 * Pushbuttons on the EVM board ... note that the labels for these
+	 * are SW10/SW11/etc on the PC board.  The left/right orientation
+	 * comes only from the firmware's documentation, and presumes the
+	 * power connector is immediately in front of you and the IR sensor
+	 * is to the right.  (That is, rotate the board counter-clockwise
+	 * by 90 degrees from the SW10/etc and "DM355 EVM" labels.)
+	 */
+	{ 0x00d8, KEY_OK, },		/* SW12 */
+	{ 0x00b8, KEY_UP, },		/* SW13 */
+	{ 0x00e8, KEY_DOWN, },		/* SW11 */
+	{ 0x0078, KEY_LEFT, },		/* SW14 */
+	{ 0x00f0, KEY_RIGHT, },		/* SW10 */
+
+	/*
+	 * IR buttons ... codes assigned to match the universal remote
+	 * provided with the EVM (Philips PM4S) using DVD code 0020.
+	 *
+	 * These event codes match firmware documentation, but other
+	 * remote controls could easily send more RC5-encoded events.
+	 * The PM4S manual was used in several cases to help select
+	 * a keycode reflecting the intended usage.
+	 *
+	 * RC5 codes are 14 bits, with two start bits (0x3 prefix)
+	 * and a toggle bit (masked out below).
+	 */
+	{ 0x300c, KEY_POWER, },		/* NOTE: docs omit this */
+	{ 0x3000, KEY_NUMERIC_0, },
+	{ 0x3001, KEY_NUMERIC_1, },
+	{ 0x3002, KEY_NUMERIC_2, },
+	{ 0x3003, KEY_NUMERIC_3, },
+	{ 0x3004, KEY_NUMERIC_4, },
+	{ 0x3005, KEY_NUMERIC_5, },
+	{ 0x3006, KEY_NUMERIC_6, },
+	{ 0x3007, KEY_NUMERIC_7, },
+	{ 0x3008, KEY_NUMERIC_8, },
+	{ 0x3009, KEY_NUMERIC_9, },
+	{ 0x3022, KEY_ENTER, },
+	{ 0x30ec, KEY_MODE, },		/* "tv/vcr/..." */
+	{ 0x300f, KEY_SELECT, },	/* "info" */
+	{ 0x3020, KEY_CHANNELUP, },	/* "up" */
+	{ 0x302e, KEY_MENU, },		/* "in/out" */
+	{ 0x3011, KEY_VOLUMEDOWN, },	/* "left" */
+	{ 0x300d, KEY_MUTE, },		/* "ok" */
+	{ 0x3010, KEY_VOLUMEUP, },	/* "right" */
+	{ 0x301e, KEY_SUBTITLE, },	/* "cc" */
+	{ 0x3021, KEY_CHANNELDOWN, },	/* "down" */
+	{ 0x3022, KEY_PREVIOUS, },
+	{ 0x3026, KEY_SLEEP, },
+	{ 0x3172, KEY_REWIND, },	/* NOTE: docs wrongly say 0x30ca */
+	{ 0x3175, KEY_PLAY, },
+	{ 0x3174, KEY_FASTFORWARD, },
+	{ 0x3177, KEY_RECORD, },
+	{ 0x3176, KEY_STOP, },
+	{ 0x3169, KEY_PAUSE, },
+};
+
+static void dm355evm_keys_work(struct work_struct *work)
+{
+	struct dm355evm_keys	*keys;
+	int			status;
+
+	keys = container_of(work, struct dm355evm_keys, work);
+
+	/* For simplicity we ignore INPUT_COUNT and just read
+	 * events until we get the "queue empty" indicator.
+	 * Reading INPUT_LOW decrements the count.
+	 */
+	for (;;) {
+		static u16	last_event;
+
+		u16		event;
+		int		keycode;
+		int		i;
+
+		status = dm355evm_msp_read(DM355EVM_MSP_INPUT_HIGH);
+		if (status < 0) {
+			dev_dbg(keys->dev, "input high err %d\n",
+					status);
+			break;
+		}
+		event = status << 8;
+
+		status = dm355evm_msp_read(DM355EVM_MSP_INPUT_LOW);
+		if (status < 0) {
+			dev_dbg(keys->dev, "input low err %d\n",
+					status);
+			break;
+		}
+		event |= status;
+		if (event == 0xdead)
+			break;
+
+		/* Press and release a button:  two events, same code.
+		 * Press and hold (autorepeat), then release: N events
+		 * (N > 2), same code.  For RC5 buttons the toggle bits
+		 * distinguish (for example) "1-autorepeat" from "1 1";
+		 * but PCB buttons don't support that bit.
+		 *
+		 * So we must synthesize release events.  We do that by
+		 * mapping events to a press/release event pair; then
+		 * to avoid adding extra events, skip the second event
+		 * of each pair.
+		 */
+		if (event == last_event) {
+			last_event = 0;
+			continue;
+		}
+		last_event = event;
+
+		/* ignore the RC5 toggle bit */
+		event &= ~0x0800;
+
+		/* find the key, or leave it as unknown */
+		keycode = KEY_UNKNOWN;
+		for (i = 0; i < ARRAY_SIZE(dm355evm_keys); i++) {
+			if (dm355evm_keys[i].event != event)
+				continue;
+			keycode = dm355evm_keys[i].keycode;
+			break;
+		}
+		dev_dbg(keys->dev,
+			"input event 0x%04x--> keycode %d\n",
+			event, keycode);
+
+		/* report press + release */
+		input_report_key(keys->input, keycode, 1);
+		input_sync(keys->input);
+		input_report_key(keys->input, keycode, 0);
+		input_sync(keys->input);
+	}
+}
+
+static int dm355evm_setkeycode(struct input_dev *dev, int index, int keycode)
+{
+	u16		old_keycode;
+	unsigned	i;
+
+	if (((unsigned)index) >= ARRAY_SIZE(dm355evm_keys))
+		return -EINVAL;
+
+	old_keycode = dm355evm_keys[index].keycode;
+	dm355evm_keys[index].keycode = keycode;
+	set_bit(keycode, dev->keybit);
+
+	for (i = 0; i < ARRAY_SIZE(dm355evm_keys); i++) {
+		if (dm355evm_keys[index].keycode == old_keycode)
+			goto done;
+	}
+	clear_bit(old_keycode, dev->keybit);
+done:
+	return 0;
+}
+
+static int dm355evm_getkeycode(struct input_dev *dev, int index, int *keycode)
+{
+	if (((unsigned)index) >= ARRAY_SIZE(dm355evm_keys))
+		return -EINVAL;
+
+	return dm355evm_keys[index].keycode;
+}
+
+/*----------------------------------------------------------------------*/
+
+static int __devinit dm355evm_keys_probe(struct platform_device *pdev)
+{
+	struct dm355evm_keys	*keys;
+	int			status = -ENOMEM;
+	struct input_dev	*input;
+	int			i;
+
+	/* allocate instance struct */
+	keys = kzalloc(sizeof *keys, GFP_KERNEL);
+	if (!keys)
+		goto fail0;
+	platform_set_drvdata(pdev, keys);
+	keys->dev = &pdev->dev;
+
+	/* ... and input dev ... */
+	input = input_allocate_device();
+	if (!input)
+		goto fail0;
+	keys->input = input;
+	input_set_drvdata(input, keys);
+
+	input->name = "DM355 EVM Controls";
+	input->phys = "dm355evm/input0";
+	input->dev.parent = &pdev->dev;
+
+	input->id.bustype = BUS_I2C;
+	input->id.product = 0x0355;
+	input->id.version = dm355evm_msp_read(DM355EVM_MSP_FIRMREV);
+
+	input->evbit[0] = BIT(EV_KEY);
+	for (i = 0; i < ARRAY_SIZE(dm355evm_keys); i++)
+		set_bit(dm355evm_keys[i].keycode, input->keybit);
+
+	input->keycode = dm355evm_keys;
+	input->setkeycode = dm355evm_setkeycode;
+	input->getkeycode = dm355evm_getkeycode;
+
+	/* set up "threaded IRQ handler" */
+	status = platform_get_irq(pdev, 0);
+	if (status < 0)
+		goto fail1;
+	keys->irq = status;
+	INIT_WORK(&keys->work, dm355evm_keys_work);
+
+	/* REVISIT:  flush the event queue? */
+
+	/* register */
+	status = input_register_device(input);
+	if (status < 0)
+		goto fail0;
+
+	/* start reporting events */
+	status = request_irq(keys->irq, dm355evm_keys_irq,
+			IRQF_TRIGGER_FALLING,
+			dev_name(&pdev->dev), keys);
+	if (status < 0) {
+		input_unregister_device(input);
+		goto fail1;
+	}
+
+	return 0;
+
+fail1:
+	input_free_device(input);
+fail0:
+	kfree(keys);
+	dev_err(&pdev->dev, "can't register, err %d\n", status);
+
+	return status;
+}
+
+static int __devexit dm355evm_keys_remove(struct platform_device *pdev)
+{
+	struct dm355evm_keys	*keys = platform_get_drvdata(pdev);
+
+	free_irq(keys->irq, keys);
+	input_unregister_device(keys->input);
+	kfree(keys);
+
+	return 0;
+}
+
+/* REVISIT:  add suspend/resume when DaVinci supports it.  The IRQ should
+ * be able to wake up the system.  When device_may_wakeup(&pdev->dev), call
+ * enable_irq_wake() on suspend, and disable_irq_wake() on resume.
+ */
+
+/*
+ * I2C is used to talk to the MSP430, but this platform device is
+ * exposed by an MFD driver that manages I2C communications.
+ */
+static struct platform_driver dm355evm_keys_driver = {
+	.probe		= dm355evm_keys_probe,
+	.remove		= __devexit_p(dm355evm_keys_remove),
+	.driver		= {
+		.owner	= THIS_MODULE,
+		.name	= "dm355evm_keys",
+	},
+};
+
+static int __init dm355evm_keys_init(void)
+{
+	return platform_driver_register(&dm355evm_keys_driver);
+}
+module_init(dm355evm_keys_init);
+
+static void __exit dm355evm_keys_exit(void)
+{
+	platform_driver_unregister(&dm355evm_keys_driver);
+}
+module_exit(dm355evm_keys_exit);
+
+MODULE_LICENSE("GPL");

drivers/media/video/Kconfig

@@ -479,6 +479,26 @@ config VIDEO_VIVI
 	  Say Y here if you want to test video apps or debug V4L devices.
 	  In doubt, say N.
 
+config VIDEO_TVP5146
+	tristate "TVP5146 video decoder"
+	depends on I2C && ARCH_DAVINCI
+	help
+	  Support for I2C bus based TVP5146 configuration.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called tvp5146.
+
+config VIDEO_DAVINCI
+	tristate "Davinci Video Capture"
+	depends on VIDEO_DEV && VIDEO_TVP5146 && ARCH_DAVINCI
+	select VIDEOBUF_GEN
+	select VIDEOBUF_DMA_SG
+	help
+	  Support for Davinci based frame grabber through CCDC.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called vpfe.
+
 source "drivers/media/video/bt8xx/Kconfig"
 
 config VIDEO_PMS

drivers/media/video/Makefile

@@ -10,6 +10,8 @@ stkwebcam-objs	:=	stk-webcam.o stk-sensor.o
 
 omap2cam-objs	:=	omap24xxcam.o omap24xxcam-dma.o
 
+davinci-vpfe-objs   :=  ccdc_davinci.o davinci_vpfe.o
+
 videodev-objs	:=	v4l2-dev.o v4l2-ioctl.o v4l2-device.o
 
 obj-$(CONFIG_VIDEO_DEV) += videodev.o v4l2-int-device.o
@@ -131,6 +133,9 @@ obj-$(CONFIG_USB_S2255)		+= s2255drv.o
 obj-$(CONFIG_VIDEO_IVTV) += ivtv/
 obj-$(CONFIG_VIDEO_CX18) += cx18/
 
+obj-$(CONFIG_VIDEO_DAVINCI)     += davinci-vpfe.o
+obj-$(CONFIG_VIDEO_TVP5146)     += tvp5146.o
+
 obj-$(CONFIG_VIDEO_VIVI) += vivi.o
 obj-$(CONFIG_VIDEO_CX23885) += cx23885/
 

drivers/media/video/ccdc_davinci.c

+/*
+ *
+ *
+ * Copyright (C) 2006 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+/* ccdc_davinci.c */
+
+#include <media/ccdc_davinci.h>
+#define debug_print(x...)	//printk(x)
+void ccdc_reset()
+{
+	int i;
+	/* disable CCDC */
+	ccdc_enable(0);
+	/* set all registers to default value */
+	for (i = 0; i <= 0x94; i += 4) {
+		regw(0, i);
+	}
+	regw(0, PCR);
+	regw(0, SYN_MODE);
+	regw(0, HD_VD_WID);
+	regw(0, PIX_LINES);
+	regw(0, HORZ_INFO);
+	regw(0, VERT_START);
+	regw(0, VERT_LINES);
+	regw(0xffff00ff, CULLING);
+	regw(0, HSIZE_OFF);
+	regw(0, SDOFST);
+	regw(0, SDR_ADDR);
+	regw(0, VDINT);
+	regw(0, REC656IF);
+	regw(0, CCDCFG);
+	regw(0, FMTCFG);
+	regw(0, VP_OUT);
+}
+
+void ccdc_setwin(ccdc_params_ycbcr * params)
+{
+	int horz_start, horz_nr_pixels;
+	int vert_start, vert_nr_lines;
+
+	/* configure horizonal and vertical starts and sizes */
+	horz_start = params->win.left << 1;
+	horz_nr_pixels = (params->win.width <<1) - 1;
+	regw((horz_start << 16) | horz_nr_pixels, HORZ_INFO);
+
+	vert_start = params->win.top;
+
+	if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) {
+		vert_nr_lines = (params->win.height >> 1) - 1;
+		vert_start >>= 1;
+	} else {
+		vert_nr_lines = params->win.height - 1;
+	}
+	regw((vert_start << 16) | vert_start, VERT_START);
+	regw(vert_nr_lines, VERT_LINES);
+}
+
+void ccdc_config_ycbcr(ccdc_params_ycbcr * params)
+{
+	u32 syn_mode;
+
+	/* first reset the CCDC                                          */
+	/* all registers have default values after reset                 */
+	/* This is important since we assume default values to be set in */
+	/* a lot of registers that we didn't touch                       */
+	ccdc_reset();
+
+	/* configure pixel format */
+	syn_mode = (params->pix_fmt & 0x3) << 12;
+
+	/* configure video frame format */
+	syn_mode |= (params->frm_fmt & 0x1) << 7;
+
+	/* setup BT.656 sync mode */
+	if (params->bt656_enable) {
+		regw(3, REC656IF);
+
+		/* configure the FID, VD, HD pin polarity */
+		/* fld,hd pol positive, vd negative, 8-bit pack mode */
+		syn_mode |= 0x00000F04;
+	} else {/* y/c external sync mode */
+		syn_mode |= ((params->fid_pol & 0x1) << 4);
+		syn_mode |= ((params->hd_pol & 0x1) << 3);
+		syn_mode |= ((params->vd_pol & 0x1) << 2);
+	}
+
+	/* configure video window */
+	ccdc_setwin(params);
+
+	/* configure the order of y cb cr in SD-RAM */
+	regw((params->pix_order << 11) | 0x8000, CCDCFG);
+
+	/* configure the horizontal line offset */
+	/* this is done by rounding up width to a multiple of 16 pixels */
+	/* and multiply by two to account for y:cb:cr 4:2:2 data */
+	regw(((params->win.width * 2) + 31) & 0xffffffe0, HSIZE_OFF);
+
+	/* configure the memory line offset */
+	if (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED) {
+		/* two fields are interleaved in memory */
+		regw(0x00000249, SDOFST);
+	}
+	/* enable output to SDRAM */
+	syn_mode |= (0x1 << 17);
+	/* enable internal timing generator */
+	syn_mode |= (0x1 << 16);
+
+	regw(syn_mode, SYN_MODE);
+}

drivers/misc/sti/sdti.c

+/*
+ * Support functions for OMAP3 SDTI (Serial Debug Tracing Interface)
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ * Written by: Roman Tereshonkov <roman.tereshonkov@nokia.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/spinlock.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <mach/sti.h>
+#include <asm/byteorder.h>
+#include <asm/io.h>
+
+#define SDTI_REVISION		0x000
+#define SDTI_SYSCONFIG		0x010
+#define SDTI_SYSSTATUS		0x014
+#define SDTI_WINCTRL		0x024
+#define SDTI_SCONFIG		0x028
+#define SDTI_TESTCTRL		0x02C
+#define SDTI_LOCK_ACCESS	0xFB0
+
+#define CPU1_TRACE_EN		0x01
+#define CPU2_TRACE_EN		0x02
+
+#define SDTI_SYSCONFIG_SOFTRESET	(1 << 1)
+#define SDTI_SYSCONFIG_AUTOIDLE		(1 << 0)
+
+static struct clk *sdti_ck;
+void __iomem *sti_base, *sti_channel_base;
+static DEFINE_SPINLOCK(sdti_lock);
+
+void sti_channel_write_trace(int len, int id, void *data,
+				unsigned int channel)
+{
+	const u8 *tpntr = data;
+
+	spin_lock_irq(&sdti_lock);
+
+	sti_channel_writeb(id, channel);
+	while (len--)
+		sti_channel_writeb(*tpntr++, channel);
+	sti_channel_flush(channel);
+
+	spin_unlock_irq(&sdti_lock);
+}
+EXPORT_SYMBOL(sti_channel_write_trace);
+
+static void omap_sdti_reset(void)
+{
+	int i;
+
+	sti_writel(SDTI_SYSCONFIG_SOFTRESET, SDTI_SYSCONFIG);
+
+	for (i = 0; i < 10000; i++)
+		if (sti_readl(SDTI_SYSSTATUS) & 1)
+			break;
+	if (i == 10000)
+		printk(KERN_WARNING "XTI: no real reset\n");
+}
+
+static int __init omap_sdti_init(void)
+{
+	char buf[64];
+	int i;
+
+	sdti_ck = clk_get(NULL, "emu_per_alwon_ck");
+	if (IS_ERR(sdti_ck)) {
+		printk(KERN_ERR "Cannot get clk emu_per_alwon_ck\n");
+		return PTR_ERR(sdti_ck);
+	}
+	clk_enable(sdti_ck);
+
+	omap_sdti_reset();
+	sti_writel(0xC5ACCE55, SDTI_LOCK_ACCESS);
+
+	/* Autoidle */
+	sti_writel(SDTI_SYSCONFIG_AUTOIDLE, SDTI_SYSCONFIG);
+
+	/* Claim SDTI */
+	sti_writel(1 << 30, SDTI_WINCTRL);
+	i = sti_readl(SDTI_WINCTRL);
+	if (!(i & (1 << 30)))
+		printk(KERN_WARNING "SDTI: cannot claim SDTI\n");
+
+	/* 4 bits dual, fclk/3 */
+	sti_writel(0x43, SDTI_SCONFIG);
+
+	/* CPU2 trace enable */
+	sti_writel(i | CPU2_TRACE_EN, SDTI_WINCTRL);
+	i = sti_readl(SDTI_WINCTRL);
+
+	/* Enable SDTI */
+	sti_writel((1 << 31) | (i & 0x3FFFFFFF), SDTI_WINCTRL);
+
+	i = sti_readl(SDTI_REVISION);
+	snprintf(buf, sizeof(buf), "OMAP SDTI support loaded (HW v%u.%u)\n",
+		(i >> 4) & 0x0f, i & 0x0f);
+	printk(KERN_INFO "%s", buf);
+	sti_channel_write_trace(strlen(buf), 0xc3, buf, 239);
+
+	return 0;
+}
+
+static void omap_sdti_exit(void)
+{
+	sti_writel(0, SDTI_WINCTRL);
+	clk_disable(sdti_ck);
+	clk_put(sdti_ck);
+}
+
+static int __devinit omap_sdti_probe(struct platform_device *pdev)
+{
+	struct resource *res, *cres;
+	unsigned int size;
+
+	if (pdev->num_resources != 2) {
+		dev_err(&pdev->dev, "invalid number of resources: %d\n",
+			pdev->num_resources);
+		return -ENODEV;
+	}
+
+	/* SDTI base */
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (unlikely(!res)) {
+		dev_err(&pdev->dev, "invalid mem resource\n");
+		return -ENODEV;
+	}
+
+	/* Channel base */
+	cres = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+	if (unlikely(!cres)) {
+		dev_err(&pdev->dev, "invalid channel mem resource\n");
+		return -ENODEV;
+	}
+
+	size = res->end - res->start;
+	sti_base = ioremap(res->start, size);
+	if (unlikely(!sti_base))
+		return -ENODEV;
+
+	size = cres->end - cres->start;
+	sti_channel_base = ioremap(cres->start, size);
+	if (unlikely(!sti_channel_base)) {
+		iounmap(sti_base);
+		return -ENODEV;
+	}
+
+	return omap_sdti_init();
+}
+
+static int __devexit omap_sdti_remove(struct platform_device *pdev)
+{
+	iounmap(sti_channel_base);
+	iounmap(sti_base);
+	omap_sdti_exit();
+
+	return 0;
+}
+
+static struct platform_driver omap_sdti_driver = {
+	.probe		= omap_sdti_probe,
+	.remove		= __devexit_p(omap_sdti_remove),
+	.driver		= {
+		.name	= "sti",
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init omap_sdti_module_init(void)
+{
+	return platform_driver_register(&omap_sdti_driver);
+}
+
+static void __exit omap_sdti_module_exit(void)
+{
+	platform_driver_unregister(&omap_sdti_driver);
+}
+subsys_initcall(omap_sdti_module_init);
+module_exit(omap_sdti_module_exit);
+
+MODULE_AUTHOR("Roman Tereshonkov");
+MODULE_LICENSE("GPL");

drivers/mmc/host/Kconfig

@@ -200,6 +200,14 @@ config MMC_MVSDIO
 	  To compile this driver as a module, choose M here: the
 	  module will be called mvsdio.
 
+config MMC_DAVINCI
+	tristate "TI DAVINCI Multimedia Card Interface support"
+	depends on MMC
+	help
+	  This selects the TI DAVINCI Multimedia card Interface.
+	  If you have an DAVINCI board with a Multimedia Card slot,
+	  say Y or M here.  If unsure, say N.
+
 config MMC_SPI
 	tristate "MMC/SD/SDIO over SPI"
 	depends on SPI_MASTER && !HIGHMEM && HAS_DMA

drivers/mmc/host/Makefile

@@ -22,6 +22,7 @@ obj-$(CONFIG_MMC_AT91)		+= at91_mci.o
 obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o
 obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
 obj-$(CONFIG_MMC_MVSDIO)	+= mvsdio.o
+obj-$(CONFIG_MMC_DAVINCI) 	+= davinci_mmc.o
 obj-$(CONFIG_MMC_SPI)		+= mmc_spi.o
 ifeq ($(CONFIG_OF),y)
 obj-$(CONFIG_MMC_SPI)		+= of_mmc_spi.o

drivers/mtd/nand/davinci_nand.c

@@ -407,16 +407,17 @@ static int __init nand_davinci_probe(struct platform_device *pdev)
 	}
 	info->chip.ecc.mode = ecc_mode;
 
-	info->clk = clk_get(&pdev->dev, "AEMIFCLK");
+	info->clk = clk_get(&pdev->dev, "aemif");
 	if (IS_ERR(info->clk)) {
 		ret = PTR_ERR(info->clk);
-		dev_dbg(&pdev->dev, "unable to get AEMIFCLK, err %d\n", ret);
+		dev_dbg(&pdev->dev, "unable to get AEMIF clock, err %d\n", ret);
 		goto err_clk;
 	}
 
 	ret = clk_enable(info->clk);
 	if (ret < 0) {
-		dev_dbg(&pdev->dev, "unable to enable AEMIFCLK, err %d\n", ret);
+		dev_dbg(&pdev->dev, "unable to enable AEMIF clock, err %d\n",
+			ret);
 		goto err_clk_enable;
 	}
 

drivers/mtd/nand/nand_base.c

@@ -2671,6 +2671,13 @@ int nand_scan_tail(struct mtd_info *mtd)
 	 */
 
 	switch (chip->ecc.mode) {
+#ifdef CONFIG_NAND_FLASH_HW_ECC
+	case NAND_ECC_HW12_2048:
+	case NAND_ECC_HW8_512:
+	case NAND_ECC_HW6_512:
+	case NAND_ECC_HW3_512:
+	case NAND_ECC_HW3_256:
+#endif
 	case NAND_ECC_HW:
 		/* Use standard hwecc read page function ? */
 		if (!chip->ecc.read_page)

drivers/net/Kconfig

@@ -917,6 +917,16 @@ config SMC91X
 	  The module will be called smc91x.  If you want to compile it as a
 	  module, say M here and read <file:Documentation/kbuild/modules.txt>.
 
+config TI_DAVINCI_EMAC
+	tristate "TI DaVinci EMAC Support"
+	depends on ARM && ARCH_DAVINCI
+	select PHYLIB
+	help
+	  This driver supports TI's DaVinci Ethernet .
+
+	  To compile this driver as a module, choose M here: the module
+	  will be called ti_davinci_emac.  This is recommended.
+
 config NET_NETX
 	tristate "NetX Ethernet support"
 	select MII

drivers/net/Makefile

@@ -2,6 +2,9 @@
 # Makefile for the Linux network (ethercard) device drivers.
 #
 
+davinci_emac_driver-objs := davinci_emac.o
+obj-$(CONFIG_TI_DAVINCI_EMAC) += davinci_emac_driver.o
+
 obj-$(CONFIG_E1000) += e1000/
 obj-$(CONFIG_E1000E) += e1000e/
 obj-$(CONFIG_IBM_NEW_EMAC) += ibm_newemac/

drivers/rtc/Kconfig

@@ -128,6 +128,15 @@ comment "I2C RTC drivers"
 
 if I2C
 
+config RTC_DRV_DAVINCI_EVM
+	tristate "TI DaVinci EVM RTC"
+	depends on RTC_CLASS && I2C_DAVINCI && MACH_DAVINCI_EVM
+	help
+	  Supports the RTC firmware in the MSP430 on the DaVinci EVM.
+
+	  This driver can also be built as a module. If so, the module
+	  will be called rtc-davinci-evm.
+
 config RTC_DRV_DS1307
 	tristate "Dallas/Maxim DS1307/37/38/39/40, ST M41T00, EPSON RX-8025"
 	help

drivers/rtc/Makefile

@@ -23,6 +23,7 @@ obj-$(CONFIG_RTC_DRV_AT91SAM9)	+= rtc-at91sam9.o
 obj-$(CONFIG_RTC_DRV_AU1XXX)	+= rtc-au1xxx.o
 obj-$(CONFIG_RTC_DRV_BFIN)	+= rtc-bfin.o
 obj-$(CONFIG_RTC_DRV_CMOS)	+= rtc-cmos.o
+obj-$(CONFIG_RTC_DRV_DAVINCI_EVM) += rtc-davinci-evm.o
 obj-$(CONFIG_RTC_DRV_DM355EVM)	+= rtc-dm355evm.o
 obj-$(CONFIG_RTC_DRV_DS1216)	+= rtc-ds1216.o
 obj-$(CONFIG_RTC_DRV_DS1286)	+= rtc-ds1286.o

drivers/rtc/rtc-davinci-evm.c

+/*
+ * rtc-davinci-evm.c
+ *
+ * Copyright (C) 2004 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/module.h>
+#include <linux/proc_fs.h>
+#include <linux/ctype.h>
+#include <linux/delay.h>
+#include <linux/rtc.h>
+#include <linux/bcd.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
+#include <mach/i2c-client.h>
+
+
+/* REVISIT
+ *  - the firmware expects no I2C writes at all, not just no RTC-via-I2C
+ *    writes, for 100 usec after i2c read or write... that can't be
+ *    assured here.
+ *
+ *  - this am vs pm thing is bizarre ... firmware should just do a 24 hour
+ *    clock, rather than 12 hour with hidden am/pm (we must guess).
+ *    similarly with it trying to handle DST for us...
+ *
+ *  - better (and simpler!!) firmware would support an RTC alarm, and just
+ *    count seconds since some UTC instant, letting Linux handle calendar
+ *    issues (leapyear, day of week, etc) and DST.
+ */
+static unsigned char am;
+
+
+static int evm_read_time(struct device *dev, struct rtc_time *tm)
+{
+	char rtcdata [9];
+
+	rtcdata[0] = 2;
+	rtcdata[1] = 1;
+	davinci_i2c_write(2, rtcdata, 0x23);
+
+	msleep(1);
+	davinci_i2c_read(9, rtcdata, 0x23);
+	msleep(1);
+
+	/* FIXME the RTC reports 12-hour time, without an AM/PM indicator,
+	 * but Linux requires that we report 24 hour time...
+	 */
+
+	tm->tm_year = BCD_TO_BIN(rtcdata[3]) * 100
+			+ BCD_TO_BIN(rtcdata[2])
+			- 1900;
+	tm->tm_mon = BCD_TO_BIN(rtcdata[4]);
+	tm->tm_mday = BCD_TO_BIN(rtcdata[5]);
+	tm->tm_hour = BCD_TO_BIN(rtcdata[6]);
+	tm->tm_min = BCD_TO_BIN(rtcdata[7]);
+	tm->tm_sec = BCD_TO_BIN(rtcdata[8]);
+
+	return 0;
+}
+
+static void am_or_pm(struct device *dev)
+{
+	char rtcdata [9];
+	struct rtc_time tm, time, temp;
+	unsigned char mon, day, hrs, min, sec;
+	unsigned char yr_low, yr_high;
+	unsigned int yrs;
+
+	evm_read_time(dev, &tm);
+
+	temp = tm;
+
+	yrs = temp.tm_year + 1900;
+	yr_high = yrs / 100;
+	yr_low = yrs % 100;
+
+	mon = temp.tm_mon + 1;
+	day = temp.tm_mday;
+	min = 59;
+	sec = 59;
+	hrs = 11;
+
+	rtcdata [0] = 9;
+	rtcdata [1] = 0;
+	rtcdata [2] = BIN_TO_BCD(yr_low);
+	rtcdata [3] = BIN_TO_BCD(yr_high);
+	mon--;
+	rtcdata [4] = BIN_TO_BCD(mon);
+	rtcdata [5] = BIN_TO_BCD(day);
+	rtcdata [6] = BIN_TO_BCD(hrs);
+	rtcdata [7] = BIN_TO_BCD(min);
+	rtcdata [8] = BIN_TO_BCD(sec);
+	davinci_i2c_write(9, rtcdata, 0x23);
+	msleep(1);
+	msleep(1000);
+	evm_read_time(dev, &time);
+
+	if (time.tm_mday == temp.tm_mday)
+		am = 1;
+	else
+		am = 0;
+
+	davinci_i2c_write(9, rtcdata, 0x23);
+	msleep(1);
+	msleep(1000);
+
+	yrs = tm.tm_year + 1900;
+	yr_high = yrs / 100;
+	yr_low = yrs % 100;
+
+	mon = tm.tm_mon + 1;
+	day = tm.tm_mday;
+	min = tm.tm_min;
+	hrs = tm.tm_hour;
+
+	if (tm.tm_sec < 58)
+		sec = tm.tm_sec + 2;
+	else
+		sec = 59;
+
+	davinci_i2c_write(9, rtcdata, 0x23);
+	msleep(1);
+}
+
+static int evm_set_time(struct device *dev, struct rtc_time *tm)
+{
+	char rtcdata [9];
+	char ampmdata [9];
+	unsigned char mon, day, hrs = 0, min, sec, leap_yr;
+	unsigned char yr_low, yr_high;
+	unsigned int yrs;
+
+	am_or_pm(dev);
+
+	yrs = tm->tm_year + 1900;
+	yr_high = yrs / 100;
+	yr_low = yrs % 100;
+
+	mon = tm->tm_mon;
+	hrs = tm->tm_hour;
+	day = tm->tm_mday;
+	min = tm->tm_min;
+	sec = tm->tm_sec;
+
+        leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));
+
+	if (am == 1 && tm->tm_hour <= 12) {
+		hrs = tm->tm_hour;
+		if (tm->tm_hour == 0)
+			hrs = tm->tm_hour + 12;
+
+	} else if ((am == 1 && tm->tm_hour > 12)
+			|| (am == 0 && tm->tm_hour < 12)) {
+		unsigned char mon1 = mon, day1 = day, hrs1 = 11;
+		unsigned char min1 = 59, sec1 = 59;
+		unsigned char yr_low1 = yr_low, yr_high1 = yr_high;
+
+		ampmdata [0] = 9;
+		ampmdata [1] = 0;
+		ampmdata [2] = BIN_TO_BCD(yr_low1);
+		ampmdata [3] = BIN_TO_BCD(yr_high1);
+		ampmdata [4] = BIN_TO_BCD(mon1);
+		ampmdata [5] = BIN_TO_BCD(day1);
+		ampmdata [6] = BIN_TO_BCD(hrs1);
+		ampmdata [7] = BIN_TO_BCD(min1);
+		ampmdata [8] = BIN_TO_BCD(sec1);
+		davinci_i2c_write(9, ampmdata, 0x23);
+		msleep(1);
+		msleep(1000);
+		am = (am == 1) ? 0 : 1;
+
+		if (!am)
+			hrs = tm->tm_hour - 12;
+		else if (tm->tm_hour == 0)
+			hrs = tm->tm_hour + 12;
+
+	} else if (am == 0 && tm->tm_hour > 12)
+		hrs = tm->tm_hour - 12;
+
+	rtcdata [0] = 9;
+	rtcdata [1] = 0;
+	rtcdata [2] = BIN_TO_BCD(yr_low);
+	rtcdata [3] = BIN_TO_BCD(yr_high);
+	rtcdata [4] = BIN_TO_BCD(mon);
+	rtcdata [5] = BIN_TO_BCD(day);
+	rtcdata [6] = BIN_TO_BCD(hrs);
+	rtcdata [7] = BIN_TO_BCD(min);
+	rtcdata [8] = BIN_TO_BCD(sec);
+
+	davinci_i2c_write(9, rtcdata, 0x23);
+	msleep(1);
+
+	return 0;
+}
+
+static struct rtc_class_ops evm_rtc_ops = {
+	.read_time	= evm_read_time,
+	.set_time	= evm_set_time,
+};
+
+static int __devinit evm_rtc_probe(struct platform_device *pdev)
+{
+	struct rtc_device	*rtc;
+
+	/* the 2005-12-05 firmware doesn't issue RTC alarms on GPIO(7);
+	 * it only uses IRQ for card detect irqs with removable media.
+	 * plus it also hides the am/pm indicator and does magic DST...
+	 */
+	rtc = rtc_device_register(pdev->name, &pdev->dev,
+			&evm_rtc_ops, THIS_MODULE);
+	if (IS_ERR(rtc))
+		return PTR_ERR(rtc);
+
+	dev_warn(&pdev->dev, "WARNING: hours 12-23 are misreported as "
+			"duplicate hours 00-11\n");
+
+	platform_set_drvdata(pdev, rtc);
+	return 0;
+}
+
+static int __devexit evm_rtc_remove(struct platform_device *pdev)
+{
+	rtc_device_unregister(platform_get_drvdata(pdev));
+	return 0;
+}
+
+static struct platform_driver evm_rtc_driver = {
+	.driver = {
+		.name		= "rtc_davinci_evm",
+	},
+	.probe		= evm_rtc_probe,
+	.remove		= __devexit_p(evm_rtc_remove),
+};
+
+static int evm_rtc_init(void)
+{
+	if (!machine_is_davinci_evm())
+		return -ENODEV;
+
+	return platform_driver_register(&evm_rtc_driver);
+}
+module_init(evm_rtc_init);
+
+static void evm_rtc_exit(void)
+{
+	platform_driver_unregister(&evm_rtc_driver);
+}
+module_exit(evm_rtc_exit);
+
+MODULE_DESCRIPTION("RTC driver for TI DaVinci EVM");
+MODULE_LICENSE("GPL");

drivers/usb/musb/davinci.c

@@ -35,13 +35,14 @@
 #include <mach/hardware.h>
 #include <mach/memory.h>
 #include <mach/gpio.h>
+#include <mach/cputype.h>
 
 #include <asm/mach-types.h>
 
 #include "musb_core.h"
 
 #ifdef CONFIG_MACH_DAVINCI_EVM
-#define GPIO_nVBUS_DRV		87
+#define GPIO_nVBUS_DRV		120
 #endif
 
 #include "davinci.h"
@@ -417,6 +418,21 @@ int __init musb_platform_init(struct musb *musb)
 		__raw_writel(phy_ctrl, USB_PHY_CTRL);
 	}
 
+	/* On dm355, the default-A state machine needs DRVVBUS control.
+	 * If we won't be a host, there's no need to turn it on.
+	 */
+	if (cpu_is_davinci_dm355()) {
+		u32	deepsleep = __raw_readl(DM355_DEEPSLEEP);
+
+		if (is_host_enabled(musb)) {
+			deepsleep &= ~DRVVBUS_OVERRIDE;
+		} else {
+			deepsleep &= ~DRVVBUS_FORCE;
+			deepsleep |= DRVVBUS_OVERRIDE;
+		}
+		__raw_writel(deepsleep, DM355_DEEPSLEEP);
+	}
+
 	/* reset the controller */
 	musb_writel(tibase, DAVINCI_USB_CTRL_REG, 0x1);
 
@@ -439,6 +455,15 @@ int musb_platform_exit(struct musb *musb)
 	if (is_host_enabled(musb))
 		del_timer_sync(&otg_workaround);
 
+	/* force VBUS off */
+	if (cpu_is_davinci_dm355()) {
+		u32	deepsleep = __raw_readl(DM355_DEEPSLEEP);
+
+		deepsleep &= ~DRVVBUS_FORCE;
+		deepsleep |= DRVVBUS_OVERRIDE;
+		__raw_writel(deepsleep, DM355_DEEPSLEEP);
+	}
+
 	davinci_source_power(musb, 0 /*off*/, 1);
 
 	/* delay, to avoid problems with module reload */

drivers/video/Kconfig

@@ -1973,6 +1973,21 @@ config FB_IBM_GXT4500
 	  Say Y here to enable support for the IBM GXT4500P display
 	  adaptor, found on some IBM System P (pSeries) machines.
 
+config FB_DAVINCI
+	bool "Davinci Framebuffer support"
+	depends on FB && ARCH_DAVINCI
+	select FB_CFB_FILLRECT
+	select FB_CFB_COPYAREA
+	select FB_CFB_IMAGEBLIT
+	help
+	  This is the frame buffer device driver for the DaVinci video
+	  hardware found on the TI DaVinci EVM.	 If
+	  unsure, say N.
+
+config FB_VIRTUAL
+	tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)"
+	depends on FB
+
 config FB_PS3
 	tristate "PS3 GPU framebuffer driver"
 	depends on FB && PS3_PS3AV

drivers/video/Makefile

@@ -135,6 +135,7 @@ obj-$(CONFIG_FB_OF)               += offb.o
 obj-$(CONFIG_FB_BF54X_LQ043)	  += bf54x-lq043fb.o
 obj-$(CONFIG_FB_BFIN_T350MCQB)	  += bfin-t350mcqb-fb.o
 obj-$(CONFIG_FB_MX3)		  += mx3fb.o
+obj-$(CONFIG_FB_DAVINCI)	  += davincifb.o
 
 # the test framebuffer is last
 obj-$(CONFIG_FB_VIRTUAL)          += vfb.o

drivers/watchdog/davinci_wdt.c

@@ -25,6 +25,7 @@
 #include <linux/uaccess.h>
 #include <linux/io.h>
 #include <linux/device.h>
+#include <linux/clk.h>
 
 #define MODULE_NAME "DAVINCI-WDT: "
 
@@ -69,6 +70,7 @@ static unsigned long wdt_status;
 
 static struct resource	*wdt_mem;
 static void __iomem	*wdt_base;
+struct clk              *wdt_clk;
 
 static void wdt_service(void)
 {
@@ -86,6 +88,10 @@ static void wdt_enable(void)
 {
 	u32 tgcr;
 	u32 timer_margin;
+	u32 wdt_freq;
+
+	BUG_ON(!wdt_clk);
+	wdt_freq = clk_get_rate(wdt_clk);
 
 	spin_lock(&io_lock);
 
@@ -99,9 +105,9 @@ static void wdt_enable(void)
 	iowrite32(0, wdt_base + TIM12);
 	iowrite32(0, wdt_base + TIM34);
 	/* set timeout period */
-	timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) & 0xffffffff);
+	timer_margin = (((u64)heartbeat * wdt_freq) & 0xffffffff);
 	iowrite32(timer_margin, wdt_base + PRD12);
-	timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) >> 32);
+	timer_margin = (((u64)heartbeat * wdt_freq) >> 32);
 	iowrite32(timer_margin, wdt_base + PRD34);
 	/* enable run continuously */
 	iowrite32(ENAMODE12_PERIODIC, wdt_base + TCR);
@@ -199,6 +205,11 @@ static int davinci_wdt_probe(struct platform_device *pdev)
 	struct resource *res;
 	struct device *dev = &pdev->dev;
 
+	wdt_clk = clk_get(dev, NULL);
+	if (WARN_ON(!wdt_clk))
+		return -ENODEV;
+	clk_enable(wdt_clk);
+
 	if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
 		heartbeat = DEFAULT_HEARTBEAT;
 
@@ -245,6 +256,12 @@ static int davinci_wdt_remove(struct platform_device *pdev)
 		kfree(wdt_mem);
 		wdt_mem = NULL;
 	}
+
+	if (wdt_clk) {
+		clk_disable(wdt_clk);
+		clk_put(wdt_clk);
+	}
+
 	return 0;
 }
 

include/linux/mtd/nand.h

@@ -121,6 +121,13 @@ typedef enum {
 	NAND_ECC_SOFT,
 	NAND_ECC_HW,
 	NAND_ECC_HW_SYNDROME,
+#ifdef CONFIG_NAND_FLASH_HW_ECC
+	NAND_ECC_HW3_256,
+	NAND_ECC_HW3_512,
+	NAND_ECC_HW6_512,
+	NAND_ECC_HW8_512,
+	NAND_ECC_HW12_2048,
+#endif
 } nand_ecc_modes_t;
 
 /*

include/media/davinci_vpfe.h

+/*
+ * Copyright (C) 2006 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+/* davinci_vpfe.h */
+
+#ifndef DAVINCI_VPFE_H
+#define DAVINCI_VPFE_H
+#ifdef __KERNEL__
+#include <media/v4l2-dev.h>
+#endif
+
+#include <media/ccdc_davinci.h>
+#include <media/tvp5146.h>
+
+#define TRUE 1
+#define FALSE 0
+
+/* vpfe specific video standards */
+#define VPFE_STD_625_50_SQP ((V4L2_STD_625_50)<<32)
+#define VPFE_STD_525_60_SQP ((V4L2_STD_525_60)<<32)
+#define VPFE_STD_AUTO ((v4l2_std_id)(0x1000000000000000ULL))
+#define VPFE_STD_AUTO_SQP ((v4l2_std_id)(0x2000000000000000ULL))
+
+#define VPFE_CMD_CONFIG_CCDC _IOW('V',BASE_VIDIOC_PRIVATE + 1,ccdc_params_ycbcr)
+#define VPFE_CMD_LATEST_FRM_ONLY   _IOW('V',BASE_VIDIOC_PRIVATE + 2,int)
+#define VPFE_CMD_CONFIG_TVP5146 _IOW('V',BASE_VIDIOC_PRIVATE + 3,tvp5146_params)
+
+/* settings for commonly used video formats */
+#define VPFE_WIN_NTSC    {0,0,720,480}
+#define VPFE_WIN_PAL     {0,0,720,576}
+#define VPFE_WIN_NTSC_SP {0,0,640,480}	/* ntsc square pixel */
+#define VPFE_WIN_PAL_SP  {0,0,768,576}	/* pal square pixel */
+#define VPFE_WIN_CIF     {0,0,352,288}
+#define VPFE_WIN_QCIF    {0,0,176,144}
+#define VPFE_WIN_QVGA    {0,0,320,240}
+#define VPFE_WIN_SIF     {0,0,352,240}
+
+
+#ifdef __KERNEL__
+
+#include <media/video-buf.h>
+
+#define VPFE_MAJOR_RELEASE 0
+#define VPFE_MINOR_RELEASE 0
+#define VPFE_BUILD         1
+
+#define VPFE_VERSION_CODE \
+     (VPFE_MAJOR_RELEASE<<16)  | (VPFE_MINOR_RELEASE<<8) | VPFE_BUILD
+
+/* By default, the driver is setup for auto-swich mode */
+#define VPFE_DEFAULT_STD VPFE_STD_AUTO
+
+#define VPFE_PIXELASPECT_NTSC {11, 10}
+#define VPFE_PIXELASPECT_PAL  {54, 59}
+#define VPFE_PIXELASPECT_NTSC_SP    {1, 1}
+#define VPFE_PIXELASPECT_PAL_SP     {1, 1}
+#define VPFE_PIXELASPECT_DEFAULT    {1, 1}
+
+#define VPFE_MAX_FRAME_WIDTH      768	/* account for PAL Square pixel mode */
+#define VPFE_MAX_FRAME_HEIGHT     576	/* account for PAL                   */
+/* 4:2:2 data */
+#define VPFE_MAX_FBUF_SIZE       (VPFE_MAX_FRAME_WIDTH*VPFE_MAX_FRAME_HEIGHT*2)
+/* frame buffers allocate at driver initialization time */
+#define VPFE_DEFNUM_FBUFS             3
+
+#define VPFE_MAX_FBUF_ORDER \
+   get_order(roundup_pow_of_two(VPFE_MAX_FBUF_SIZE))
+
+/* device object */
+typedef struct vpfe_obj {
+	struct video_device *video_dev;
+	struct videobuf_queue bufqueue;/* queue with frame buffers      */
+	struct list_head dma_queue;
+	u32 latest_only;		/* indicate whether to return the most */
+					/* recent captured buffers only        */
+	u32 usrs;
+	u32 io_usrs;
+	struct v4l2_prio_state prio;
+	v4l2_std_id std;
+	struct v4l2_rect vwin;
+	struct v4l2_rect bounds;
+	struct v4l2_fract pixelaspect;
+       	spinlock_t irqlock;
+	struct semaphore lock;
+	enum v4l2_field field;
+	u32 pixelfmt;
+	u32 numbuffers;
+	u8* fbuffers[VIDEO_MAX_FRAME];
+	struct videobuf_buffer *curFrm;
+	struct videobuf_buffer *nextFrm;
+	int field_id;
+	int mode_changed;
+	int started;
+	int field_offset;
+	tvp5146_params tvp5146_params;
+	ccdc_params_ycbcr ccdc_params;
+} vpfe_obj;
+
+/* file handle */
+typedef struct vpfe_fh {
+	struct vpfe_obj *dev;
+	int io_allowed;
+	enum v4l2_priority prio;
+} vpfe_fh;
+#endif
+
+#endif /* DAVINCI_VPFE_H */

sound/soc/codecs/tlv320aic3x.h

@@ -195,7 +195,7 @@
 #define INVERT_VOL(val)   (0x7f - val)
 
 /* Default output volume (inverted) */
-#define DEFAULT_VOL     INVERT_VOL(0x50)
+#define DEFAULT_VOL     INVERT_VOL(0x60)
 /* Default input volume */
 #define DEFAULT_GAIN    0x20