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linux
linux-davinci
Commits
e62a2da3
Commit
e62a2da3
authored
Oct 04, 2005
by
Tony Lindgren
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ARM: OMAP: Make smc91x work on H4
Make smc91x work on H4
parent
5a3a5e48
Changes
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2 changed files
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22 additions
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+22
-0
arch/arm/mach-omap2/board-h4.c
arch/arm/mach-omap2/board-h4.c
+12
-0
include/asm-arm/arch-omap/prcm.h
include/asm-arm/arch-omap/prcm.h
+10
-0
No files found.
arch/arm/mach-omap2/board-h4.c
View file @
e62a2da3
...
...
@@ -16,6 +16,7 @@
#include <linux/device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/delay.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
...
...
@@ -28,6 +29,7 @@
#include <asm/arch/usb.h>
#include <asm/arch/board.h>
#include <asm/arch/common.h>
#include <asm/arch/prcm.h>
#include <asm/io.h>
#include <asm/delay.h>
...
...
@@ -113,6 +115,16 @@ static struct platform_device *h4_devices[] __initdata = {
static
inline
void
__init
h4_init_smc91x
(
void
)
{
/* Make sure CS1 timings are correct */
GPMC_CONFIG1_1
=
0x00011200
;
GPMC_CONFIG2_1
=
0x001f1f01
;
GPMC_CONFIG3_1
=
0x00080803
;
GPMC_CONFIG4_1
=
0x1c091c09
;
GPMC_CONFIG5_1
=
0x041f1f1f
;
GPMC_CONFIG6_1
=
0x000004c4
;
GPMC_CONFIG7_1
=
0x00000f40
|
(
0x08000000
>>
24
);
udelay
(
100
);
omap_cfg_reg
(
M15_24XX_GPIO92
);
if
(
omap_request_gpio
(
OMAP24XX_ETHR_GPIO_IRQ
)
<
0
)
{
printk
(
KERN_ERR
"Failed to request GPIO%d for smc91x IRQ
\n
"
,
...
...
include/asm-arm/arch-omap/prcm.h
View file @
e62a2da3
...
...
@@ -165,6 +165,7 @@
#define DISP_BASE (OMAP24XX_L4_IO_BASE+0x50000)
#define DISP_REG32(offset) __REG32(DISP_BASE + (offset))
#define OMAP24XX_GPMC_BASE (L3_24XX_BASE + 0xa000)
#define GPMC_BASE (OMAP24XX_GPMC_BASE)
#define GPMC_REG32(offset) __REG32(GPMC_BASE + (offset))
...
...
@@ -373,6 +374,15 @@
#define GPMC_CONFIG6_0 GPMC_REG32(0x074)
#define GPMC_CONFIG7_0 GPMC_REG32(0x078)
/* GPMC CS1 */
#define GPMC_CONFIG1_1 GPMC_REG32(0x090)
#define GPMC_CONFIG2_1 GPMC_REG32(0x094)
#define GPMC_CONFIG3_1 GPMC_REG32(0x098)
#define GPMC_CONFIG4_1 GPMC_REG32(0x09C)
#define GPMC_CONFIG5_1 GPMC_REG32(0x0a0)
#define GPMC_CONFIG6_1 GPMC_REG32(0x0a4)
#define GPMC_CONFIG7_1 GPMC_REG32(0x0a8)
/* DSS */
#define DSS_CONTROL DISP_REG32(0x040)
#define DISPC_CONTROL DISP_REG32(0x440)
...
...
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