Commit e10a854c authored by Cliff Brake's avatar Cliff Brake Committed by Pierre Ossman

pxamci: replace #ifdef CONFIG_PXA27x with if (cpu_is_pxa27x())

Signed-off-by: default avatarCliff Brake <cbrake@bec-systems.com>
Acked-by: default avatarEric Miao <eric.miao@marvell.com>
Signed-off-by: default avatarPierre Ossman <drzeus@drzeus.cx>
parent 06cc1c88
...@@ -251,18 +251,17 @@ static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat) ...@@ -251,18 +251,17 @@ static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
if (stat & STAT_TIME_OUT_RESPONSE) { if (stat & STAT_TIME_OUT_RESPONSE) {
cmd->error = -ETIMEDOUT; cmd->error = -ETIMEDOUT;
} else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) { } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
#ifdef CONFIG_PXA27x
/* /*
* workaround for erratum #42: * workaround for erratum #42:
* Intel PXA27x Family Processor Specification Update Rev 001 * Intel PXA27x Family Processor Specification Update Rev 001
* A bogus CRC error can appear if the msb of a 136 bit * A bogus CRC error can appear if the msb of a 136 bit
* response is a one. * response is a one.
*/ */
if (cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000) { if (cpu_is_pxa27x() &&
(cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000))
pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode); pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode);
} else else
#endif cmd->error = -EILSEQ;
cmd->error = -EILSEQ;
} }
pxamci_disable_irq(host, END_CMD_RES); pxamci_disable_irq(host, END_CMD_RES);
......
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