Commit d808fbe5 authored by Mark Brown's avatar Mark Brown Committed by Dmitry Torokhov

Input: wm97xx-core - only schedule interrupt handler if not already scheduled

As well as clarifying the fact that the driver can cope if a second
interrupt occurs before the IRQ work is scheduled this also ensures
that calls to the machine irq_enable() are balanced, making that easier
to implement.  Normally this is redundant due to the interrupt disabling
but some unusal board configurations can trigger it.
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: default avatarDmitry Torokhov <dtor@mail.ru>
parent 4db8a5f2
...@@ -328,18 +328,18 @@ static void wm97xx_pen_irq_worker(struct work_struct *work) ...@@ -328,18 +328,18 @@ static void wm97xx_pen_irq_worker(struct work_struct *work)
* *
* We have to disable the codec interrupt in the handler because it * We have to disable the codec interrupt in the handler because it
* can take upto 1ms to clear the interrupt source. We schedule a task * can take upto 1ms to clear the interrupt source. We schedule a task
* in a work queue to do the actual interaction with the chip (it * in a work queue to do the actual interaction with the chip. The
* doesn't matter if we end up reenqueing it before it is executed * interrupt is then enabled again in the slow handler when the source
* since we don't touch the chip until it has run). The interrupt is * has been cleared.
* then enabled again in the slow handler when the source has been
* cleared.
*/ */
static irqreturn_t wm97xx_pen_interrupt(int irq, void *dev_id) static irqreturn_t wm97xx_pen_interrupt(int irq, void *dev_id)
{ {
struct wm97xx *wm = dev_id; struct wm97xx *wm = dev_id;
wm->mach_ops->irq_enable(wm, 0); if (!work_pending(&wm->pen_event_work)) {
queue_work(wm->ts_workq, &wm->pen_event_work); wm->mach_ops->irq_enable(wm, 0);
queue_work(wm->ts_workq, &wm->pen_event_work);
}
return IRQ_HANDLED; return IRQ_HANDLED;
} }
......
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