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linux
linux-davinci
Commits
d35d473c
Commit
d35d473c
authored
Apr 03, 2006
by
Ralf Baechle
Browse files
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[MIPS] Fix the crime against humanity that mipsIRQ.S is.
Signed-off-by:
Ralf Baechle
<
ralf@linux-mips.org
>
parent
fde3505c
Changes
9
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9 changed files
with
260 additions
and
67 deletions
+260
-67
arch/mips/mips-boards/atlas/Makefile
arch/mips/mips-boards/atlas/Makefile
+1
-1
arch/mips/mips-boards/atlas/atlas-irq.S
arch/mips/mips-boards/atlas/atlas-irq.S
+5
-42
arch/mips/mips-boards/generic/Makefile
arch/mips/mips-boards/generic/Makefile
+2
-2
arch/mips/mips-boards/malta/Makefile
arch/mips/mips-boards/malta/Makefile
+1
-1
arch/mips/mips-boards/malta/malta-irq.S
arch/mips/mips-boards/malta/malta-irq.S
+122
-0
arch/mips/mips-boards/sead/Makefile
arch/mips/mips-boards/sead/Makefile
+1
-1
arch/mips/mips-boards/sead/sead-irq.S
arch/mips/mips-boards/sead/sead-irq.S
+111
-0
include/asm-mips/mips-boards/atlas.h
include/asm-mips/mips-boards/atlas.h
+17
-1
include/asm-mips/mips-boards/atlasint.h
include/asm-mips/mips-boards/atlasint.h
+0
-19
No files found.
arch/mips/mips-boards/atlas/Makefile
View file @
d35d473c
...
...
@@ -16,5 +16,5 @@
# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
#
obj-y
:=
atlas_int.o atlas_setup.o
obj-y
:=
atlas_int.o atlas
-irq.o atlas
_setup.o
obj-$(CONFIG_KGDB)
+=
atlas_gdb.o
arch/mips/mips-boards/
generic/mipsIRQ
.S
→
arch/mips/mips-boards/
atlas/atlas-irq
.S
View file @
d35d473c
...
...
@@ -2,8 +2,6 @@
*
Carsten
Langgaard
,
carstenl
@
mips
.
com
*
Copyright
(
C
)
1999
,
2000
MIPS
Technologies
,
Inc
.
All
rights
reserved
.
*
*
########################################################################
*
*
This
program
is
free
software
; you can distribute it and/or modify it
*
under
the
terms
of
the
GNU
General
Public
License
(
Version
2
)
as
*
published
by
the
Free
Software
Foundation
.
...
...
@@ -17,10 +15,7 @@
*
with
this
program
; if not, write to the Free Software Foundation, Inc.,
*
59
Temple
Place
-
Suite
330
,
Boston
MA
02111
-
1307
,
USA
.
*
*
########################################################################
*
*
Interrupt
exception
dispatch
code
.
*
*/
#include <linux/config.h>
...
...
@@ -28,33 +23,9 @@
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
#ifdef CONFIG_MIPS_ATLAS
#include <asm/mips-boards/atlasint.h>
#define CASCADE_IRQ MIPSCPU_INT_ATLAS
#define CASCADE_DISPATCH atlas_hw0_irqdispatch
#endif
#ifdef CONFIG_MIPS_MALTA
#include <asm/mips-boards/maltaint.h>
#define CASCADE_IRQ MIPSCPU_INT_I8259A
#define CASCADE_DISPATCH malta_hw0_irqdispatch
#endif
#ifdef CONFIG_MIPS_SEAD
#include <asm/mips-boards/seadint.h>
#endif
/*
A
lot
of
complication
here
is
taken
away
because
:
*
*
1
)
We
handle
one
interrupt
and
return
,
sitting
in
a
loop
and
moving
across
*
all
the
pending
IRQ
bits
in
the
cause
register
is
_NOT_
the
answer
,
the
*
common
case
is
one
pending
IRQ
so
optimize
in
that
direction
.
*
*
2
)
We
need
not
check
against
bits
in
the
status
register
IRQ
mask
,
that
*
would
make
this
routine
slow
as
hell
.
*
*
3
)
Linux
only
thinks
in
terms
of
all
IRQs
on
or
all
IRQs
off
,
nothing
in
*
between
like
BSD
spl
()
brain
-
damage
.
*
/*
*
Furthermore
,
the
IRQs
on
the
MIPS
board
look
basically
(
barring
software
*
IRQs
which
we
don
't use at all and all external interrupt sources are
*
combined
together
on
hardware
interrupt
0
(
MIPS
IRQ
2
))
like
:
...
...
@@ -127,31 +98,23 @@
#
sll
s0
,
t0
#endif
#ifdef CASCADE_IRQ
li
a1
,
CASCADE_IRQ
li
a1
,
MIPSCPU_INT_ATLAS
bne
a0
,
a1
,
1
f
addu
a0
,
MIPSCPU_INT_BASE
jal
CASCADE_DISPATCH
jal
atlas_hw0_irqdispatch
move
a0
,
sp
j
ret_from_irq
nop
1
:
#else
addu
a0
,
MIPSCPU_INT_BASE
#endif
jal
do_IRQ
1
:
jal
do_IRQ
move
a1
,
sp
j
ret_from_irq
nop
spurious
:
jal
spurious_interrupt
nop
j
ret_from_irq
j
spurious_interrupt
nop
END
(
mipsIRQ
)
arch/mips/mips-boards/generic/Makefile
View file @
d35d473c
...
...
@@ -18,8 +18,8 @@
# Makefile for the MIPS boards generic routines under Linux.
#
obj-y
:=
mipsIRQ.o reset.o display.o init.o memory
.o
\
printf.o
cmdline.o time.o
obj-y
:=
reset.o display.o init.o memory.o printf
.o
\
cmdline.o time.o
obj-$(CONFIG_PCI)
+=
pci.o
obj-$(CONFIG_KGDB)
+=
gdb_hook.o
...
...
arch/mips/mips-boards/malta/Makefile
View file @
d35d473c
...
...
@@ -19,4 +19,4 @@
# under Linux.
#
obj-y
:=
malta_int.o malta_setup.o
obj-y
:=
malta_int.o malta
-irq.o malta
_setup.o
arch/mips/mips-boards/malta/malta-irq.S
0 → 100644
View file @
d35d473c
/*
*
Carsten
Langgaard
,
carstenl
@
mips
.
com
*
Copyright
(
C
)
1999
,
2000
MIPS
Technologies
,
Inc
.
All
rights
reserved
.
*
*
########################################################################
*
*
This
program
is
free
software
; you can distribute it and/or modify it
*
under
the
terms
of
the
GNU
General
Public
License
(
Version
2
)
as
*
published
by
the
Free
Software
Foundation
.
*
*
This
program
is
distributed
in
the
hope
it
will
be
useful
,
but
WITHOUT
*
ANY
WARRANTY
; without even the implied warranty of MERCHANTABILITY or
*
FITNESS
FOR
A
PARTICULAR
PURPOSE
.
See
the
GNU
General
Public
License
*
for
more
details
.
*
*
You
should
have
received
a
copy
of
the
GNU
General
Public
License
along
*
with
this
program
; if not, write to the Free Software Foundation, Inc.,
*
59
Temple
Place
-
Suite
330
,
Boston
MA
02111
-
1307
,
USA
.
*
*
########################################################################
*
*
Interrupt
exception
dispatch
code
.
*
*/
#include <linux/config.h>
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
#include <asm/mips-boards/maltaint.h>
/*
*
IRQs
on
the
Malta
board
look
basically
(
barring
software
IRQs
which
we
*
don
't use at all and all external interrupt sources are combined together
*
on
hardware
interrupt
0
(
MIPS
IRQ
2
))
like
:
*
*
MIPS
IRQ
Source
*
--------
------
*
0
Software
(
ignored
)
*
1
Software
(
ignored
)
*
2
Combined
hardware
interrupt
(
hw0
)
*
3
Hardware
(
ignored
)
*
4
Hardware
(
ignored
)
*
5
Hardware
(
ignored
)
*
6
Hardware
(
ignored
)
*
7
R4k
timer
(
what
we
use
)
*
*
We
handle
the
IRQ
according
to
_our_
priority
which
is
:
*
*
Highest
----
R4k
Timer
*
Lowest
----
Combined
hardware
interrupt
*
*
then
we
just
return
,
if
multiple
IRQs
are
pending
then
we
will
just
take
*
another
exception
,
big
deal
.
*/
.
text
.
set
noreorder
.
set
noat
.
align
5
NESTED
(
mipsIRQ
,
PT_SIZE
,
sp
)
SAVE_ALL
CLI
.
set
at
mfc0
s0
,
CP0_CAUSE
#
get
irq
bits
mfc0
s1
,
CP0_STATUS
#
get
irq
mask
andi
s0
,
ST0_IM
#
CAUSE
.
CE
may
be
non
-
zero
!
and
s0
,
s1
#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
.
set
mips32
clz
a0
,
s0
.
set
mips0
negu
a0
addu
a0
,
31
-
CAUSEB_IP
bltz
a0
,
spurious
#else
beqz
s0
,
spurious
li
a0
,
7
and
t0
,
s0
,
0xf000
sltiu
t0
,
t0
,
1
sll
t0
,
2
subu
a0
,
t0
sll
s0
,
t0
and
t0
,
s0
,
0xc000
sltiu
t0
,
t0
,
1
sll
t0
,
1
subu
a0
,
t0
sll
s0
,
t0
and
t0
,
s0
,
0x8000
sltiu
t0
,
t0
,
1
#
sll
t0
,
0
subu
a0
,
t0
#
sll
s0
,
t0
#endif
li
a1
,
MIPSCPU_INT_I8259A
bne
a0
,
a1
,
1
f
addu
a0
,
MIPSCPU_INT_BASE
jal
malta_hw0_irqdispatch
move
a0
,
sp
j
ret_from_irq
nop
1
:
jal
do_IRQ
move
a1
,
sp
j
ret_from_irq
nop
spurious
:
j
spurious_interrupt
nop
END
(
mipsIRQ
)
arch/mips/mips-boards/sead/Makefile
View file @
d35d473c
...
...
@@ -23,4 +23,4 @@
# under Linux.
#
obj-y
:=
sead_int.o sead_setup.o
obj-y
:=
sead_int.o sead
-irq.o sead
_setup.o
arch/mips/mips-boards/sead/sead-irq.S
0 → 100644
View file @
d35d473c
/*
*
Carsten
Langgaard
,
carstenl
@
mips
.
com
*
Copyright
(
C
)
1999
,
2000
MIPS
Technologies
,
Inc
.
All
rights
reserved
.
*
*
########################################################################
*
*
This
program
is
free
software
; you can distribute it and/or modify it
*
under
the
terms
of
the
GNU
General
Public
License
(
Version
2
)
as
*
published
by
the
Free
Software
Foundation
.
*
*
This
program
is
distributed
in
the
hope
it
will
be
useful
,
but
WITHOUT
*
ANY
WARRANTY
; without even the implied warranty of MERCHANTABILITY or
*
FITNESS
FOR
A
PARTICULAR
PURPOSE
.
See
the
GNU
General
Public
License
*
for
more
details
.
*
*
You
should
have
received
a
copy
of
the
GNU
General
Public
License
along
*
with
this
program
; if not, write to the Free Software Foundation, Inc.,
*
59
Temple
Place
-
Suite
330
,
Boston
MA
02111
-
1307
,
USA
.
*
*
########################################################################
*
*
Interrupt
exception
dispatch
code
.
*
*/
#include <linux/config.h>
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
#include <asm/mips-boards/seadint.h>
/*
*
IRQs
on
the
SEAD
board
look
basically
are
combined
together
on
hardware
*
interrupt
0
(
MIPS
IRQ
2
))
like
:
*
*
MIPS
IRQ
Source
*
--------
------
*
0
Software
(
ignored
)
*
1
Software
(
ignored
)
*
2
UART0
(
hw0
)
*
3
UART1
(
hw1
)
*
4
Hardware
(
ignored
)
*
5
Hardware
(
ignored
)
*
6
Hardware
(
ignored
)
*
7
R4k
timer
(
what
we
use
)
*
*
We
handle
the
IRQ
according
to
_our_
priority
which
is
:
*
*
Highest
----
R4k
Timer
*
Lowest
----
Combined
hardware
interrupt
*
*
then
we
just
return
,
if
multiple
IRQs
are
pending
then
we
will
just
take
*
another
exception
,
big
deal
.
*/
.
text
.
set
noreorder
.
set
noat
.
align
5
NESTED
(
mipsIRQ
,
PT_SIZE
,
sp
)
SAVE_ALL
CLI
.
set
at
mfc0
s0
,
CP0_CAUSE
#
get
irq
bits
mfc0
s1
,
CP0_STATUS
#
get
irq
mask
andi
s0
,
ST0_IM
#
CAUSE
.
CE
may
be
non
-
zero
!
and
s0
,
s1
#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
.
set
mips32
clz
a0
,
s0
.
set
mips0
negu
a0
addu
a0
,
31
-
CAUSEB_IP
bltz
a0
,
spurious
#else
beqz
s0
,
spurious
li
a0
,
7
and
t0
,
s0
,
0xf000
sltiu
t0
,
t0
,
1
sll
t0
,
2
subu
a0
,
t0
sll
s0
,
t0
and
t0
,
s0
,
0xc000
sltiu
t0
,
t0
,
1
sll
t0
,
1
subu
a0
,
t0
sll
s0
,
t0
and
t0
,
s0
,
0x8000
sltiu
t0
,
t0
,
1
#
sll
t0
,
0
subu
a0
,
t0
#
sll
s0
,
t0
#endif
addu
a0
,
MIPSCPU_INT_BASE
jal
do_IRQ
move
a1
,
sp
j
ret_from_irq
nop
spurious
:
j
spurious_interrupt
nop
END
(
mipsIRQ
)
include/asm-mips/mips-boards/atlas.h
View file @
d35d473c
...
...
@@ -33,12 +33,28 @@
#define ATLAS_RTC_ADR_REG 0x1f000800
#define ATLAS_RTC_DAT_REG 0x1f000808
/*
* Atlas interrupt controller register base.
*/
#define ATLAS_ICTRL_REGS_BASE 0x1f000000
/*
* Atlas registers are memory mapped on 64-bit aligned boundaries and
* only word access are allowed.
*/
struct
atlas_ictrl_regs
{
volatile
unsigned
int
intraw
;
int
dummy1
;
volatile
unsigned
int
intseten
;
int
dummy2
;
volatile
unsigned
int
intrsten
;
int
dummy3
;
volatile
unsigned
int
intenable
;
int
dummy4
;
volatile
unsigned
int
intstatus
;
int
dummy5
;
};
/*
* Atlas UART register base.
*/
...
...
include/asm-mips/mips-boards/atlasint.h
View file @
d35d473c
...
...
@@ -62,23 +62,4 @@
#define ATLASINT_RES31 (ATLASINT_BASE+31)
#define ATLASINT_END (ATLASINT_BASE+31)
/*
* Atlas registers are memory mapped on 64-bit aligned boundaries and
* only word access are allowed.
*/
struct
atlas_ictrl_regs
{
volatile
unsigned
int
intraw
;
int
dummy1
;
volatile
unsigned
int
intseten
;
int
dummy2
;
volatile
unsigned
int
intrsten
;
int
dummy3
;
volatile
unsigned
int
intenable
;
int
dummy4
;
volatile
unsigned
int
intstatus
;
int
dummy5
;
};
extern
void
atlasint_init
(
void
);
#endif
/* !(_MIPS_ATLASINT_H) */
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