ARM: OMAP: Make 24xx dma callback status work

Make 24xx dma callback status work

arch/arm/plat-omap/dma.c

@@ -473,6 +473,9 @@ int omap_request_dma(int dev_id, const char *dev_name,
 	chan->enabled_irqs = OMAP_DMA_TOUT_IRQ | OMAP_DMA_DROP_IRQ |
 				OMAP_DMA_BLOCK_IRQ;
 
+	if (cpu_is_omap24xx())
+		chan->enabled_irqs |= OMAP2_DMA_TRANS_ERR_IRQ;
+
 	if (cpu_is_omap16xx()) {
 		/* If the sync device is set, configure it dynamically. */
 		if (dev_id != 0) {
@@ -836,20 +839,26 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id,
 
 static int omap2_dma_handle_ch(int ch)
 {
-	u32 val = OMAP_DMA_CSR_REG(ch);
+	u32 status = OMAP_DMA_CSR_REG(ch);
+	u32 val;
 
-	if (!val)
+	if (!status)
 		return 0;
 	if (unlikely(dma_chan[ch].dev_id == -1))
 		return 0;
-	if (unlikely(val & OMAP_DMA_TOUT_IRQ))
+	/* REVISIT: According to 24xx TRM, there's no TOUT_IE */
+	if (unlikely(status & OMAP_DMA_TOUT_IRQ))
 		printk(KERN_INFO "DMA timeout with device %d\n",
 		       dma_chan[ch].dev_id);
-	if (unlikely(val & OMAP_DMA_DROP_IRQ))
+	if (unlikely(status & OMAP_DMA_DROP_IRQ))
 		printk(KERN_INFO
 		       "DMA synchronization event drop occurred with device "
 		       "%d\n", dma_chan[ch].dev_id);
 
+	if (unlikely(status & OMAP2_DMA_TRANS_ERR_IRQ))
+		printk(KERN_INFO "DMA transaction error with device %d\n",
+		       dma_chan[ch].dev_id);
+
 	OMAP_DMA_CSR_REG(ch) = 0x20;
 
 	val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
@@ -857,10 +866,8 @@ static int omap2_dma_handle_ch(int ch)
 	val = 1 << (ch);
 	omap_writel(val, OMAP_DMA4_IRQSTATUS_L0);
 
-	if (likely(dma_chan[ch].callback != NULL)){
-		val = OMAP_DMA_CSR_REG(ch);
-		dma_chan[ch].callback(ch, val, dma_chan[ch].data);
-	}
+	if (likely(dma_chan[ch].callback != NULL))
+		dma_chan[ch].callback(ch, status, dma_chan[ch].data);
 
 	return 0;
 }

include/asm-arm/arch-omap/dma.h

@@ -276,13 +276,18 @@
 #define OMAP1610_DMA_LCD_LCH_CTRL	(OMAP1610_DMA_LCD_BASE + 0xea)
 #define OMAP1610_DMA_LCD_SRC_FI_B1_U	(OMAP1610_DMA_LCD_BASE + 0xf4)
 
-#define OMAP_DMA_TOUT_IRQ		(1 << 0)
+#define OMAP_DMA_TOUT_IRQ		(1 << 0)	/* Only on omap1 */
 #define OMAP_DMA_DROP_IRQ		(1 << 1)
 #define OMAP_DMA_HALF_IRQ		(1 << 2)
 #define OMAP_DMA_FRAME_IRQ		(1 << 3)
 #define OMAP_DMA_LAST_IRQ		(1 << 4)
 #define OMAP_DMA_BLOCK_IRQ		(1 << 5)
-#define OMAP_DMA_SYNC_IRQ		(1 << 6)
+#define OMAP1_DMA_SYNC_IRQ		(1 << 6)
+#define OMAP2_DMA_PKT_IRQ		(1 << 7)
+#define OMAP2_DMA_TRANS_ERR_IRQ		(1 << 8)
+#define OMAP2_DMA_SECURE_ERR_IRQ	(1 << 9)
+#define OMAP2_DMA_SUPERVISOR_ERR_IRQ	(1 << 10)
+#define OMAP2_DMA_MISALIGNED_ERR_IRQ	(1 << 11)
 
 #define OMAP_DMA_DATA_TYPE_S8		0x00
 #define OMAP_DMA_DATA_TYPE_S16		0x01