Commit d212997c authored by Toshihiro Kobayashi's avatar Toshihiro Kobayashi Committed by Tony Lindgren

[PATCH] ARM: OMAP: Fix clk_use/unuse for dsp

Fix clk_use/unuse for dsp
parent 293b699a
......@@ -62,6 +62,7 @@
#include <asm/arch/dmtimer.h>
static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE];
static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE];
static unsigned int mpui730_sleep_save[MPUI730_SLEEP_SAVE_SIZE];
static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE];
......@@ -236,6 +237,9 @@ static void omap_pm_wakeup_setup(void)
omap_writel(1, OMAP_IH1_CONTROL);
}
#define EN_DSPCK 13 /* ARM_CKCTL */
#define EN_APICK 6 /* ARM_IDLECT2 */
void omap_pm_suspend(void)
{
unsigned long arg0 = 0, arg1 = 0;
......@@ -318,8 +322,21 @@ void omap_pm_suspend(void)
* Step 4: OMAP DSP Shutdown
*/
/* stop DSP */
omap_dsp_pm_suspend();
/* shut down dsp_ck */
omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL);
/* temporarily enabling api_ck to access DSP registers */
omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2);
/* save DSP registers */
DSP_SAVE(DSP_IDLECT2);
/* Stop all DSP domain clocks */
__raw_writew(0, DSP_IDLECT2);
/*
* Step 5: Wakeup Event Setup
*/
......@@ -361,7 +378,17 @@ void omap_pm_suspend(void)
* If we are here, processor is woken up!
*/
/* Restore DSP clocks */
/*
* Restore DSP clocks
*/
/* again temporarily enabling api_ck to access DSP registers */
omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2);
/* Restore DSP domain clocks */
DSP_RESTORE(DSP_IDLECT2);
/* resume DSP */
omap_dsp_pm_resume();
/*
......
......@@ -238,50 +238,19 @@ void dsp_set_idle_boot_base(unsigned long adr, size_t size)
dsp_cpu_idle();
}
static unsigned short save_dsp_idlect2;
static int init_done;
/*
* note: if we are in pm_suspend / pm_resume function,
* we are out of clk_enable() management.
*/
void omap_dsp_pm_suspend(void)
{
unsigned short save_arm_idlect2;
/* Reset DSP */
__dsp_reset();
if (! init_done)
return;
/* DSP code may have turned this on, make sure it gets turned off */
clk_enable(dsp_ck_handle);
clk_disable(dsp_ck_handle);
/* Stop any DSP domain clocks */
save_arm_idlect2 = omap_readw(ARM_IDLECT2); // api_ck is in ARM_IDLECT2
clk_enable(api_ck_handle);
save_dsp_idlect2 = __raw_readw(DSP_IDLECT2);
__raw_writew(0, DSP_IDLECT2);
omap_writew(save_arm_idlect2, ARM_IDLECT2);
clk_disable(api_ck_handle);
}
void omap_dsp_pm_resume(void)
{
unsigned short save_arm_idlect2;
if (! init_done)
return;
/* Restore DSP domain clocks */
save_arm_idlect2 = omap_readw(ARM_IDLECT2); // api_ck is in ARM_IDLECT2
clk_enable(api_ck_handle);
__raw_writew(save_dsp_idlect2, DSP_IDLECT2);
omap_writew(save_arm_idlect2, ARM_IDLECT2);
clk_disable(api_ck_handle);
/* Run DSP, if it was running */
if (cpustat.stat != CPUSTAT_RESET)
__dsp_run();
......
......@@ -161,6 +161,10 @@ extern void omap_serial_wake_trigger(int enable);
#define ARM_RESTORE(x) omap_writel((arm_sleep_save[ARM_SLEEP_SAVE_##x]), (x))
#define ARM_SHOW(x) arm_sleep_save[ARM_SLEEP_SAVE_##x]
#define DSP_SAVE(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] = __raw_readw(x)
#define DSP_RESTORE(x) __raw_writew((dsp_sleep_save[DSP_SLEEP_SAVE_##x]), (x))
#define DSP_SHOW(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x]
#define ULPD_SAVE(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] = omap_readw(x)
#define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x))
#define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]
......@@ -203,6 +207,15 @@ enum arm_save_state {
ARM_SLEEP_SAVE_SIZE
};
enum dsp_save_state {
DSP_SLEEP_SAVE_START = 0,
/*
* DSP registers 16 bits
*/
DSP_SLEEP_SAVE_DSP_IDLECT2,
DSP_SLEEP_SAVE_SIZE
};
enum ulpd_save_state {
ULPD_SLEEP_SAVE_START = 0,
/*
......
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