Commit d1db38c0 authored by Clemens Ladisch's avatar Clemens Ladisch Committed by Jaroslav Kysela

sound: virtuoso: add Xonar DS support

Add experimental support for the Asus Xonar DS.
Signed-off-by: default avatarClemens Ladisch <clemens@ladisch.de>
Signed-off-by: default avatarJaroslav Kysela <perex@perex.cz>
parent a32f6674
...@@ -1923,7 +1923,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. ...@@ -1923,7 +1923,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
------------------- -------------------
Module for sound cards based on the Asus AV100/AV200 chips, Module for sound cards based on the Asus AV100/AV200 chips,
i.e., Xonar D1, DX, D2, D2X, HDAV1.3 (Deluxe), Essence ST i.e., Xonar D1, DX, D2, D2X, DS, HDAV1.3 (Deluxe), Essence ST
(Deluxe) and Essence STX. (Deluxe) and Essence STX.
This module supports autoprobe and multiple cards. This module supports autoprobe and multiple cards.
......
...@@ -789,6 +789,7 @@ config SND_VIRTUOSO ...@@ -789,6 +789,7 @@ config SND_VIRTUOSO
Say Y here to include support for sound cards based on the Say Y here to include support for sound cards based on the
Asus AV100/AV200 chips, i.e., Xonar D1, DX, D2, D2X, Asus AV100/AV200 chips, i.e., Xonar D1, DX, D2, D2X,
Essence ST (Deluxe), and Essence STX. Essence ST (Deluxe), and Essence STX.
Support for the DS is experimental.
Support for the HDAV1.3 (Deluxe) is very experimental. Support for the HDAV1.3 (Deluxe) is very experimental.
To compile this driver as a module, choose M here: the module To compile this driver as a module, choose M here: the module
......
...@@ -2,7 +2,7 @@ snd-oxygen-lib-objs := oxygen_io.o oxygen_lib.o oxygen_mixer.o oxygen_pcm.o ...@@ -2,7 +2,7 @@ snd-oxygen-lib-objs := oxygen_io.o oxygen_lib.o oxygen_mixer.o oxygen_pcm.o
snd-hifier-objs := hifier.o snd-hifier-objs := hifier.o
snd-oxygen-objs := oxygen.o snd-oxygen-objs := oxygen.o
snd-virtuoso-objs := virtuoso.o xonar_lib.o \ snd-virtuoso-objs := virtuoso.o xonar_lib.o \
xonar_pcm179x.o xonar_cs43xx.o xonar_hdmi.o xonar_pcm179x.o xonar_cs43xx.o xonar_wm87x6.o xonar_hdmi.o
obj-$(CONFIG_SND_OXYGEN_LIB) += snd-oxygen-lib.o obj-$(CONFIG_SND_OXYGEN_LIB) += snd-oxygen-lib.o
obj-$(CONFIG_SND_HIFIER) += snd-hifier.o obj-$(CONFIG_SND_HIFIER) += snd-hifier.o
......
...@@ -49,6 +49,7 @@ static struct pci_device_id xonar_ids[] __devinitdata = { ...@@ -49,6 +49,7 @@ static struct pci_device_id xonar_ids[] __devinitdata = {
{ OXYGEN_PCI_SUBID(0x1043, 0x834f) }, { OXYGEN_PCI_SUBID(0x1043, 0x834f) },
{ OXYGEN_PCI_SUBID(0x1043, 0x835c) }, { OXYGEN_PCI_SUBID(0x1043, 0x835c) },
{ OXYGEN_PCI_SUBID(0x1043, 0x835d) }, { OXYGEN_PCI_SUBID(0x1043, 0x835d) },
{ OXYGEN_PCI_SUBID(0x1043, 0x838e) },
{ OXYGEN_PCI_SUBID_BROKEN_EEPROM }, { OXYGEN_PCI_SUBID_BROKEN_EEPROM },
{ } { }
}; };
...@@ -61,6 +62,8 @@ static int __devinit get_xonar_model(struct oxygen *chip, ...@@ -61,6 +62,8 @@ static int __devinit get_xonar_model(struct oxygen *chip,
return 0; return 0;
if (get_xonar_cs43xx_model(chip, id) >= 0) if (get_xonar_cs43xx_model(chip, id) >= 0)
return 0; return 0;
if (get_xonar_wm87x6_model(chip, id) >= 0)
return 0;
return -EINVAL; return -EINVAL;
} }
......
#ifndef WM8766_H_INCLUDED
#define WM8766_H_INCLUDED
#define WM8766_LDA1 0x00
#define WM8766_RDA1 0x01
#define WM8766_DAC_CTRL 0x02
#define WM8766_INT_CTRL 0x03
#define WM8766_LDA2 0x04
#define WM8766_RDA2 0x05
#define WM8766_LDA3 0x06
#define WM8766_RDA3 0x07
#define WM8766_MASTDA 0x08
#define WM8766_DAC_CTRL2 0x09
#define WM8766_DAC_CTRL3 0x0a
#define WM8766_MUTE1 0x0c
#define WM8766_MUTE2 0x0f
#define WM8766_RESET 0x1f
/* LDAx/RDAx/MASTDA */
#define WM8766_ATT_MASK 0x0ff
#define WM8766_UPDATE 0x100
/* DAC_CTRL */
#define WM8766_MUTEALL 0x001
#define WM8766_DEEMPALL 0x002
#define WM8766_PWDN 0x004
#define WM8766_ATC 0x008
#define WM8766_IZD 0x010
#define WM8766_PL_LEFT_MASK 0x060
#define WM8766_PL_LEFT_MUTE 0x000
#define WM8766_PL_LEFT_LEFT 0x020
#define WM8766_PL_LEFT_RIGHT 0x040
#define WM8766_PL_LEFT_LRMIX 0x060
#define WM8766_PL_RIGHT_MASK 0x180
#define WM8766_PL_RIGHT_MUTE 0x000
#define WM8766_PL_RIGHT_LEFT 0x080
#define WM8766_PL_RIGHT_RIGHT 0x100
#define WM8766_PL_RIGHT_LRMIX 0x180
/* INT_CTRL */
#define WM8766_FMT_MASK 0x003
#define WM8766_FMT_RJUST 0x000
#define WM8766_FMT_LJUST 0x001
#define WM8766_FMT_I2S 0x002
#define WM8766_FMT_DSP 0x003
#define WM8766_LRP 0x004
#define WM8766_BCP 0x008
#define WM8766_IWL_MASK 0x030
#define WM8766_IWL_16 0x000
#define WM8766_IWL_20 0x010
#define WM8766_IWL_24 0x020
#define WM8766_IWL_32 0x030
#define WM8766_PHASE_MASK 0x1c0
/* DAC_CTRL2 */
#define WM8766_ZCD 0x001
#define WM8766_DZFM_MASK 0x006
#define WM8766_DMUTE_MASK 0x038
#define WM8766_DEEMP_MASK 0x1c0
/* DAC_CTRL3 */
#define WM8766_DACPD_MASK 0x00e
#define WM8766_PWRDNALL 0x010
#define WM8766_MS 0x020
#define WM8766_RATE_MASK 0x1c0
#define WM8766_RATE_128 0x000
#define WM8766_RATE_192 0x040
#define WM8766_RATE_256 0x080
#define WM8766_RATE_384 0x0c0
#define WM8766_RATE_512 0x100
#define WM8766_RATE_768 0x140
/* MUTE1 */
#define WM8766_MPD1 0x040
/* MUTE2 */
#define WM8766_MPD2 0x020
#endif
#ifndef WM8776_H_INCLUDED
#define WM8776_H_INCLUDED
/*
* the following register names are from:
* wm8776.h -- WM8776 ASoC driver
*
* Copyright 2009 Wolfson Microelectronics plc
*
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define WM8776_HPLVOL 0x00
#define WM8776_HPRVOL 0x01
#define WM8776_HPMASTER 0x02
#define WM8776_DACLVOL 0x03
#define WM8776_DACRVOL 0x04
#define WM8776_DACMASTER 0x05
#define WM8776_PHASESWAP 0x06
#define WM8776_DACCTRL1 0x07
#define WM8776_DACMUTE 0x08
#define WM8776_DACCTRL2 0x09
#define WM8776_DACIFCTRL 0x0a
#define WM8776_ADCIFCTRL 0x0b
#define WM8776_MSTRCTRL 0x0c
#define WM8776_PWRDOWN 0x0d
#define WM8776_ADCLVOL 0x0e
#define WM8776_ADCRVOL 0x0f
#define WM8776_ALCCTRL1 0x10
#define WM8776_ALCCTRL2 0x11
#define WM8776_ALCCTRL3 0x12
#define WM8776_NOISEGATE 0x13
#define WM8776_LIMITER 0x14
#define WM8776_ADCMUX 0x15
#define WM8776_OUTMUX 0x16
#define WM8776_RESET 0x17
/* HPLVOL/HPRVOL/HPMASTER */
#define WM8776_HPATT_MASK 0x07f
#define WM8776_HPZCEN 0x080
#define WM8776_UPDATE 0x100
/* DACLVOL/DACRVOL/DACMASTER */
#define WM8776_DATT_MASK 0x0ff
/*#define WM8776_UPDATE 0x100*/
/* PHASESWAP */
#define WM8776_PH_MASK 0x003
/* DACCTRL1 */
#define WM8776_DZCEN 0x001
#define WM8776_ATC 0x002
#define WM8776_IZD 0x004
#define WM8776_TOD 0x008
#define WM8776_PL_LEFT_MASK 0x030
#define WM8776_PL_LEFT_MUTE 0x000
#define WM8776_PL_LEFT_LEFT 0x010
#define WM8776_PL_LEFT_RIGHT 0x020
#define WM8776_PL_LEFT_LRMIX 0x030
#define WM8776_PL_RIGHT_MASK 0x0c0
#define WM8776_PL_RIGHT_MUTE 0x000
#define WM8776_PL_RIGHT_LEFT 0x040
#define WM8776_PL_RIGHT_RIGHT 0x080
#define WM8776_PL_RIGHT_LRMIX 0x0c0
/* DACMUTE */
#define WM8776_DMUTE 0x001
/* DACCTRL2 */
#define WM8776_DEEMPH 0x001
#define WM8776_DZFM_MASK 0x006
#define WM8776_DZFM_NONE 0x000
#define WM8776_DZFM_LR 0x002
#define WM8776_DZFM_BOTH 0x004
#define WM8776_DZFM_EITHER 0x006
/* DACIFCTRL */
#define WM8776_DACFMT_MASK 0x003
#define WM8776_DACFMT_RJUST 0x000
#define WM8776_DACFMT_LJUST 0x001
#define WM8776_DACFMT_I2S 0x002
#define WM8776_DACFMT_DSP 0x003
#define WM8776_DACLRP 0x004
#define WM8776_DACBCP 0x008
#define WM8776_DACWL_MASK 0x030
#define WM8776_DACWL_16 0x000
#define WM8776_DACWL_20 0x010
#define WM8776_DACWL_24 0x020
#define WM8776_DACWL_32 0x030
/* ADCIFCTRL */
#define WM8776_ADCFMT_MASK 0x003
#define WM8776_ADCFMT_RJUST 0x000
#define WM8776_ADCFMT_LJUST 0x001
#define WM8776_ADCFMT_I2S 0x002
#define WM8776_ADCFMT_DSP 0x003
#define WM8776_ADCLRP 0x004
#define WM8776_ADCBCP 0x008
#define WM8776_ADCWL_MASK 0x030
#define WM8776_ADCWL_16 0x000
#define WM8776_ADCWL_20 0x010
#define WM8776_ADCWL_24 0x020
#define WM8776_ADCWL_32 0x030
#define WM8776_ADCMCLK 0x040
#define WM8776_ADCHPD 0x100
/* MSTRCTRL */
#define WM8776_ADCRATE_MASK 0x007
#define WM8776_ADCRATE_256 0x002
#define WM8776_ADCRATE_384 0x003
#define WM8776_ADCRATE_512 0x004
#define WM8776_ADCRATE_768 0x005
#define WM8776_ADCOSR 0x008
#define WM8776_DACRATE_MASK 0x070
#define WM8776_DACRATE_128 0x000
#define WM8776_DACRATE_192 0x010
#define WM8776_DACRATE_256 0x020
#define WM8776_DACRATE_384 0x030
#define WM8776_DACRATE_512 0x040
#define WM8776_DACRATE_768 0x050
#define WM8776_DACMS 0x080
#define WM8776_ADCMS 0x100
/* PWRDOWN */
#define WM8776_PDWN 0x001
#define WM8776_ADCPD 0x002
#define WM8776_DACPD 0x004
#define WM8776_HPPD 0x008
#define WM8776_AINPD 0x040
/* ADCLVOL/ADCRVOL */
#define WM8776_AGMASK 0x0ff
#define WM8776_ZCA 0x100
/* ALCCTRL1 */
#define WM8776_LCT_MASK 0x00f
#define WM8776_MAXGAIN_MASK 0x070
#define WM8776_LCSEL_MASK 0x180
#define WM8776_LCSEL_LIMITER 0x000
#define WM8776_LCSEL_ALC_RIGHT 0x080
#define WM8776_LCSEL_ALC_LEFT 0x100
#define WM8776_LCSEL_ALC_STEREO 0x180
/* ALCCTRL2 */
#define WM8776_HLD_MASK 0x00f
#define WM8776_ALCZC 0x080
#define WM8776_LCEN 0x100
/* ALCCTRL3 */
#define WM8776_ATK_MASK 0x00f
#define WM8776_DCY_MASK 0x0f0
/* NOISEGATE */
#define WM8776_NGAT 0x001
#define WM8776_NGTH_MASK 0x01c
/* LIMITER */
#define WM8776_MAXATTEN_MASK 0x00f
#define WM8776_TRANWIN_MASK 0x070
/* ADCMUX */
#define WM8776_AMX_MASK 0x01f
#define WM8776_MUTERA 0x040
#define WM8776_MUTELA 0x080
#define WM8776_LRBOTH 0x100
/* OUTMUX */
#define WM8776_MX_DAC 0x001
#define WM8776_MX_AUX 0x002
#define WM8776_MX_BYPASS 0x004
#endif
...@@ -35,6 +35,8 @@ int get_xonar_pcm179x_model(struct oxygen *chip, ...@@ -35,6 +35,8 @@ int get_xonar_pcm179x_model(struct oxygen *chip,
const struct pci_device_id *id); const struct pci_device_id *id);
int get_xonar_cs43xx_model(struct oxygen *chip, int get_xonar_cs43xx_model(struct oxygen *chip,
const struct pci_device_id *id); const struct pci_device_id *id);
int get_xonar_wm87x6_model(struct oxygen *chip,
const struct pci_device_id *id);
/* HDMI helper functions */ /* HDMI helper functions */
......
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