Commit ce31af1d authored by David Brownell's avatar David Brownell Committed by Kevin Hilman

EDMA renames: edma_read_slot(), edma_write_slot()

This renames two parameter RAM calls that read and write entire param
sets, and re-focusses their descriptions on the fact that they update
parameter RAM.  That has nothing *directly* to do with any hardware DMA
channel.  Switch to unsigned params, letting some error checks be removed.

It also starts updating the dma.c comments to reflect the different
structural blocks of the programming interface, calling out the two
groups of parameter RAM operations and channel control operations.
Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent e890af73
...@@ -330,7 +330,7 @@ void davinci_dma_getposition(int lch, dma_addr_t *src, dma_addr_t *dst) ...@@ -330,7 +330,7 @@ void davinci_dma_getposition(int lch, dma_addr_t *src, dma_addr_t *dst)
{ {
struct edmacc_param temp; struct edmacc_param temp;
davinci_get_dma_params(lch, &temp); edma_read_slot(lch, &temp);
if (src != NULL) if (src != NULL)
*src = temp.src; *src = temp.src;
if (dst != NULL) if (dst != NULL)
...@@ -747,6 +747,10 @@ void davinci_free_dma(int lch) ...@@ -747,6 +747,10 @@ void davinci_free_dma(int lch)
} }
EXPORT_SYMBOL(davinci_free_dma); EXPORT_SYMBOL(davinci_free_dma);
/*-----------------------------------------------------------------------*/
/* Parameter RAM operations (i) -- read/write partial slots */
/** /**
* davinci_set_dma_src_params - set initial DMA source address in PaRAM * davinci_set_dma_src_params - set initial DMA source address in PaRAM
* @lch: logical channel being configured * @lch: logical channel being configured
...@@ -868,7 +872,7 @@ EXPORT_SYMBOL(davinci_set_dma_dest_index); ...@@ -868,7 +872,7 @@ EXPORT_SYMBOL(davinci_set_dma_dest_index);
* *
* See the EDMA3 documentation to understand how to configure and link * See the EDMA3 documentation to understand how to configure and link
* transfers using the fields in PaRAM slots. If you are not doing it * transfers using the fields in PaRAM slots. If you are not doing it
* all at once with davinci_set_dma_params() you will use this routine * all at once with edma_write_slot(), you will use this routine
* plus two calls each for source and destination, setting the initial * plus two calls each for source and destination, setting the initial
* address and saying how to index that address. * address and saying how to index that address.
* *
...@@ -905,39 +909,47 @@ void davinci_set_dma_transfer_params(int lch, ...@@ -905,39 +909,47 @@ void davinci_set_dma_transfer_params(int lch,
} }
EXPORT_SYMBOL(davinci_set_dma_transfer_params); EXPORT_SYMBOL(davinci_set_dma_transfer_params);
/*-----------------------------------------------------------------------*/
/* Parameter RAM operations (ii) -- read/write whole parameter sets */
/** /**
* davinci_set_dma_params - write PaRAM data for channel * edma_write_slot - write parameter RAM data for slot
* @lch: logical channel being configured * @slot: number of parameter RAM slot being modified
* @param: channel configuration to be used * @param: data to be written into parameter RAM slot
* *
* Use this to assign all parameters of a transfer at once. This * Use this to assign all parameters of a transfer at once. This
* allows more efficient setup of transfers than issuing multiple * allows more efficient setup of transfers than issuing multiple
* calls to set up those parameters in small pieces, and provides * calls to set up those parameters in small pieces, and provides
* complete control over all transfer options. * complete control over all transfer options.
*/ */
void davinci_set_dma_params(int lch, struct edmacc_param *param) void edma_write_slot(unsigned slot, const struct edmacc_param *param)
{ {
if (lch < 0 || lch >= DAVINCI_EDMA_NUM_PARAMENTRY) if (slot >= DAVINCI_EDMA_NUM_PARAMENTRY)
return; return;
memcpy_toio(edmacc_regs_base + PARM_OFFSET(lch), param, PARM_SIZE); memcpy_toio(edmacc_regs_base + PARM_OFFSET(slot), param, PARM_SIZE);
} }
EXPORT_SYMBOL(davinci_set_dma_params); EXPORT_SYMBOL(edma_write_slot);
/** /**
* davinci_get_dma_params - read PaRAM data for channel * edma_read_slot - read parameter RAM data from slot
* @lch: logical channel being queried * @slot: number of parameter RAM slot being copied
* @param: where to store current channel configuration * @param: where to store copy of parameter RAM data
* *
* Use this to read the Parameter RAM for a channel, perhaps to * Use this to read data from a parameter RAM slot, perhaps to
* save them as a template for later reuse. * save them as a template for later reuse.
*/ */
void davinci_get_dma_params(int lch, struct edmacc_param *param) void edma_read_slot(unsigned slot, struct edmacc_param *param)
{ {
if (lch < 0 || lch >= DAVINCI_EDMA_NUM_PARAMENTRY) if (slot >= DAVINCI_EDMA_NUM_PARAMENTRY)
return; return;
memcpy_fromio(param, edmacc_regs_base + PARM_OFFSET(lch), PARM_SIZE); memcpy_fromio(param, edmacc_regs_base + PARM_OFFSET(slot), PARM_SIZE);
} }
EXPORT_SYMBOL(davinci_get_dma_params); EXPORT_SYMBOL(edma_read_slot);
/*-----------------------------------------------------------------------*/
/* Various EDMA channel control operations */
/* /*
* DMA pause - pauses the dma on the channel passed * DMA pause - pauses the dma on the channel passed
......
...@@ -199,8 +199,8 @@ void davinci_set_dma_dest_index(int lch, s16 dest_bidx, s16 dest_cidx); ...@@ -199,8 +199,8 @@ void davinci_set_dma_dest_index(int lch, s16 dest_bidx, s16 dest_cidx);
void davinci_set_dma_transfer_params(int lch, u16 acnt, u16 bcnt, u16 ccnt, void davinci_set_dma_transfer_params(int lch, u16 acnt, u16 bcnt, u16 ccnt,
u16 bcnt_rld, enum sync_dimension sync_mode); u16 bcnt_rld, enum sync_dimension sync_mode);
void davinci_set_dma_params(int lch, struct edmacc_param *params); void edma_write_slot(unsigned slot, const struct edmacc_param *params);
void davinci_get_dma_params(int lch, struct edmacc_param *params); void edma_read_slot(unsigned slot, struct edmacc_param *params);
int davinci_start_dma(int lch); int davinci_start_dma(int lch);
void davinci_stop_dma(int lch); void davinci_stop_dma(int lch);
......
...@@ -496,7 +496,7 @@ static void __init mmc_davinci_dma_setup(struct mmc_davinci_host *host, ...@@ -496,7 +496,7 @@ static void __init mmc_davinci_dma_setup(struct mmc_davinci_host *host,
davinci_set_dma_transfer_params(sync_dev, acnt, bcnt, ccnt, 8, ABSYNC); davinci_set_dma_transfer_params(sync_dev, acnt, bcnt, ccnt, 8, ABSYNC);
davinci_get_dma_params(sync_dev, template); edma_read_slot(sync_dev, template);
/* don't bother with irqs or chaining */ /* don't bother with irqs or chaining */
template->opt &= ~(ITCCHEN | TCCHEN | ITCINTEN | TCINTEN); template->opt &= ~(ITCCHEN | TCCHEN | ITCINTEN | TCINTEN);
...@@ -530,7 +530,7 @@ static int mmc_davinci_send_dma_request(struct mmc_davinci_host *host, ...@@ -530,7 +530,7 @@ static int mmc_davinci_send_dma_request(struct mmc_davinci_host *host,
regs.dst = sg_dma_address(sg); regs.dst = sg_dma_address(sg);
} }
regs.ccnt = count >> ((rw_threshold == 32) ? 5 : 4); regs.ccnt = count >> ((rw_threshold == 32) ? 5 : 4);
davinci_set_dma_params(lch, &regs); edma_write_slot(lch, &regs);
davinci_start_dma(lch); davinci_start_dma(lch);
return 0; return 0;
......
...@@ -58,7 +58,7 @@ struct davinci_runtime_data { ...@@ -58,7 +58,7 @@ struct davinci_runtime_data {
spinlock_t lock; spinlock_t lock;
int period; /* current DMA period */ int period; /* current DMA period */
int master_lch; /* Master DMA channel */ int master_lch; /* Master DMA channel */
int slave_lch; /* Slave DMA channel */ int slave_lch; /* linked parameter RAM reload slot */
struct davinci_pcm_dma_params *params; /* DMA params */ struct davinci_pcm_dma_params *params; /* DMA params */
}; };
...@@ -147,7 +147,7 @@ static int davinci_pcm_dma_request(struct snd_pcm_substream *substream) ...@@ -147,7 +147,7 @@ static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
if (ret) if (ret)
return ret; return ret;
/* Request slave DMA channel */ /* Request parameter RAM reload slot */
ret = davinci_request_dma(DAVINCI_EDMA_PARAM_ANY, "Link", ret = davinci_request_dma(DAVINCI_EDMA_PARAM_ANY, "Link",
NULL, NULL, &prtd->slave_lch, &tcc, EVENTQ_0); NULL, NULL, &prtd->slave_lch, &tcc, EVENTQ_0);
if (ret) { if (ret) {
...@@ -155,7 +155,7 @@ static int davinci_pcm_dma_request(struct snd_pcm_substream *substream) ...@@ -155,7 +155,7 @@ static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
return ret; return ret;
} }
/* Link slave DMA channel in loopback */ /* Link parameter RAM to itself in loopback */
davinci_dma_link_lch(prtd->slave_lch, prtd->slave_lch); davinci_dma_link_lch(prtd->slave_lch, prtd->slave_lch);
return 0; return 0;
...@@ -197,9 +197,9 @@ static int davinci_pcm_prepare(struct snd_pcm_substream *substream) ...@@ -197,9 +197,9 @@ static int davinci_pcm_prepare(struct snd_pcm_substream *substream)
prtd->period = 0; prtd->period = 0;
davinci_pcm_enqueue_dma(substream); davinci_pcm_enqueue_dma(substream);
/* Get slave channel dma params for master channel startup */ /* Copy self-linked parameter RAM entry into master channel */
davinci_get_dma_params(prtd->slave_lch, &temp); edma_read_slot(prtd->slave_lch, &temp);
davinci_set_dma_params(prtd->master_lch, &temp); edma_write_slot(prtd->master_lch, &temp);
return 0; return 0;
} }
......
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