Commit cd66af4a authored by Felipe Balbi's avatar Felipe Balbi

usb: musb: musbhsdma cleanup

This patch:
- cleans musbhsdma defines
- enables burst mode for both dma modes
- keeps dma in mode1 (it's safe)
- rely on the mode set by musb_gadget.c or musb_host.c and don't branch
  again
Signed-off-by: default avatarFelipe Balbi <felipe.balbi@nokia.com>
parent 3ffe793d
......@@ -128,27 +128,19 @@ static void configure_channel(struct dma_channel *channel,
DBG(4, "%p, pkt_sz %d, addr 0x%x, len %d, mode %d\n",
channel, packet_sz, dma_addr, len, mode);
if (mode) {
csr |= 1 << MUSB_HSDMA_MODE1_SHIFT;
BUG_ON(len < packet_sz);
if (packet_sz >= 64) {
csr |= MUSB_HSDMA_BURSTMODE_INCR16
<< MUSB_HSDMA_BURSTMODE_SHIFT;
} else if (packet_sz >= 32) {
csr |= MUSB_HSDMA_BURSTMODE_INCR8
<< MUSB_HSDMA_BURSTMODE_SHIFT;
} else if (packet_sz >= 16) {
csr |= MUSB_HSDMA_BURSTMODE_INCR4
<< MUSB_HSDMA_BURSTMODE_SHIFT;
}
}
if (packet_sz >= 64)
csr |= MUSB_HSDMA_BURSTMODE_INCR16;
else if (packet_sz >= 32)
csr |= MUSB_HSDMA_BURSTMODE_INCR8;
else if (packet_sz >= 16)
csr |= MUSB_HSDMA_BURSTMODE_INCR4;
csr |= (musb_channel->epnum << MUSB_HSDMA_ENDPOINT_SHIFT)
| (1 << MUSB_HSDMA_ENABLE_SHIFT)
| (1 << MUSB_HSDMA_IRQENABLE_SHIFT)
| MUSB_HSDMA_MODE1
| MUSB_HSDMA_ENABLE
| MUSB_HSDMA_IRQENABLE
| (musb_channel->transmit
? (1 << MUSB_HSDMA_TRANSMIT_SHIFT)
? MUSB_HSDMA_TRANSMIT
: 0);
/* address/count */
......@@ -181,10 +173,7 @@ static int dma_channel_program(struct dma_channel *channel,
musb_channel->max_packet_sz = packet_sz;
channel->status = MUSB_DMA_STATUS_BUSY;
if ((mode == 1) && (len >= packet_sz))
configure_channel(channel, packet_sz, 1, dma_addr, len);
else
configure_channel(channel, packet_sz, 0, dma_addr, len);
configure_channel(channel, packet_sz, mode, dma_addr, len);
return true;
}
......@@ -267,7 +256,7 @@ static irqreturn_t dma_controller_irq(int irq, void *private_data)
MUSB_HSDMA_CHANNEL_OFFSET(bchannel,
MUSB_HSDMA_CONTROL));
if (csr & (1 << MUSB_HSDMA_BUSERROR_SHIFT)) {
if (csr & MUSB_HSDMA_BUSERROR) {
musb_channel->channel.status =
MUSB_DMA_STATUS_BUS_ABORT;
} else {
......
......@@ -110,18 +110,18 @@ static inline void musb_write_hsdma_count(void __iomem *mbase,
#endif /* CONFIG_BLACKFIN */
/* control register (16-bit): */
#define MUSB_HSDMA_ENABLE_SHIFT 0
#define MUSB_HSDMA_TRANSMIT_SHIFT 1
#define MUSB_HSDMA_MODE1_SHIFT 2
#define MUSB_HSDMA_IRQENABLE_SHIFT 3
#define MUSB_HSDMA_ENABLE (1 << 0)
#define MUSB_HSDMA_TRANSMIT (1 << 1)
#define MUSB_HSDMA_MODE1 (1 << 2)
#define MUSB_HSDMA_IRQENABLE (1 << 3)
#define MUSB_HSDMA_ENDPOINT_SHIFT 4
#define MUSB_HSDMA_BUSERROR_SHIFT 8
#define MUSB_HSDMA_BUSERROR (1 << 8)
#define MUSB_HSDMA_BURSTMODE_SHIFT 9
#define MUSB_HSDMA_BURSTMODE (3 << MUSB_HSDMA_BURSTMODE_SHIFT)
#define MUSB_HSDMA_BURSTMODE_UNSPEC 0
#define MUSB_HSDMA_BURSTMODE_INCR4 1
#define MUSB_HSDMA_BURSTMODE_INCR8 2
#define MUSB_HSDMA_BURSTMODE_INCR16 3
#define MUSB_HSDMA_BURSTMODE_UNSPEC (0 << MUSB_HSDMA_BURSTMODE_SHIFT)
#define MUSB_HSDMA_BURSTMODE_INCR4 (1 << MUSB_HSDMA_BURSTMODE_SHIFT)
#define MUSB_HSDMA_BURSTMODE_INCR8 (2 << MUSB_HSDMA_BURSTMODE_SHIFT)
#define MUSB_HSDMA_BURSTMODE_INCR16 (3 << MUSB_HSDMA_BURSTMODE_SHIFT)
#define MUSB_HSDMA_CHANNELS 8
......
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