Commit c7e7964c authored by Yinghai Lu's avatar Yinghai Lu Committed by Ingo Molnar

x86: mach_es7000 to es7000

Signed-off-by: default avatarYinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 1176fa91
/*
* Written by: Garry Forsgren, Unisys Corporation
* Natalie Protasevich, Unisys Corporation
* This file contains the code to configure and interface
* This file contains the code to configure and interface
* with Unisys ES7000 series hardware system manager.
*
* Copyright (c) 2003 Unisys Corporation. All Rights Reserved.
......@@ -18,7 +18,7 @@
* with this program; if not, write the Free Software Foundation, Inc., 59
* Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Contact information: Unisys Corporation, Township Line & Union Meeting
* Contact information: Unisys Corporation, Township Line & Union Meeting
* Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
*
* http://www.unisys.com
......@@ -41,7 +41,7 @@
#define MIP_VALID 0x0100000000000000ULL
#define MIP_PORT(VALUE) ((VALUE >> 32) & 0xffff)
#define MIP_RD_LO(VALUE) (VALUE & 0xffffffff)
#define MIP_RD_LO(VALUE) (VALUE & 0xffffffff)
struct mip_reg_info {
unsigned long long mip_info;
......@@ -51,11 +51,11 @@ struct mip_reg_info {
};
struct part_info {
unsigned char type;
unsigned char type;
unsigned char length;
unsigned char part_id;
unsigned char apic_mode;
unsigned long snum;
unsigned long snum;
char ptype[16];
char sname[64];
char pname[64];
......@@ -68,11 +68,11 @@ struct psai {
};
struct es7000_mem_info {
unsigned char type;
unsigned char type;
unsigned char length;
unsigned char resv[6];
unsigned long long start;
unsigned long long size;
unsigned long long start;
unsigned long long size;
};
struct es7000_oem_table {
......@@ -106,7 +106,7 @@ struct mip_reg {
};
#define MIP_SW_APIC 0x1020b
#define MIP_FUNC(VALUE) (VALUE & 0xff)
#define MIP_FUNC(VALUE) (VALUE & 0xff)
extern int parse_unisys_oem (char *oemptr);
extern void setup_unisys(void);
......
......@@ -72,7 +72,7 @@ es7000_rename_gsi(int ioapic, int gsi)
base += nr_ioapic_registers[i];
}
if (!ioapic && (gsi < 16))
if (!ioapic && (gsi < 16))
gsi += base;
return gsi;
}
......
......@@ -9,4 +9,4 @@ obj-$(CONFIG_X86_NUMAQ) += numaq.o
obj-$(CONFIG_X86_SUMMIT) += summit.o
obj-$(CONFIG_X86_BIGSMP) += bigsmp.o
obj-$(CONFIG_X86_ES7000) += es7000.o
obj-$(CONFIG_X86_ES7000) += ../../x86/mach-es7000/
obj-$(CONFIG_X86_ES7000) += ../../x86/es7000/
......@@ -11,12 +11,12 @@
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/init.h>
#include <asm/mach-es7000/mach_apicdef.h>
#include <asm/es7000/apicdef.h>
#include <linux/smp.h>
#include <asm/mach-es7000/mach_apic.h>
#include <asm/mach-es7000/mach_ipi.h>
#include <asm/mach-es7000/mach_mpparse.h>
#include <asm/mach-es7000/mach_wakecpu.h>
#include <asm/es7000/apic.h>
#include <asm/es7000/ipi.h>
#include <asm/es7000/mpparse.h>
#include <asm/es7000/wakecpu.h>
static int probe_es7000(void)
{
......
#ifndef ASM_X86__MACH_ES7000__MACH_APIC_H
#define ASM_X86__MACH_ES7000__MACH_APIC_H
#ifndef __ASM_ES7000_APIC_H
#define __ASM_ES7000_APIC_H
#define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
#define esr_disable (1)
......@@ -10,7 +10,7 @@ static inline int apic_id_registered(void)
}
static inline cpumask_t target_cpus(void)
{
{
#if defined CONFIG_ES7000_CLUSTERED_APIC
return CPU_MASK_ALL;
#else
......@@ -23,24 +23,24 @@ static inline cpumask_t target_cpus(void)
#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
#define INT_DELIVERY_MODE (dest_LowestPrio)
#define INT_DEST_MODE (1) /* logical delivery broadcast to all procs */
#define NO_BALANCE_IRQ (1)
#define NO_BALANCE_IRQ (1)
#undef WAKE_SECONDARY_VIA_INIT
#define WAKE_SECONDARY_VIA_MIP
#else
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
#define INT_DELIVERY_MODE (dest_Fixed)
#define INT_DEST_MODE (0) /* phys delivery to target procs */
#define NO_BALANCE_IRQ (0)
#define NO_BALANCE_IRQ (0)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL 0x0
#define WAKE_SECONDARY_VIA_INIT
#endif
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
{
{
return 0;
}
static inline unsigned long check_apicid_present(int bit)
}
static inline unsigned long check_apicid_present(int bit)
{
return physid_isset(bit, phys_cpu_present_map);
}
......@@ -80,7 +80,7 @@ static inline void setup_apic_routing(void)
{
int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
(apic_version[apic] == 0x14) ?
(apic_version[apic] == 0x14) ?
"Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(TARGET_CPUS)[0]);
}
......@@ -150,7 +150,7 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
int num_bits_set;
int cpus_found = 0;
int cpu;
int apicid;
int apicid;
num_bits_set = cpus_weight(cpumask);
/* Return id to all */
......@@ -160,16 +160,16 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
#else
return cpu_to_logical_apicid(0);
#endif
/*
* The cpus in the mask must all be on the apic cluster. If are not
* on the same apicid cluster return default value of TARGET_CPUS.
/*
* The cpus in the mask must all be on the apic cluster. If are not
* on the same apicid cluster return default value of TARGET_CPUS.
*/
cpu = first_cpu(cpumask);
apicid = cpu_to_logical_apicid(cpu);
while (cpus_found < num_bits_set) {
if (cpu_isset(cpu, cpumask)) {
int new_apicid = cpu_to_logical_apicid(cpu);
if (apicid_cluster(apicid) !=
if (apicid_cluster(apicid) !=
apicid_cluster(new_apicid)){
printk ("%s: Not a valid mask!\n",__FUNCTION__);
#if defined CONFIG_ES7000_CLUSTERED_APIC
......@@ -191,4 +191,4 @@ static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
return cpuid_apic >> index_msb;
}
#endif /* ASM_X86__MACH_ES7000__MACH_APIC_H */
#endif /* __ASM_ES7000_APIC_H */
#ifndef ASM_X86__MACH_ES7000__MACH_APICDEF_H
#define ASM_X86__MACH_ES7000__MACH_APICDEF_H
#ifndef __ASM_ES7000_APICDEF_H
#define __ASM_ES7000_APICDEF_H
#define APIC_ID_MASK (0xFF<<24)
static inline unsigned get_apic_id(unsigned long x)
{
static inline unsigned get_apic_id(unsigned long x)
{
return (((x)>>24)&0xFF);
}
}
#define GET_APIC_ID(x) get_apic_id(x)
#endif /* ASM_X86__MACH_ES7000__MACH_APICDEF_H */
#endif
#ifndef ASM_X86__MACH_ES7000__MACH_IPI_H
#define ASM_X86__MACH_ES7000__MACH_IPI_H
#ifndef __ASM_ES7000_IPI_H
#define __ASM_ES7000_IPI_H
void send_IPI_mask_sequence(cpumask_t mask, int vector);
......@@ -21,4 +21,4 @@ static inline void send_IPI_all(int vector)
send_IPI_mask(cpu_online_map, vector);
}
#endif /* ASM_X86__MACH_ES7000__MACH_IPI_H */
#endif /* __ASM_ES7000_IPI_H */
#ifndef ASM_X86__MACH_ES7000__MACH_MPPARSE_H
#define ASM_X86__MACH_ES7000__MACH_MPPARSE_H
#ifndef __ASM_ES7000_MPPARSE_H
#define __ASM_ES7000_MPPARSE_H
#include <linux/acpi.h>
......@@ -26,4 +26,4 @@ static inline int es7000_check_dsdt(void)
}
#endif
#endif /* ASM_X86__MACH_ES7000__MACH_MPPARSE_H */
#endif /* __ASM_MACH_MPPARSE_H */
#ifndef ASM_X86__MACH_ES7000__MACH_WAKECPU_H
#define ASM_X86__MACH_ES7000__MACH_WAKECPU_H
#ifndef __ASM_ES7000_WAKECPU_H
#define __ASM_ES7000_WAKECPU_H
/*
/*
* This file copes with machines that wakeup secondary CPUs by the
* INIT, INIT, STARTUP sequence.
*/
......@@ -56,4 +56,4 @@ static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
#define inquire_remote_apic(apicid) {}
#endif
#endif /* ASM_X86__MACH_ES7000__MACH_WAKECPU_H */
#endif /* __ASM_MACH_WAKECPU_H */
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