Commit c3ed8ae4 authored by Bahadir Balban's avatar Bahadir Balban Committed by Catalin Marinas

PB926 PCI IO region support.

parent f5f4507a
...@@ -53,7 +53,7 @@ ...@@ -53,7 +53,7 @@
* *
* Setup a VA for the Versatile Vectored Interrupt Controller. * Setup a VA for the Versatile Vectored Interrupt Controller.
*/ */
#define __io_address(n) __io(IO_ADDRESS(n)) #define __io_address(n) ((void __iomem *)IO_ADDRESS(n))
#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE) #define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE)
#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE) #define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE)
...@@ -197,26 +197,13 @@ static struct map_desc versatile_io_desc[] __initdata = { ...@@ -197,26 +197,13 @@ static struct map_desc versatile_io_desc[] __initdata = {
.pfn = __phys_to_pfn(VERSATILE_PCI_CFG_BASE), .pfn = __phys_to_pfn(VERSATILE_PCI_CFG_BASE),
.length = VERSATILE_PCI_CFG_BASE_SIZE, .length = VERSATILE_PCI_CFG_BASE_SIZE,
.type = MT_DEVICE .type = MT_DEVICE
},
#if 0
{
.virtual = VERSATILE_PCI_VIRT_MEM_BASE0,
.pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0),
.length = SZ_16M,
.type = MT_DEVICE
}, { }, {
.virtual = VERSATILE_PCI_VIRT_MEM_BASE1, .virtual = (unsigned long)VERSATILE_PCI_IO_VIRT_BASE,
.pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE1), .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0),
.length = SZ_16M,
.type = MT_DEVICE
}, {
.virtual = VERSATILE_PCI_VIRT_MEM_BASE2,
.pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE2),
.length = SZ_16M, .length = SZ_16M,
.type = MT_DEVICE .type = MT_DEVICE
}, },
#endif #endif
#endif
}; };
void __init versatile_map_io(void) void __init versatile_map_io(void)
......
...@@ -36,7 +36,7 @@ ...@@ -36,7 +36,7 @@
* *
* Mem 50000000 - 5FFFFFFF LB_BASE0/LB_MAP0, non prefetch * Mem 50000000 - 5FFFFFFF LB_BASE0/LB_MAP0, non prefetch
* Mem 60000000 - 6FFFFFFF LB_BASE1/LB_MAP1, prefetch * Mem 60000000 - 6FFFFFFF LB_BASE1/LB_MAP1, prefetch
* IO 44000000 - 4FFFFFFF LB_BASE2/LB_MAP2, IO * IO 43000000 - 4FFFFFFF LB_BASE2/LB_MAP2, IO
* Cfg 42000000 - 42FFFFFF PCI config * Cfg 42000000 - 42FFFFFF PCI config
* *
*/ */
...@@ -249,6 +249,7 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys) ...@@ -249,6 +249,7 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
if (nr == 0) { if (nr == 0) {
sys->mem_offset = 0; sys->mem_offset = 0;
sys->io_offset = VERSATILE_PCI_MEM_BASE0;
ret = pci_versatile_setup_resources(sys->resource); ret = pci_versatile_setup_resources(sys->resource);
if (ret < 0) { if (ret < 0) {
printk("pci_versatile_setup: resources... oops?\n"); printk("pci_versatile_setup: resources... oops?\n");
......
...@@ -28,9 +28,9 @@ ...@@ -28,9 +28,9 @@
/* /*
* PCI space virtual addresses * PCI space virtual addresses
*/ */
#define VERSATILE_PCI_VIRT_BASE (void __iomem *)0xe8000000ul #define VERSATILE_PCI_VIRT_BASE (void __iomem *)0xE8000000
#define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xe9000000ul #define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xE9000000
#define VERSATILE_PCI_IO_VIRT_BASE (void __iomem *)0xEA000000
#if 0 #if 0
#define VERSATILE_PCI_VIRT_MEM_BASE0 0xf4000000 #define VERSATILE_PCI_VIRT_MEM_BASE0 0xf4000000
#define VERSATILE_PCI_VIRT_MEM_BASE1 0xf5000000 #define VERSATILE_PCI_VIRT_MEM_BASE1 0xf5000000
...@@ -41,7 +41,7 @@ ...@@ -41,7 +41,7 @@
#endif #endif
/* CIK guesswork */ /* CIK guesswork */
#define PCIBIOS_MIN_IO 0x44000000 #define PCIBIOS_MIN_IO 0x43000000
#define PCIBIOS_MIN_MEM 0x50000000 #define PCIBIOS_MIN_MEM 0x50000000
#define pcibios_assign_all_busses() 1 #define pcibios_assign_all_busses() 1
......
...@@ -20,11 +20,15 @@ ...@@ -20,11 +20,15 @@
#ifndef __ASM_ARM_ARCH_IO_H #ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H
#include <asm/arch/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff #define IO_SPACE_LIMIT 0xffffffff
#define __pci_io (VERSATILE_PCI_IO_VIRT_BASE - VERSATILE_PCI_MEM_BASE0)
static inline void __iomem *__io(unsigned long addr) static inline void __iomem *__io(unsigned long addr)
{ {
return (void __iomem *)addr; return (void __iomem *)(addr + __pci_io);
} }
#define __io(a) __io(a) #define __io(a) __io(a)
#define __mem_pci(a) (a) #define __mem_pci(a) (a)
......
...@@ -231,7 +231,7 @@ ...@@ -231,7 +231,7 @@
/* PCI space */ /* PCI space */
#define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */ #define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */
#define VERSATILE_PCI_CFG_BASE 0x42000000 #define VERSATILE_PCI_CFG_BASE 0x42000000
#define VERSATILE_PCI_MEM_BASE0 0x44000000 #define VERSATILE_PCI_MEM_BASE0 0x43000000
#define VERSATILE_PCI_MEM_BASE1 0x50000000 #define VERSATILE_PCI_MEM_BASE1 0x50000000
#define VERSATILE_PCI_MEM_BASE2 0x60000000 #define VERSATILE_PCI_MEM_BASE2 0x60000000
/* Sizes of above maps */ /* Sizes of above maps */
......
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