Commit c29cfcea authored by Jarkko Nikula's avatar Jarkko Nikula Committed by Tony Lindgren

ARM: OMAP: Add RX/TX interrupts for 2430 and 34xx McBSP ports 3-5

Without RX and TX interrupt definitions, the omap_mcbsp_request will
fail on OMAP2430 and OMAP34xx for ports 3-5 since default io_type is
OMAP_MCBSP_IRQ_IO.
Signed-off-by: default avatarJarkko Nikula <jarkko.nikula@nokia.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent f9d06c24
...@@ -196,6 +196,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { ...@@ -196,6 +196,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.phys_base = OMAP2430_MCBSP3_BASE, .phys_base = OMAP2430_MCBSP3_BASE,
.dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX,
.dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
.ops = &omap2_mcbsp_ops, .ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk", .clk_name = "mcbsp_clk",
}, },
...@@ -203,6 +205,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { ...@@ -203,6 +205,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.phys_base = OMAP2430_MCBSP4_BASE, .phys_base = OMAP2430_MCBSP4_BASE,
.dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX,
.dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX,
.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
.ops = &omap2_mcbsp_ops, .ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk", .clk_name = "mcbsp_clk",
}, },
...@@ -210,6 +214,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { ...@@ -210,6 +214,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.phys_base = OMAP2430_MCBSP5_BASE, .phys_base = OMAP2430_MCBSP5_BASE,
.dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX,
.dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX,
.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
.ops = &omap2_mcbsp_ops, .ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk", .clk_name = "mcbsp_clk",
}, },
...@@ -244,6 +250,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { ...@@ -244,6 +250,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.phys_base = OMAP34XX_MCBSP3_BASE, .phys_base = OMAP34XX_MCBSP3_BASE,
.dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX,
.dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
.ops = &omap2_mcbsp_ops, .ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk", .clk_name = "mcbsp_clk",
}, },
...@@ -251,6 +259,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { ...@@ -251,6 +259,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.phys_base = OMAP34XX_MCBSP4_BASE, .phys_base = OMAP34XX_MCBSP4_BASE,
.dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX,
.dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX,
.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
.ops = &omap2_mcbsp_ops, .ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk", .clk_name = "mcbsp_clk",
}, },
...@@ -258,6 +268,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { ...@@ -258,6 +268,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.phys_base = OMAP34XX_MCBSP5_BASE, .phys_base = OMAP34XX_MCBSP5_BASE,
.dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX,
.dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX,
.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
.ops = &omap2_mcbsp_ops, .ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk", .clk_name = "mcbsp_clk",
}, },
......
...@@ -266,6 +266,8 @@ ...@@ -266,6 +266,8 @@
#define INT_24XX_GPTIMER11 47 #define INT_24XX_GPTIMER11 47
#define INT_24XX_GPTIMER12 48 #define INT_24XX_GPTIMER12 48
#define INT_24XX_SHA1MD5 51 #define INT_24XX_SHA1MD5 51
#define INT_24XX_MCBSP4_IRQ_TX 54
#define INT_24XX_MCBSP4_IRQ_RX 55
#define INT_24XX_I2C1_IRQ 56 #define INT_24XX_I2C1_IRQ 56
#define INT_24XX_I2C2_IRQ 57 #define INT_24XX_I2C2_IRQ 57
#define INT_24XX_HDQ_IRQ 58 #define INT_24XX_HDQ_IRQ 58
...@@ -284,8 +286,12 @@ ...@@ -284,8 +286,12 @@
#define INT_24XX_USB_IRQ_HGEN 78 #define INT_24XX_USB_IRQ_HGEN 78
#define INT_24XX_USB_IRQ_HSOF 79 #define INT_24XX_USB_IRQ_HSOF 79
#define INT_24XX_USB_IRQ_OTG 80 #define INT_24XX_USB_IRQ_OTG 80
#define INT_24XX_MCBSP5_IRQ_TX 81
#define INT_24XX_MCBSP5_IRQ_RX 82
#define INT_24XX_MMC_IRQ 83 #define INT_24XX_MMC_IRQ 83
#define INT_24XX_MMC2_IRQ 86 #define INT_24XX_MMC2_IRQ 86
#define INT_24XX_MCBSP3_IRQ_TX 89
#define INT_24XX_MCBSP3_IRQ_RX 90
#define INT_24XX_SPI3_IRQ 91 #define INT_24XX_SPI3_IRQ 91
#define INT_243X_MCBSP2_IRQ 16 #define INT_243X_MCBSP2_IRQ 16
......
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