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linux
linux-davinci
Commits
c17e1a1c
Commit
c17e1a1c
authored
Apr 23, 2010
by
Michal Simek
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microblaze: Fix typo fault in cache code
Copy & paste error. Signed-off-by:
Michal Simek
<
monstr@monstr.eu
>
parent
f1525765
Changes
1
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1 changed file
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5 additions
and
5 deletions
+5
-5
arch/microblaze/kernel/cpu/cache.c
arch/microblaze/kernel/cpu/cache.c
+5
-5
No files found.
arch/microblaze/kernel/cpu/cache.c
View file @
c17e1a1c
...
@@ -393,7 +393,7 @@ static void __invalidate_dcache_range_wb(unsigned long start,
...
@@ -393,7 +393,7 @@ static void __invalidate_dcache_range_wb(unsigned long start,
#ifdef ASM_LOOP
#ifdef ASM_LOOP
CACHE_RANGE_LOOP_2
(
start
,
end
,
cpuinfo
.
dcache_line_length
,
wdc
.
clear
);
CACHE_RANGE_LOOP_2
(
start
,
end
,
cpuinfo
.
dcache_line_length
,
wdc
.
clear
);
#else
#else
for
(
i
=
start
;
i
<
end
;
i
+=
cpuinfo
.
i
cache_line_length
)
for
(
i
=
start
;
i
<
end
;
i
+=
cpuinfo
.
d
cache_line_length
)
__asm__
__volatile__
(
"wdc.clear %0, r0;"
\
__asm__
__volatile__
(
"wdc.clear %0, r0;"
\
:
:
"r"
(
i
));
:
:
"r"
(
i
));
#endif
#endif
...
@@ -413,7 +413,7 @@ static void __invalidate_dcache_range_nomsr_wt(unsigned long start,
...
@@ -413,7 +413,7 @@ static void __invalidate_dcache_range_nomsr_wt(unsigned long start,
#ifdef ASM_LOOP
#ifdef ASM_LOOP
CACHE_RANGE_LOOP_1
(
start
,
end
,
cpuinfo
.
dcache_line_length
,
wdc
);
CACHE_RANGE_LOOP_1
(
start
,
end
,
cpuinfo
.
dcache_line_length
,
wdc
);
#else
#else
for
(
i
=
start
;
i
<
end
;
i
+=
cpuinfo
.
i
cache_line_length
)
for
(
i
=
start
;
i
<
end
;
i
+=
cpuinfo
.
d
cache_line_length
)
__asm__
__volatile__
(
"wdc %0, r0;"
\
__asm__
__volatile__
(
"wdc %0, r0;"
\
:
:
"r"
(
i
));
:
:
"r"
(
i
));
#endif
#endif
...
@@ -437,7 +437,7 @@ static void __invalidate_dcache_range_msr_irq_wt(unsigned long start,
...
@@ -437,7 +437,7 @@ static void __invalidate_dcache_range_msr_irq_wt(unsigned long start,
#ifdef ASM_LOOP
#ifdef ASM_LOOP
CACHE_RANGE_LOOP_1
(
start
,
end
,
cpuinfo
.
dcache_line_length
,
wdc
);
CACHE_RANGE_LOOP_1
(
start
,
end
,
cpuinfo
.
dcache_line_length
,
wdc
);
#else
#else
for
(
i
=
start
;
i
<
end
;
i
+=
cpuinfo
.
i
cache_line_length
)
for
(
i
=
start
;
i
<
end
;
i
+=
cpuinfo
.
d
cache_line_length
)
__asm__
__volatile__
(
"wdc %0, r0;"
\
__asm__
__volatile__
(
"wdc %0, r0;"
\
:
:
"r"
(
i
));
:
:
"r"
(
i
));
#endif
#endif
...
@@ -465,7 +465,7 @@ static void __invalidate_dcache_range_nomsr_irq(unsigned long start,
...
@@ -465,7 +465,7 @@ static void __invalidate_dcache_range_nomsr_irq(unsigned long start,
#ifdef ASM_LOOP
#ifdef ASM_LOOP
CACHE_RANGE_LOOP_1
(
start
,
end
,
cpuinfo
.
dcache_line_length
,
wdc
);
CACHE_RANGE_LOOP_1
(
start
,
end
,
cpuinfo
.
dcache_line_length
,
wdc
);
#else
#else
for
(
i
=
start
;
i
<
end
;
i
+=
cpuinfo
.
i
cache_line_length
)
for
(
i
=
start
;
i
<
end
;
i
+=
cpuinfo
.
d
cache_line_length
)
__asm__
__volatile__
(
"wdc %0, r0;"
\
__asm__
__volatile__
(
"wdc %0, r0;"
\
:
:
"r"
(
i
));
:
:
"r"
(
i
));
#endif
#endif
...
@@ -504,7 +504,7 @@ static void __flush_dcache_range_wb(unsigned long start, unsigned long end)
...
@@ -504,7 +504,7 @@ static void __flush_dcache_range_wb(unsigned long start, unsigned long end)
#ifdef ASM_LOOP
#ifdef ASM_LOOP
CACHE_RANGE_LOOP_2
(
start
,
end
,
cpuinfo
.
dcache_line_length
,
wdc
.
flush
);
CACHE_RANGE_LOOP_2
(
start
,
end
,
cpuinfo
.
dcache_line_length
,
wdc
.
flush
);
#else
#else
for
(
i
=
start
;
i
<
end
;
i
+=
cpuinfo
.
i
cache_line_length
)
for
(
i
=
start
;
i
<
end
;
i
+=
cpuinfo
.
d
cache_line_length
)
__asm__
__volatile__
(
"wdc.flush %0, r0;"
\
__asm__
__volatile__
(
"wdc.flush %0, r0;"
\
:
:
"r"
(
i
));
:
:
"r"
(
i
));
#endif
#endif
...
...
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