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Commit bde31e2e authored by Thomas Gleixner's avatar Thomas Gleixner
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x86: Convert pci_config_lock to atomic_spinlock 

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 48c7e18d
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Showing with 22 additions and 22 deletions
arch/x86/include/asm/pci_x86.h
View file @ bde31e2e
...@@ -83,7 +83,7 @@ struct irq_routing_table { ...@@ -83,7 +83,7 @@ struct irq_routing_table {
extern unsigned int pcibios_irq_mask; extern unsigned int pcibios_irq_mask;
extern int pcibios_scanned; extern int pcibios_scanned;
extern spinlock_t pci_config_lock; extern atomic_spinlock_t pci_config_lock;
extern int (*pcibios_enable_irq)(struct pci_dev *dev); extern int (*pcibios_enable_irq)(struct pci_dev *dev);
extern void (*pcibios_disable_irq)(struct pci_dev *dev); extern void (*pcibios_disable_irq)(struct pci_dev *dev);
......
arch/x86/pci/common.c
View file @ bde31e2e
...@@ -81,7 +81,7 @@ int pcibios_scanned; ...@@ -81,7 +81,7 @@ int pcibios_scanned;
* This interrupt-safe spinlock protects all accesses to PCI * This interrupt-safe spinlock protects all accesses to PCI
* configuration space. * configuration space.
*/ */
DEFINE_SPINLOCK(pci_config_lock); DEFINE_ATOMIC_SPINLOCK(pci_config_lock);
static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d) static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
{ {
......
arch/x86/pci/direct.c
View file @ bde31e2e
...@@ -27,7 +27,7 @@ static int pci_conf1_read(unsigned int seg, unsigned int bus, ...@@ -27,7 +27,7 @@ static int pci_conf1_read(unsigned int seg, unsigned int bus,
return -EINVAL; return -EINVAL;
} }
spin_lock_irqsave(&pci_config_lock, flags); atomic_spin_lock_irqsave(&pci_config_lock, flags);
outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8);
...@@ -43,7 +43,7 @@ static int pci_conf1_read(unsigned int seg, unsigned int bus, ...@@ -43,7 +43,7 @@ static int pci_conf1_read(unsigned int seg, unsigned int bus,
break; break;
} }
spin_unlock_irqrestore(&pci_config_lock, flags); atomic_spin_unlock_irqrestore(&pci_config_lock, flags);
return 0; return 0;
} }
...@@ -56,7 +56,7 @@ static int pci_conf1_write(unsigned int seg, unsigned int bus, ...@@ -56,7 +56,7 @@ static int pci_conf1_write(unsigned int seg, unsigned int bus,
if ((bus > 255) || (devfn > 255) || (reg > 4095)) if ((bus > 255) || (devfn > 255) || (reg > 4095))
return -EINVAL; return -EINVAL;
spin_lock_irqsave(&pci_config_lock, flags); atomic_spin_lock_irqsave(&pci_config_lock, flags);
outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8);
...@@ -72,7 +72,7 @@ static int pci_conf1_write(unsigned int seg, unsigned int bus, ...@@ -72,7 +72,7 @@ static int pci_conf1_write(unsigned int seg, unsigned int bus,
break; break;
} }
spin_unlock_irqrestore(&pci_config_lock, flags); atomic_spin_unlock_irqrestore(&pci_config_lock, flags);
return 0; return 0;
} }
...@@ -108,7 +108,7 @@ static int pci_conf2_read(unsigned int seg, unsigned int bus, ...@@ -108,7 +108,7 @@ static int pci_conf2_read(unsigned int seg, unsigned int bus,
if (dev & 0x10) if (dev & 0x10)
return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_DEVICE_NOT_FOUND;
spin_lock_irqsave(&pci_config_lock, flags); atomic_spin_lock_irqsave(&pci_config_lock, flags);
outb((u8)(0xF0 | (fn << 1)), 0xCF8); outb((u8)(0xF0 | (fn << 1)), 0xCF8);
outb((u8)bus, 0xCFA); outb((u8)bus, 0xCFA);
...@@ -127,7 +127,7 @@ static int pci_conf2_read(unsigned int seg, unsigned int bus, ...@@ -127,7 +127,7 @@ static int pci_conf2_read(unsigned int seg, unsigned int bus,
outb(0, 0xCF8); outb(0, 0xCF8);
spin_unlock_irqrestore(&pci_config_lock, flags); atomic_spin_unlock_irqrestore(&pci_config_lock, flags);
return 0; return 0;
} }
...@@ -147,7 +147,7 @@ static int pci_conf2_write(unsigned int seg, unsigned int bus, ...@@ -147,7 +147,7 @@ static int pci_conf2_write(unsigned int seg, unsigned int bus,
if (dev & 0x10) if (dev & 0x10)
return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_DEVICE_NOT_FOUND;
spin_lock_irqsave(&pci_config_lock, flags); atomic_spin_lock_irqsave(&pci_config_lock, flags);
outb((u8)(0xF0 | (fn << 1)), 0xCF8); outb((u8)(0xF0 | (fn << 1)), 0xCF8);
outb((u8)bus, 0xCFA); outb((u8)bus, 0xCFA);
...@@ -166,7 +166,7 @@ static int pci_conf2_write(unsigned int seg, unsigned int bus, ...@@ -166,7 +166,7 @@ static int pci_conf2_write(unsigned int seg, unsigned int bus,
outb(0, 0xCF8); outb(0, 0xCF8);
spin_unlock_irqrestore(&pci_config_lock, flags); atomic_spin_unlock_irqrestore(&pci_config_lock, flags);
return 0; return 0;
} }
......
arch/x86/pci/mmconfig_32.c
View file @ bde31e2e
...@@ -72,7 +72,7 @@ err: *value = -1; ...@@ -72,7 +72,7 @@ err: *value = -1;
if (!base) if (!base)
goto err; goto err;
spin_lock_irqsave(&pci_config_lock, flags); atomic_spin_lock_irqsave(&pci_config_lock, flags);
pci_exp_set_dev_base(base, bus, devfn); pci_exp_set_dev_base(base, bus, devfn);
...@@ -87,7 +87,7 @@ err: *value = -1; ...@@ -87,7 +87,7 @@ err: *value = -1;
*value = mmio_config_readl(mmcfg_virt_addr + reg); *value = mmio_config_readl(mmcfg_virt_addr + reg);
break; break;
} }
spin_unlock_irqrestore(&pci_config_lock, flags); atomic_spin_unlock_irqrestore(&pci_config_lock, flags);
return 0; return 0;
} }
...@@ -105,7 +105,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus, ...@@ -105,7 +105,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
if (!base) if (!base)
return -EINVAL; return -EINVAL;
spin_lock_irqsave(&pci_config_lock, flags); atomic_spin_lock_irqsave(&pci_config_lock, flags);
pci_exp_set_dev_base(base, bus, devfn); pci_exp_set_dev_base(base, bus, devfn);
...@@ -120,7 +120,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus, ...@@ -120,7 +120,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
mmio_config_writel(mmcfg_virt_addr + reg, value); mmio_config_writel(mmcfg_virt_addr + reg, value);
break; break;
} }
spin_unlock_irqrestore(&pci_config_lock, flags); atomic_spin_unlock_irqrestore(&pci_config_lock, flags);
return 0; return 0;
} }
......
arch/x86/pci/numaq_32.c
View file @ bde31e2e
...@@ -41,7 +41,7 @@ static int pci_conf1_mq_read(unsigned int seg, unsigned int bus, ...@@ -41,7 +41,7 @@ static int pci_conf1_mq_read(unsigned int seg, unsigned int bus,
if (!value || (bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255)) if (!value || (bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255))
return -EINVAL; return -EINVAL;
spin_lock_irqsave(&pci_config_lock, flags); atomic_spin_lock_irqsave(&pci_config_lock, flags);
write_cf8(bus, devfn, reg); write_cf8(bus, devfn, reg);
...@@ -66,7 +66,7 @@ static int pci_conf1_mq_read(unsigned int seg, unsigned int bus, ...@@ -66,7 +66,7 @@ static int pci_conf1_mq_read(unsigned int seg, unsigned int bus,
break; break;
} }
spin_unlock_irqrestore(&pci_config_lock, flags); atomic_spin_unlock_irqrestore(&pci_config_lock, flags);
return 0; return 0;
} }
...@@ -80,7 +80,7 @@ static int pci_conf1_mq_write(unsigned int seg, unsigned int bus, ...@@ -80,7 +80,7 @@ static int pci_conf1_mq_write(unsigned int seg, unsigned int bus,
if ((bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255)) if ((bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255))
return -EINVAL; return -EINVAL;
spin_lock_irqsave(&pci_config_lock, flags); atomic_spin_lock_irqsave(&pci_config_lock, flags);
write_cf8(bus, devfn, reg); write_cf8(bus, devfn, reg);
...@@ -105,7 +105,7 @@ static int pci_conf1_mq_write(unsigned int seg, unsigned int bus, ...@@ -105,7 +105,7 @@ static int pci_conf1_mq_write(unsigned int seg, unsigned int bus,
break; break;
} }
spin_unlock_irqrestore(&pci_config_lock, flags); atomic_spin_unlock_irqrestore(&pci_config_lock, flags);
return 0; return 0;
} }
......
arch/x86/pci/pcbios.c
View file @ bde31e2e
...@@ -161,7 +161,7 @@ static int pci_bios_read(unsigned int seg, unsigned int bus, ...@@ -161,7 +161,7 @@ static int pci_bios_read(unsigned int seg, unsigned int bus,
if (!value || (bus > 255) || (devfn > 255) || (reg > 255)) if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
return -EINVAL; return -EINVAL;
spin_lock_irqsave(&pci_config_lock, flags); atomic_spin_lock_irqsave(&pci_config_lock, flags);
switch (len) { switch (len) {
case 1: case 1:
...@@ -212,7 +212,7 @@ static int pci_bios_read(unsigned int seg, unsigned int bus, ...@@ -212,7 +212,7 @@ static int pci_bios_read(unsigned int seg, unsigned int bus,
break; break;
} }
spin_unlock_irqrestore(&pci_config_lock, flags); atomic_spin_unlock_irqrestore(&pci_config_lock, flags);
return (int)((result & 0xff00) >> 8); return (int)((result & 0xff00) >> 8);
} }
...@@ -227,7 +227,7 @@ static int pci_bios_write(unsigned int seg, unsigned int bus, ...@@ -227,7 +227,7 @@ static int pci_bios_write(unsigned int seg, unsigned int bus,
if ((bus > 255) || (devfn > 255) || (reg > 255)) if ((bus > 255) || (devfn > 255) || (reg > 255))
return -EINVAL; return -EINVAL;
spin_lock_irqsave(&pci_config_lock, flags); atomic_spin_lock_irqsave(&pci_config_lock, flags);
switch (len) { switch (len) {
case 1: case 1:
...@@ -268,7 +268,7 @@ static int pci_bios_write(unsigned int seg, unsigned int bus, ...@@ -268,7 +268,7 @@ static int pci_bios_write(unsigned int seg, unsigned int bus,
break; break;
} }
spin_unlock_irqrestore(&pci_config_lock, flags); atomic_spin_unlock_irqrestore(&pci_config_lock, flags);
return (int)((result & 0xff00) >> 8); return (int)((result & 0xff00) >> 8);
} }
......
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