Commit bd1d5995 authored by Stephane Eranian's avatar Stephane Eranian Committed by Andi Kleen

[PATCH] x86-64: x86_64 rename X86_FEATURE_DTES to X86_FEATURE_DS

Here is a patch (used by perfmon2) that renamed X86_FEATURE_DTES
to X86_FEATURE_DS to match Intel's documentation for the Debug Store
save area. The patch also adds cpu_has_ds.

changelog:
	- rename X86_FEATURE_DTES to X86_FEATURE_DS to match documentation
	- adds cpu_has_ds to test for X86_FEATURE_DS
Signed-off-by: default avatarstephane eranian <eranian@hpl.hp.com>
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
parent 87e1652c
...@@ -29,7 +29,7 @@ ...@@ -29,7 +29,7 @@
#define X86_FEATURE_PSE36 (0*32+17) /* 36-bit PSEs */ #define X86_FEATURE_PSE36 (0*32+17) /* 36-bit PSEs */
#define X86_FEATURE_PN (0*32+18) /* Processor serial number */ #define X86_FEATURE_PN (0*32+18) /* Processor serial number */
#define X86_FEATURE_CLFLSH (0*32+19) /* Supports the CLFLUSH instruction */ #define X86_FEATURE_CLFLSH (0*32+19) /* Supports the CLFLUSH instruction */
#define X86_FEATURE_DTES (0*32+21) /* Debug Trace Store */ #define X86_FEATURE_DS (0*32+21) /* Debug Store */
#define X86_FEATURE_ACPI (0*32+22) /* ACPI via MSR */ #define X86_FEATURE_ACPI (0*32+22) /* ACPI via MSR */
#define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */ #define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */
#define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */ #define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */
...@@ -112,5 +112,6 @@ ...@@ -112,5 +112,6 @@
#define cpu_has_cyrix_arr 0 #define cpu_has_cyrix_arr 0
#define cpu_has_centaur_mcr 0 #define cpu_has_centaur_mcr 0
#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH) #define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH)
#define cpu_has_ds boot_cpu_has(X86_FEATURE_DS)
#endif /* __ASM_X8664_CPUFEATURE_H */ #endif /* __ASM_X8664_CPUFEATURE_H */
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