Commit b8d44293 authored by Cyril Chemparathy's avatar Cyril Chemparathy Committed by Kevin Hilman

Davinci: gpio - use ioremap()

This patch modifies the gpio_base definition in davinci_soc_info to be a
physical address, which is then ioremap()ed by the gpio initialization
function.
Signed-off-by: default avatarCyril Chemparathy <cyril@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent a6374f53
......@@ -1201,7 +1201,7 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
.intc_irq_num = DA830_N_CP_INTC_IRQ,
.timer_info = &da830_timer_info,
.gpio_type = GPIO_TYPE_DAVINCI,
.gpio_base = IO_ADDRESS(DA8XX_GPIO_BASE),
.gpio_base = DA8XX_GPIO_BASE,
.gpio_num = 128,
.gpio_irq = IRQ_DA8XX_GPIO0,
.serial_dev = &da8xx_serial_device,
......
......@@ -1086,7 +1086,7 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
.intc_irq_num = DA850_N_CP_INTC_IRQ,
.timer_info = &da850_timer_info,
.gpio_type = GPIO_TYPE_DAVINCI,
.gpio_base = IO_ADDRESS(DA8XX_GPIO_BASE),
.gpio_base = DA8XX_GPIO_BASE,
.gpio_num = 144,
.gpio_irq = IRQ_DA8XX_GPIO0,
.serial_dev = &da8xx_serial_device,
......
......@@ -855,7 +855,7 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm355_timer_info,
.gpio_type = GPIO_TYPE_DAVINCI,
.gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE),
.gpio_base = DAVINCI_GPIO_BASE,
.gpio_num = 104,
.gpio_irq = IRQ_DM355_GPIOBNK0,
.serial_dev = &dm355_serial_device,
......
......@@ -1060,7 +1060,7 @@ static struct davinci_soc_info davinci_soc_info_dm365 = {
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm365_timer_info,
.gpio_type = GPIO_TYPE_DAVINCI,
.gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE),
.gpio_base = DAVINCI_GPIO_BASE,
.gpio_num = 104,
.gpio_irq = IRQ_DM365_GPIO0,
.gpio_unbanked = 8, /* really 16 ... skip muxed GPIOs */
......
......@@ -746,7 +746,7 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm644x_timer_info,
.gpio_type = GPIO_TYPE_DAVINCI,
.gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE),
.gpio_base = DAVINCI_GPIO_BASE,
.gpio_num = 71,
.gpio_irq = IRQ_GPIOBNK0,
.serial_dev = &dm644x_serial_device,
......
......@@ -830,7 +830,7 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm646x_timer_info,
.gpio_type = GPIO_TYPE_DAVINCI,
.gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE),
.gpio_base = DAVINCI_GPIO_BASE,
.gpio_num = 43, /* Only 33 usable */
.gpio_irq = IRQ_DM646X_GPIOBNK0,
.serial_dev = &dm646x_serial_device,
......
......@@ -37,22 +37,22 @@ struct davinci_gpio_regs {
container_of(chip, struct davinci_gpio_controller, chip)
static struct davinci_gpio_controller chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)];
static void __iomem *gpio_base;
static struct davinci_gpio_regs __iomem __init *gpio2regs(unsigned gpio)
{
void __iomem *ptr;
void __iomem *base = davinci_soc_info.gpio_base;
if (gpio < 32 * 1)
ptr = base + 0x10;
ptr = gpio_base + 0x10;
else if (gpio < 32 * 2)
ptr = base + 0x38;
ptr = gpio_base + 0x38;
else if (gpio < 32 * 3)
ptr = base + 0x60;
ptr = gpio_base + 0x60;
else if (gpio < 32 * 4)
ptr = base + 0x88;
ptr = gpio_base + 0x88;
else if (gpio < 32 * 5)
ptr = base + 0xb0;
ptr = gpio_base + 0xb0;
else
ptr = NULL;
return ptr;
......@@ -157,6 +157,10 @@ static int __init davinci_gpio_setup(void)
if (WARN_ON(DAVINCI_N_GPIO < ngpio))
ngpio = DAVINCI_N_GPIO;
gpio_base = ioremap(soc_info->gpio_base, SZ_4K);
if (WARN_ON(!gpio_base))
return -ENOMEM;
for (i = 0, base = 0; base < ngpio; i++, base += 32) {
chips[i].chip.label = "DaVinci";
......@@ -445,7 +449,7 @@ done:
/* BINTEN -- per-bank interrupt enable. genirq would also let these
* bits be set/cleared dynamically.
*/
__raw_writel(binten, soc_info->gpio_base + 0x08);
__raw_writel(binten, gpio_base + 0x08);
printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0));
......
......@@ -60,7 +60,7 @@ struct davinci_soc_info {
unsigned long intc_irq_num;
struct davinci_timer_info *timer_info;
int gpio_type;
void __iomem *gpio_base;
u32 gpio_base;
unsigned gpio_num;
unsigned gpio_irq;
unsigned gpio_unbanked;
......
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