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Commit b6c77757 authored by Bill Pemberton's avatar Bill Pemberton Committed by Greg Kroah-Hartman
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Staging: comedi: Convert C99 style comments to traditional style comments 

Signed-off-by: default avatarBill Pemberton <wfp5p@virginia.edu>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 4dc6b15b
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Showing with 2117 additions and 2177 deletions
drivers/staging/comedi/comedi_ksyms.c
View file @ b6c77757
......@@ -31,12 +31,12 @@
/* for drivers */
EXPORT_SYMBOL(comedi_driver_register);
EXPORT_SYMBOL(comedi_driver_unregister);
//EXPORT_SYMBOL(comedi_bufcheck);
//EXPORT_SYMBOL(comedi_done);
//EXPORT_SYMBOL(comedi_error_done);
/* EXPORT_SYMBOL(comedi_bufcheck); */
/* EXPORT_SYMBOL(comedi_done); */
/* EXPORT_SYMBOL(comedi_error_done); */
EXPORT_SYMBOL(comedi_error);
//EXPORT_SYMBOL(comedi_eobuf);
//EXPORT_SYMBOL(comedi_eos);
/* EXPORT_SYMBOL(comedi_eobuf); */
/* EXPORT_SYMBOL(comedi_eos); */
EXPORT_SYMBOL(comedi_event);
EXPORT_SYMBOL(comedi_get_subdevice_runflags);
EXPORT_SYMBOL(comedi_set_subdevice_runflags);
......
drivers/staging/comedi/drivers.c
View file @ b6c77757
......@@ -140,7 +140,7 @@ int comedi_device_attach(comedi_device * dev, comedi_devconfig * it)
continue;
}
}
//initialize dev->driver here so comedi_error() can be called from attach
/* initialize dev->driver here so comedi_error() can be called from attach */
dev->driver = driv;
ret = driv->attach(dev, it);
if (ret < 0) {
......@@ -151,8 +151,8 @@ int comedi_device_attach(comedi_device * dev, comedi_devconfig * it)
goto attached;
}
// recognize has failed if we get here
// report valid board names before returning error
/* recognize has failed if we get here */
/* report valid board names before returning error */
for (driv = comedi_drivers; driv; driv = driv->next) {
if (!try_module_get(driv->module)) {
printk("comedi: failed to increment module count\n");
......@@ -299,7 +299,7 @@ static int postconfig(comedi_device * dev)
return 0;
}
// generic recognize function for drivers that register their supported board names
/* generic recognize function for drivers that register their supported board names */
void *comedi_recognize(comedi_driver * driv, const char *name)
{
unsigned i;
......@@ -426,7 +426,7 @@ int comedi_buf_alloc(comedi_device * dev, comedi_subdevice * s,
if (async->prealloc_buf && async->prealloc_bufsz == new_size) {
return 0;
}
// deallocate old buffer
/* deallocate old buffer */
if (async->prealloc_buf) {
vunmap(async->prealloc_buf);
async->prealloc_buf = NULL;
......@@ -455,7 +455,7 @@ int comedi_buf_alloc(comedi_device * dev, comedi_subdevice * s,
async->buf_page_list = NULL;
async->n_buf_pages = 0;
}
// allocate new buffer
/* allocate new buffer */
if (new_size) {
unsigned i = 0;
unsigned n_pages = new_size >> PAGE_SHIFT;
......@@ -568,7 +568,7 @@ unsigned int comedi_buf_munge(comedi_async * async, unsigned int num_bytes)
s->munge(s->device, s, async->prealloc_buf + async->munge_ptr,
block_size, async->munge_chan);
smp_wmb(); //barrier insures data is munged in buffer before munge_count is incremented
smp_wmb(); /* barrier insures data is munged in buffer before munge_count is incremented */
async->munge_chan += block_size / num_sample_bytes;
async->munge_chan %= async->cmd.chanlist_len;
......@@ -667,7 +667,7 @@ unsigned comedi_buf_read_alloc(comedi_async * async, unsigned nbytes)
/* transfers control of a chunk from reader to free buffer space */
unsigned comedi_buf_read_free(comedi_async * async, unsigned int nbytes)
{
// barrier insures data has been read out of buffer before read count is incremented
/* barrier insures data has been read out of buffer before read count is incremented */
smp_mb();
if ((int)(async->buf_read_count + nbytes -
async->buf_read_alloc_count) > 0) {
......@@ -852,9 +852,9 @@ int comedi_pci_auto_config(struct pci_dev *pcidev, const char *board_name)
{
int options[2];
// pci bus
/* pci bus */
options[0] = pcidev->bus->number;
// pci slot
/* pci slot */
options[1] = PCI_SLOT(pcidev->devfn);
return comedi_auto_config(&pcidev->dev, board_name, options, sizeof(options) / sizeof(options[0]));
......
drivers/staging/comedi/drivers/icp_multi.c
View file @ b6c77757
This diff is collapsed.
drivers/staging/comedi/drivers/icp_multi.h
View file @ b6c77757
......@@ -28,7 +28,8 @@ struct pcilst_struct {
unsigned int irq;
};
struct pcilst_struct *inova_devices; // ptr to root list of all Inova devices
struct pcilst_struct *inova_devices;
/* ptr to root list of all Inova devices */
/****************************************************************************/
......@@ -150,14 +151,14 @@ static int find_free_pci_card_by_position(unsigned short vendor_id,
&& (inova->pci_slot == pci_slot)) {
if (!(inova->used)) {
*card = inova;
return 0; // ok, card is found
return 0; /* ok, card is found */
} else {
return 2; // card exist but is used
return 2; /* card exist but is used */
}
}
}
return 1; // no card found
return 1; /* no card found */
}
/****************************************************************************/
......@@ -243,7 +244,7 @@ static struct pcilst_struct *select_and_alloc_pci_card(unsigned short vendor_id,
struct pcilst_struct *card;
int err;
if ((pci_bus < 1) & (pci_slot < 1)) { // use autodetection
if ((pci_bus < 1) & (pci_slot < 1)) { /* use autodetection */
if ((card = find_free_pci_card_by_device(vendor_id,
device_id)) == NULL) {
rt_printk(" - Unused card not found in system!\n");
......
drivers/staging/comedi/drivers/me4000.c
View file @ b6c77757
......@@ -277,7 +277,7 @@ static int me4000_attach(comedi_device * dev, comedi_devconfig * it)
s->subdev_flags =
SDF_READABLE | SDF_COMMON | SDF_GROUND | SDF_DIFF;
s->n_chan = thisboard->ai.count;
s->maxdata = 0xFFFF; // 16 bit ADC
s->maxdata = 0xFFFF; /* 16 bit ADC */
s->len_chanlist = ME4000_AI_CHANNEL_LIST_COUNT;
s->range_table = &me4000_ai_range;
s->insn_read = me4000_ai_insn_read;
......@@ -312,7 +312,7 @@ static int me4000_attach(comedi_device * dev, comedi_devconfig * it)
s->type = COMEDI_SUBD_AO;
s->subdev_flags = SDF_WRITEABLE | SDF_COMMON | SDF_GROUND;
s->n_chan = thisboard->ao.count;
s->maxdata = 0xFFFF; // 16 bit DAC
s->maxdata = 0xFFFF; /* 16 bit DAC */
s->range_table = &me4000_ao_range;
s->insn_write = me4000_ao_insn_write;
s->insn_read = me4000_ao_insn_read;
......@@ -358,7 +358,7 @@ static int me4000_attach(comedi_device * dev, comedi_devconfig * it)
s->type = COMEDI_SUBD_COUNTER;
s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
s->n_chan = thisboard->cnt.count;
s->maxdata = 0xFFFF; // 16 bit counters
s->maxdata = 0xFFFF; /* 16 bit counters */
s->insn_read = me4000_cnt_insn_read;
s->insn_write = me4000_cnt_insn_write;
s->insn_config = me4000_cnt_insn_config;
......@@ -571,8 +571,8 @@ static int init_board_info(comedi_device * dev, struct pci_dev *pci_dev_p)
CALL_PDEBUG("In init_board_info()\n");
/* Init spin locks */
//spin_lock_init(&info->preload_lock);
//spin_lock_init(&info->ai_ctrl_lock);
/* spin_lock_init(&info->preload_lock); */
/* spin_lock_init(&info->ai_ctrl_lock); */
/* Get the serial number */
result = pci_read_config_dword(pci_dev_p, 0x2C, &info->serial_no);
......@@ -605,7 +605,7 @@ static int init_ao_context(comedi_device * dev)
CALL_PDEBUG("In init_ao_context()\n");
for (i = 0; i < thisboard->ao.count; i++) {
//spin_lock_init(&info->ao_context[i].use_lock);
/* spin_lock_init(&info->ao_context[i].use_lock); */
info->ao_context[i].irq = info->irq;
switch (i) {
......@@ -1604,21 +1604,21 @@ static int me4000_ai_do_cmd_test(comedi_device * dev,
printk(KERN_ERR
"comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start arg\n",
dev->minor);
cmd->start_arg = 2000; // 66 ticks at least
cmd->start_arg = 2000; /* 66 ticks at least */
err++;
}
if (chan_ticks < ME4000_AI_MIN_TICKS) {
printk(KERN_ERR
"comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid convert arg\n",
dev->minor);
cmd->convert_arg = 2000; // 66 ticks at least
cmd->convert_arg = 2000; /* 66 ticks at least */
err++;
}
if (scan_ticks <= cmd->chanlist_len * chan_ticks) {
printk(KERN_ERR
"comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid scan end arg\n",
dev->minor);
cmd->scan_end_arg = 2000 * cmd->chanlist_len + 31; // At least one tick more
cmd->scan_end_arg = 2000 * cmd->chanlist_len + 31; /* At least one tick more */
err++;
}
} else if (cmd->start_src == TRIG_NOW &&
......@@ -1630,14 +1630,14 @@ static int me4000_ai_do_cmd_test(comedi_device * dev,
printk(KERN_ERR
"comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start arg\n",
dev->minor);
cmd->start_arg = 2000; // 66 ticks at least
cmd->start_arg = 2000; /* 66 ticks at least */
err++;
}
if (chan_ticks < ME4000_AI_MIN_TICKS) {
printk(KERN_ERR
"comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid convert arg\n",
dev->minor);
cmd->convert_arg = 2000; // 66 ticks at least
cmd->convert_arg = 2000; /* 66 ticks at least */
err++;
}
} else if (cmd->start_src == TRIG_EXT &&
......@@ -1649,21 +1649,21 @@ static int me4000_ai_do_cmd_test(comedi_device * dev,
printk(KERN_ERR
"comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start arg\n",
dev->minor);
cmd->start_arg = 2000; // 66 ticks at least
cmd->start_arg = 2000; /* 66 ticks at least */
err++;
}
if (chan_ticks < ME4000_AI_MIN_TICKS) {
printk(KERN_ERR
"comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid convert arg\n",
dev->minor);
cmd->convert_arg = 2000; // 66 ticks at least
cmd->convert_arg = 2000; /* 66 ticks at least */
err++;
}
if (scan_ticks <= cmd->chanlist_len * chan_ticks) {
printk(KERN_ERR
"comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid scan end arg\n",
dev->minor);
cmd->scan_end_arg = 2000 * cmd->chanlist_len + 31; // At least one tick more
cmd->scan_end_arg = 2000 * cmd->chanlist_len + 31; /* At least one tick more */
err++;
}
} else if (cmd->start_src == TRIG_EXT &&
......@@ -1675,14 +1675,14 @@ static int me4000_ai_do_cmd_test(comedi_device * dev,
printk(KERN_ERR
"comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start arg\n",
dev->minor);
cmd->start_arg = 2000; // 66 ticks at least
cmd->start_arg = 2000; /* 66 ticks at least */
err++;
}
if (chan_ticks < ME4000_AI_MIN_TICKS) {
printk(KERN_ERR
"comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid convert arg\n",
dev->minor);
cmd->convert_arg = 2000; // 66 ticks at least
cmd->convert_arg = 2000; /* 66 ticks at least */
err++;
}
} else if (cmd->start_src == TRIG_EXT &&
......@@ -1694,14 +1694,14 @@ static int me4000_ai_do_cmd_test(comedi_device * dev,
printk(KERN_ERR
"comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start arg\n",
dev->minor);
cmd->start_arg = 2000; // 66 ticks at least
cmd->start_arg = 2000; /* 66 ticks at least */
err++;
}
if (chan_ticks < ME4000_AI_MIN_TICKS) {
printk(KERN_ERR
"comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid convert arg\n",
dev->minor);
cmd->convert_arg = 2000; // 66 ticks at least
cmd->convert_arg = 2000; /* 66 ticks at least */
err++;
}
} else if (cmd->start_src == TRIG_EXT &&
......@@ -1713,7 +1713,7 @@ static int me4000_ai_do_cmd_test(comedi_device * dev,
printk(KERN_ERR
"comedi%d: me4000: me4000_ai_do_cmd_test(): Invalid start arg\n",
dev->minor);
cmd->start_arg = 2000; // 66 ticks at least
cmd->start_arg = 2000; /* 66 ticks at least */
err++;
}
}
......
drivers/staging/comedi/drivers/me4000.h
View file @ b6c77757
This diff is collapsed.
drivers/staging/comedi/drivers/mite.c
View file @ b6c77757
......@@ -47,7 +47,7 @@
*/
//#define USE_KMALLOC
/* #define USE_KMALLOC */
#include "mite.h"
......@@ -139,7 +139,7 @@ int mite_setup2(struct mite_struct *mite, unsigned use_iodwbsr_1)
addr = pci_resource_start(mite->pcidev, 1);
mite->daq_phys_addr = addr;
length = pci_resource_len(mite->pcidev, 1);
// In case of a 660x board, DAQ size is 8k instead of 4k (see as shown by lspci output)
/* In case of a 660x board, DAQ size is 8k instead of 4k (see as shown by lspci output) */
mite->daq_io_addr = ioremap(mite->daq_phys_addr, length);
if (!mite->daq_io_addr) {
printk("failed to remap daq io memory address\n");
......@@ -212,7 +212,7 @@ void mite_cleanup(void)
void mite_unsetup(struct mite_struct *mite)
{
//unsigned long offset, start, length;
/* unsigned long offset, start, length; */
if (!mite)
return;
......@@ -257,7 +257,7 @@ struct mite_channel *mite_request_channel_in_range(struct mite_struct *mite,
unsigned long flags;
struct mite_channel *channel = NULL;
// spin lock so mite_release_channel can be called safely from interrupts
/* spin lock so mite_release_channel can be called safely from interrupts */
comedi_spin_lock_irqsave(&mite->lock, flags);
for (i = min_channel; i <= max_channel; ++i) {
if (mite->channel_allocated[i] == 0) {
......@@ -276,7 +276,7 @@ void mite_release_channel(struct mite_channel *mite_chan)
struct mite_struct *mite = mite_chan->mite;
unsigned long flags;
// spin lock to prevent races with mite_request_channel
/* spin lock to prevent races with mite_request_channel */
comedi_spin_lock_irqsave(&mite->lock, flags);
if (mite->channel_allocated[mite_chan->channel]) {
mite_dma_disarm(mite_chan);
......@@ -312,7 +312,7 @@ void mite_dma_arm(struct mite_channel *mite_chan)
writel(chor, mite->mite_io_addr + MITE_CHOR(mite_chan->channel));
mmiowb();
comedi_spin_unlock_irqrestore(&mite->lock, flags);
// mite_dma_tcr(mite, channel);
/* mite_dma_tcr(mite, channel); */
}
/**************************************/
......@@ -466,7 +466,7 @@ u32 mite_bytes_in_transit(struct mite_channel * mite_chan)
MITE_FCR(mite_chan->channel)) & 0x000000FF;
}
// returns lower bound for number of bytes transferred from device to memory
/* returns lower bound for number of bytes transferred from device to memory */
u32 mite_bytes_written_to_memory_lb(struct mite_channel * mite_chan)
{
u32 device_byte_count;
......@@ -475,7 +475,7 @@ u32 mite_bytes_written_to_memory_lb(struct mite_channel * mite_chan)
return device_byte_count - mite_bytes_in_transit(mite_chan);
}
// returns upper bound for number of bytes transferred from device to memory
/* returns upper bound for number of bytes transferred from device to memory */
u32 mite_bytes_written_to_memory_ub(struct mite_channel * mite_chan)
{
u32 in_transit_count;
......@@ -484,7 +484,7 @@ u32 mite_bytes_written_to_memory_ub(struct mite_channel * mite_chan)
return mite_device_bytes_transferred(mite_chan) - in_transit_count;
}
// returns lower bound for number of bytes read from memory for transfer to device
/* returns lower bound for number of bytes read from memory for transfer to device */
u32 mite_bytes_read_from_memory_lb(struct mite_channel * mite_chan)
{
u32 device_byte_count;
......@@ -493,7 +493,7 @@ u32 mite_bytes_read_from_memory_lb(struct mite_channel * mite_chan)
return device_byte_count + mite_bytes_in_transit(mite_chan);
}
// returns upper bound for number of bytes read from memory for transfer to device
/* returns upper bound for number of bytes read from memory for transfer to device */
u32 mite_bytes_read_from_memory_ub(struct mite_channel * mite_chan)
{
u32 in_transit_count;
......@@ -533,7 +533,7 @@ int mite_sync_input_dma(struct mite_channel *mite_chan, comedi_async * async)
const unsigned bytes_per_scan = cfc_bytes_per_scan(async->subdevice);
old_alloc_count = async->buf_write_alloc_count;
// write alloc as much as we can
/* write alloc as much as we can */
comedi_buf_write_alloc(async, async->prealloc_bufsz);
nbytes = mite_bytes_written_to_memory_lb(mite_chan);
......@@ -570,7 +570,7 @@ int mite_sync_output_dma(struct mite_channel *mite_chan, comedi_async * async)
async->cmd.stop_arg * cfc_bytes_per_scan(async->subdevice);
old_alloc_count = async->buf_read_alloc_count;
// read alloc as much as we can
/* read alloc as much as we can */
comedi_buf_read_alloc(async, async->prealloc_bufsz);
nbytes_lb = mite_bytes_read_from_memory_lb(mite_chan);
if (async->cmd.stop_src == TRIG_COUNT &&
......
drivers/staging/comedi/drivers/mite.h
View file @ b6c77757
......@@ -29,7 +29,7 @@
#define PCI_VENDOR_ID_NATINST 0x1093
// #define DEBUG_MITE
/* #define DEBUG_MITE */
#define PCIMIO_COMPAT
#ifdef DEBUG_MITE
......@@ -179,83 +179,83 @@ enum mite_registers {
written and read back. The bits 0x1f always read as 1.
The rest always read as zero. */
MITE_UNKNOWN_DMA_BURST_REG = 0x28,
MITE_IODWBSR = 0xc0, //IO Device Window Base Size Register
MITE_IODWBSR_1 = 0xc4, // IO Device Window Base Size Register 1
MITE_IODWBSR = 0xc0, /* IO Device Window Base Size Register */
MITE_IODWBSR_1 = 0xc4, /* IO Device Window Base Size Register 1 */
MITE_IODWCR_1 = 0xf4,
MITE_PCI_CONFIG_OFFSET = 0x300,
MITE_CSIGR = 0x460 //chip signature
MITE_CSIGR = 0x460 /* chip signature */
};
static inline int MITE_CHOR(int channel) // channel operation
static inline int MITE_CHOR(int channel) /* channel operation */
{
return CHAN_OFFSET(channel) + 0x0;
};
static inline int MITE_CHCR(int channel) // channel control
static inline int MITE_CHCR(int channel) /* channel control */
{
return CHAN_OFFSET(channel) + 0x4;
};
static inline int MITE_TCR(int channel) // transfer count
static inline int MITE_TCR(int channel) /* transfer count */
{
return CHAN_OFFSET(channel) + 0x8;
};
static inline int MITE_MCR(int channel) // memory configuration
static inline int MITE_MCR(int channel) /* memory configuration */
{
return CHAN_OFFSET(channel) + 0xc;
};
static inline int MITE_MAR(int channel) // memory address
static inline int MITE_MAR(int channel) /* memory address */
{
return CHAN_OFFSET(channel) + 0x10;
};
static inline int MITE_DCR(int channel) // device configuration
static inline int MITE_DCR(int channel) /* device configuration */
{
return CHAN_OFFSET(channel) + 0x14;
};
static inline int MITE_DAR(int channel) // device address
static inline int MITE_DAR(int channel) /* device address */
{
return CHAN_OFFSET(channel) + 0x18;
};
static inline int MITE_LKCR(int channel) // link configuration
static inline int MITE_LKCR(int channel) /* link configuration */
{
return CHAN_OFFSET(channel) + 0x1c;
};
static inline int MITE_LKAR(int channel) // link address
static inline int MITE_LKAR(int channel) /* link address */
{
return CHAN_OFFSET(channel) + 0x20;
};
static inline int MITE_LLKAR(int channel) // see mite section of tnt5002 manual
static inline int MITE_LLKAR(int channel) /* see mite section of tnt5002 manual */
{
return CHAN_OFFSET(channel) + 0x24;
};
static inline int MITE_BAR(int channel) // base address
static inline int MITE_BAR(int channel) /* base address */
{
return CHAN_OFFSET(channel) + 0x28;
};
static inline int MITE_BCR(int channel) // base count
static inline int MITE_BCR(int channel) /* base count */
{
return CHAN_OFFSET(channel) + 0x2c;
};
static inline int MITE_SAR(int channel) // ? address
static inline int MITE_SAR(int channel) /* ? address */
{
return CHAN_OFFSET(channel) + 0x30;
};
static inline int MITE_WSCR(int channel) // ?
static inline int MITE_WSCR(int channel) /* ? */
{
return CHAN_OFFSET(channel) + 0x34;
};
static inline int MITE_WSER(int channel) // ?
static inline int MITE_WSER(int channel) /* ? */
{
return CHAN_OFFSET(channel) + 0x38;
};
static inline int MITE_CHSR(int channel) // channel status
static inline int MITE_CHSR(int channel) /* channel status */
{
return CHAN_OFFSET(channel) + 0x3c;
};
static inline int MITE_FCR(int channel) // fifo count
static inline int MITE_FCR(int channel) /* fifo count */
{
return CHAN_OFFSET(channel) + 0x40;
};
enum MITE_IODWBSR_bits {
WENAB = 0x80, // window enable
WENAB = 0x80, /* window enable */
};
static inline unsigned MITE_IODWBSR_1_WSIZE_bits(unsigned size)
......@@ -276,23 +276,23 @@ static inline int mite_csigr_version(u32 csigr_bits)
return csigr_bits & 0xf;
};
static inline int mite_csigr_type(u32 csigr_bits)
{ // original mite = 0, minimite = 1
{ /* original mite = 0, minimite = 1 */
return (csigr_bits >> 4) & 0xf;
};
static inline int mite_csigr_mmode(u32 csigr_bits)
{ // mite mode, minimite = 1
{ /* mite mode, minimite = 1 */
return (csigr_bits >> 8) & 0x3;
};
static inline int mite_csigr_imode(u32 csigr_bits)
{ // cpu port interface mode, pci = 0x3
{ /* cpu port interface mode, pci = 0x3 */
return (csigr_bits >> 12) & 0x3;
};
static inline int mite_csigr_dmac(u32 csigr_bits)
{ // number of dma channels
{ /* number of dma channels */
return (csigr_bits >> 16) & 0xf;
};
static inline int mite_csigr_wpdep(u32 csigr_bits)
{ // write post fifo depth
{ /* write post fifo depth */
unsigned int wpdep_bits = (csigr_bits >> 20) & 0x7;
if (wpdep_bits == 0)
return 0;
......@@ -304,7 +304,7 @@ static inline int mite_csigr_wins(u32 csigr_bits)
return (csigr_bits >> 24) & 0x1f;
};
static inline int mite_csigr_iowins(u32 csigr_bits)
{ // number of io windows
{ /* number of io windows */
return (csigr_bits >> 29) & 0x7;
};
......
drivers/staging/comedi/drivers/plx9080.h
View file @ b6c77757
......@@ -27,7 +27,7 @@
#ifndef __COMEDI_PLX9080_H
#define __COMEDI_PLX9080_H
// descriptor block used for chained dma transfers
/* descriptor block used for chained dma transfers */
struct plx_dma_desc {
volatile uint32_t pci_start_addr;
volatile uint32_t local_start_addr;
......@@ -52,14 +52,14 @@ struct plx_dma_desc {
#define LRNG_ANY32 0x00000000 /* Locate anywhere in 32 bit */
#define LRNG_LT1MB 0x00000002 /* Locate in 1st meg */
#define LRNG_ANY64 0x00000004 /* Locate anywhere in 64 bit */
#define LRNG_MEM_MASK 0xfffffff0 // bits that specify range for memory io
#define LRNG_IO_MASK 0xfffffffa // bits that specify range for normal io
#define LRNG_MEM_MASK 0xfffffff0 /* bits that specify range for memory io */
#define LRNG_IO_MASK 0xfffffffa /* bits that specify range for normal io */
#define PLX_LAS0MAP_REG 0x0004 /* L, Local Addr Space 0 Remap Register */
#define PLX_LAS1MAP_REG 0x00f4 /* L, Local Addr Space 1 Remap Register */
#define LMAP_EN 0x00000001 /* Enable slave decode */
#define LMAP_MEM_MASK 0xfffffff0 // bits that specify decode for memory io
#define LMAP_IO_MASK 0xfffffffa // bits that specify decode bits for normal io
#define LMAP_MEM_MASK 0xfffffff0 /* bits that specify decode for memory io */
#define LMAP_IO_MASK 0xfffffffa /* bits that specify decode bits for normal io */
/* Mode/Arbitration Register.
*/
......@@ -169,7 +169,7 @@ enum bigend_bits {
#define ICS_AERR 0x00000001 /* Assert LSERR on ABORT */
#define ICS_PERR 0x00000002 /* Assert LSERR on Parity Error */
#define ICS_SERR 0x00000004 /* Generate PCI SERR# */
#define ICS_MBIE 0x00000008 // mailbox interrupt enable
#define ICS_MBIE 0x00000008 /* mailbox interrupt enable */
#define ICS_PIE 0x00000100 /* PCI Interrupt Enable */
#define ICS_PDIE 0x00000200 /* PCI Doorbell Interrupt Enable */
#define ICS_PAIE 0x00000400 /* PCI Abort Interrupt Enable */
......@@ -190,7 +190,7 @@ enum bigend_bits {
#define ICS_TA_DMA0 0x02000000 /* Target Abort - DMA #0 */
#define ICS_TA_DMA1 0x04000000 /* Target Abort - DMA #1 */
#define ICS_TA_RA 0x08000000 /* Target Abort - Retry Timeout */
#define ICS_MBIA(x) (0x10000000 << ((x) & 0x3)) // mailbox x is active
#define ICS_MBIA(x) (0x10000000 << ((x) & 0x3)) /* mailbox x is active */
#define PLX_CONTROL_REG 0x006C /* L, EEPROM Cntl & PCI Cmd Codes */
#define CTL_RDMA 0x0000000E /* DMA Read Command */
......@@ -208,51 +208,51 @@ enum bigend_bits {
#define CTL_RESET 0x40000000 /* !! Adapter Reset !! */
#define CTL_READY 0x80000000 /* Local Init Done */
#define PLX_ID_REG 0x70 // hard-coded plx vendor and device ids
#define PLX_ID_REG 0x70 /* hard-coded plx vendor and device ids */
#define PLX_REVISION_REG 0x74 // silicon revision
#define PLX_REVISION_REG 0x74 /* silicon revision */
#define PLX_DMA0_MODE_REG 0x80 // dma channel 0 mode register
#define PLX_DMA1_MODE_REG 0x94 // dma channel 0 mode register
#define PLX_DMA0_MODE_REG 0x80 /* dma channel 0 mode register */
#define PLX_DMA1_MODE_REG 0x94 /* dma channel 0 mode register */
#define PLX_LOCAL_BUS_16_WIDE_BITS 0x1
#define PLX_LOCAL_BUS_32_WIDE_BITS 0x3
#define PLX_LOCAL_BUS_WIDTH_MASK 0x3
#define PLX_DMA_EN_READYIN_BIT 0x40 // enable ready in input
#define PLX_EN_BTERM_BIT 0x80 // enable BTERM# input
#define PLX_DMA_LOCAL_BURST_EN_BIT 0x100 // enable local burst mode
#define PLX_EN_CHAIN_BIT 0x200 // enables chaining
#define PLX_EN_DMA_DONE_INTR_BIT 0x400 // enables interrupt on dma done
#define PLX_LOCAL_ADDR_CONST_BIT 0x800 // hold local address constant (don't increment)
#define PLX_DEMAND_MODE_BIT 0x1000 // enables demand-mode for dma transfer
#define PLX_DMA_EN_READYIN_BIT 0x40 /* enable ready in input */
#define PLX_EN_BTERM_BIT 0x80 /* enable BTERM# input */
#define PLX_DMA_LOCAL_BURST_EN_BIT 0x100 /* enable local burst mode */
#define PLX_EN_CHAIN_BIT 0x200 /* enables chaining */
#define PLX_EN_DMA_DONE_INTR_BIT 0x400 /* enables interrupt on dma done */
#define PLX_LOCAL_ADDR_CONST_BIT 0x800 /* hold local address constant (don't increment) */
#define PLX_DEMAND_MODE_BIT 0x1000 /* enables demand-mode for dma transfer */
#define PLX_EOT_ENABLE_BIT 0x4000
#define PLX_STOP_MODE_BIT 0x8000
#define PLX_DMA_INTR_PCI_BIT 0x20000 // routes dma interrupt to pci bus (instead of local bus)
#define PLX_DMA_INTR_PCI_BIT 0x20000 /* routes dma interrupt to pci bus (instead of local bus) */
#define PLX_DMA0_PCI_ADDRESS_REG 0x84 // pci address that dma transfers start at
#define PLX_DMA0_PCI_ADDRESS_REG 0x84 /* pci address that dma transfers start at */
#define PLX_DMA1_PCI_ADDRESS_REG 0x98
#define PLX_DMA0_LOCAL_ADDRESS_REG 0x88 // local address that dma transfers start at
#define PLX_DMA0_LOCAL_ADDRESS_REG 0x88 /* local address that dma transfers start at */
#define PLX_DMA1_LOCAL_ADDRESS_REG 0x9c
#define PLX_DMA0_TRANSFER_SIZE_REG 0x8c // number of bytes to transfer (first 23 bits)
#define PLX_DMA0_TRANSFER_SIZE_REG 0x8c /* number of bytes to transfer (first 23 bits) */
#define PLX_DMA1_TRANSFER_SIZE_REG 0xa0
#define PLX_DMA0_DESCRIPTOR_REG 0x90 // descriptor pointer register
#define PLX_DMA0_DESCRIPTOR_REG 0x90 /* descriptor pointer register */
#define PLX_DMA1_DESCRIPTOR_REG 0xa4
#define PLX_DESC_IN_PCI_BIT 0x1 // descriptor is located in pci space (not local space)
#define PLX_END_OF_CHAIN_BIT 0x2 // end of chain bit
#define PLX_INTR_TERM_COUNT 0x4 // interrupt when this descriptor's transfer is finished
#define PLX_XFER_LOCAL_TO_PCI 0x8 // transfer from local to pci bus (not pci to local)
#define PLX_DESC_IN_PCI_BIT 0x1 /* descriptor is located in pci space (not local space) */
#define PLX_END_OF_CHAIN_BIT 0x2 /* end of chain bit */
#define PLX_INTR_TERM_COUNT 0x4 /* interrupt when this descriptor's transfer is finished */
#define PLX_XFER_LOCAL_TO_PCI 0x8 /* transfer from local to pci bus (not pci to local) */
#define PLX_DMA0_CS_REG 0xa8 // command status register
#define PLX_DMA0_CS_REG 0xa8 /* command status register */
#define PLX_DMA1_CS_REG 0xa9
#define PLX_DMA_EN_BIT 0x1 // enable dma channel
#define PLX_DMA_START_BIT 0x2 // start dma transfer
#define PLX_DMA_ABORT_BIT 0x4 // abort dma transfer
#define PLX_CLEAR_DMA_INTR_BIT 0x8 // clear dma interrupt
#define PLX_DMA_DONE_BIT 0x10 // transfer done status bit
#define PLX_DMA_EN_BIT 0x1 /* enable dma channel */
#define PLX_DMA_START_BIT 0x2 /* start dma transfer */
#define PLX_DMA_ABORT_BIT 0x4 /* abort dma transfer */
#define PLX_CLEAR_DMA_INTR_BIT 0x8 /* clear dma interrupt */
#define PLX_DMA_DONE_BIT 0x10 /* transfer done status bit */
#define PLX_DMA0_THRESHOLD_REG 0xb0 // command status register
#define PLX_DMA0_THRESHOLD_REG 0xb0 /* command status register */
/*
* Accesses near the end of memory can cause the PLX chip
......@@ -392,12 +392,12 @@ static inline int plx9080_abort_dma(void *iobase, unsigned int channel)
else
dma_cs_addr = iobase + PLX_DMA0_CS_REG;
// abort dma transfer if necessary
/* abort dma transfer if necessary */
dma_status = readb(dma_cs_addr);
if ((dma_status & PLX_DMA_EN_BIT) == 0) {
return 0;
}
// wait to make sure done bit is zero
/* wait to make sure done bit is zero */
for (i = 0; (dma_status & PLX_DMA_DONE_BIT) && i < timeout; i++) {
comedi_udelay(1);
dma_status = readb(dma_cs_addr);
......@@ -408,9 +408,9 @@ static inline int plx9080_abort_dma(void *iobase, unsigned int channel)
channel);
return -ETIMEDOUT;
}
// disable and abort channel
/* disable and abort channel */
writeb(PLX_DMA_ABORT_BIT, dma_cs_addr);
// wait for dma done bit
/* wait for dma done bit */
dma_status = readb(dma_cs_addr);
for (i = 0; (dma_status & PLX_DMA_DONE_BIT) == 0 && i < timeout; i++) {
comedi_udelay(1);
......
drivers/staging/comedi/drivers/rtd520.c
View file @ b6c77757
......@@ -704,7 +704,7 @@ static int rtd_ai_cmdtest(comedi_device * dev, comedi_subdevice * s,
comedi_cmd * cmd);
static int rtd_ai_cmd(comedi_device * dev, comedi_subdevice * s);
static int rtd_ai_cancel(comedi_device * dev, comedi_subdevice * s);
//static int rtd_ai_poll (comedi_device *dev,comedi_subdevice *s);
/* static int rtd_ai_poll (comedi_device *dev,comedi_subdevice *s); */
static int rtd_ns_to_timer(unsigned int *ns, int roundMode);
static irqreturn_t rtd_interrupt(int irq, void *d PT_REGS_ARG);
static int rtd520_probe_fifo_depth(comedi_device *dev);
......@@ -866,7 +866,7 @@ static int rtd_attach(comedi_device * dev, comedi_devconfig * it)
s->do_cmd = rtd_ai_cmd;
s->do_cmdtest = rtd_ai_cmdtest;
s->cancel = rtd_ai_cancel;
/*s->poll = rtd_ai_poll; *//* not ready yet */
/* s->poll = rtd_ai_poll; */ /* not ready yet */
s = dev->subdevices + 1;
/* analog output subdevice */
......@@ -1005,7 +1005,7 @@ static int rtd_attach(comedi_device * dev, comedi_devconfig * it)
#if 0
/* hit an error, clean up memory and return ret */
//rtd_attach_die_error:
/* rtd_attach_die_error: */
#ifdef USE_DMA
for (index = 0; index < DMA_CHAIN_COUNT; index++) {
if (NULL != devpriv->dma0Buff[index]) { /* free buffer memory */
......@@ -1377,15 +1377,15 @@ void abort_dma(comedi_device * dev, unsigned int channel)
unsigned long dma_cs_addr; /* the control/status register */
uint8_t status;
unsigned int ii;
//unsigned long flags;
/* unsigned long flags; */
dma_cs_addr = (unsigned long)devpriv->lcfg
+ ((channel == 0) ? LCFG_DMACSR0 : LCFG_DMACSR1);
// spinlock for plx dma control/status reg
//comedi_spin_lock_irqsave( &dev->spinlock, flags );
/* spinlock for plx dma control/status reg */
/* comedi_spin_lock_irqsave( &dev->spinlock, flags ); */
// abort dma transfer if necessary
/* abort dma transfer if necessary */
status = readb(dma_cs_addr);
if ((status & PLX_DMA_EN_BIT) == 0) { /* not enabled (Error?) */
DPRINTK("rtd520: AbortDma on non-active channel %d (0x%x)\n",
......@@ -1410,7 +1410,7 @@ void abort_dma(comedi_device * dev, unsigned int channel)
/* set abort bit for channel */
writeb(PLX_DMA_ABORT_BIT, dma_cs_addr);
// wait for dma done bit to be set
/* wait for dma done bit to be set */
status = readb(dma_cs_addr);
for (ii = 0;
(status & PLX_DMA_DONE_BIT) == 0 && ii < RTD_DMA_TIMEOUT;
......@@ -1424,7 +1424,7 @@ void abort_dma(comedi_device * dev, unsigned int channel)
}
abortDmaExit:
//comedi_spin_unlock_irqrestore( &dev->spinlock, flags );
/* comedi_spin_unlock_irqrestore( &dev->spinlock, flags ); */
}
/*
......
drivers/staging/comedi/drivers/rtd520.h
View file @ b6c77757
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drivers/staging/comedi/drivers/s626.c
View file @ b6c77757
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drivers/staging/comedi/drivers/s626.h
View file @ b6c77757
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drivers/staging/comedi/pci_ids.h
View file @ b6c77757
......@@ -28,4 +28,4 @@
#define PCI_DEVICE_ID_QUANCOM_GPIB 0x3302
#endif
#endif // __COMPAT_LINUX_PCI_IDS_H
#endif /* __COMPAT_LINUX_PCI_IDS_H */
drivers/staging/comedi/proc.c
View file @ b6c77757
......@@ -31,7 +31,7 @@
#define __NO_VERSION__
#include "comedidev.h"
#include <linux/proc_fs.h>
//#include <linux/string.h>
/* #include <linux/string.h> */
int comedi_read_procmem(char *buf, char **start, off_t offset, int len,
int *eof, void *data);
......
drivers/staging/comedi/range.c
View file @ b6c77757
......@@ -88,7 +88,7 @@ static int aref_invalid(comedi_subdevice * s, unsigned int chanspec)
{
unsigned int aref;
// disable reporting invalid arefs... maybe someday
/* disable reporting invalid arefs... maybe someday */
return 0;
aref = CR_AREF(chanspec);
......
drivers/staging/comedi/rt.c
View file @ b6c77757
......@@ -78,7 +78,7 @@ int comedi_request_irq(unsigned irq, irqreturn_t(*handler) (int,
ret = request_irq(irq, handler, unshared_flags, device, dev_id);
if (ret < 0) {
// we failed, so fall back on allowing shared interrupt (which we won't ever make RT)
/* we failed, so fall back on allowing shared interrupt (which we won't ever make RT) */
if (flags & IRQF_SHARED) {
rt_printk
("comedi: cannot get unshared interrupt, will not use RT interrupts.\n");
......@@ -192,7 +192,7 @@ static void handle_void_irq(int irq)
return;
}
it->handler(irq, it->dev_id PT_REGS_NULL);
rt_enable_irq(irq); //needed by rtai-adeos, seems like it shouldn't hurt earlier versions
rt_enable_irq(irq); /* needed by rtai-adeos, seems like it shouldn't hurt earlier versions */
}
DECLARE_VOID_IRQ(0);
......@@ -402,11 +402,11 @@ static int comedi_rt_release_irq(struct comedi_irq_struct *it)
void comedi_rt_init(void)
{
//rt_pend_tq_init();
/* rt_pend_tq_init(); */
}
void comedi_rt_cleanup(void)
{
//rt_pend_tq_cleanup();
/* rt_pend_tq_cleanup(); */
}
#endif
drivers/staging/comedi/rt_pend_tq.c
View file @ b6c77757
......@@ -3,7 +3,7 @@
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include "comedidev.h" // for rt spinlocks
#include "comedidev.h" /* for rt spinlocks */
#include "rt_pend_tq.h"
#ifdef CONFIG_COMEDI_RTAI
#include <rtai.h>
......@@ -27,7 +27,7 @@ volatile static struct rt_pend_tq *volatile rt_pend_head = rt_pend_tq,
int rt_pend_tq_irq = 0;
DEFINE_SPINLOCK(rt_pend_tq_lock);
// WARNING: following code not checked against race conditions yet.
/* WARNING: following code not checked against race conditions yet. */
#define INC_CIRCULAR_PTR(ptr,begin,size) do {if(++(ptr)>=(begin)+(size)) (ptr)=(begin); } while(0)
#define DEC_CIRCULAR_PTR(ptr,begin,size) do {if(--(ptr)<(begin)) (ptr)=(begin)+(size)-1; } while(0)
......@@ -42,7 +42,7 @@ int rt_pend_call(void (*func) (int arg1, void *arg2), int arg1, void *arg2)
comedi_spin_lock_irqsave(&rt_pend_tq_lock, flags);
INC_CIRCULAR_PTR(rt_pend_head, rt_pend_tq, RT_PEND_TQ_SIZE);
if (rt_pend_head == rt_pend_tail) {
// overflow, we just refuse to take this request
/* overflow, we just refuse to take this request */
DEC_CIRCULAR_PTR(rt_pend_head, rt_pend_tq, RT_PEND_TQ_SIZE);
comedi_spin_unlock_irqrestore(&rt_pend_tq_lock, flags);
return -EAGAIN;
......
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