Commit b1c54fe2 authored by Hartmut Hackmann's avatar Hartmut Hackmann Committed by Mauro Carvalho Chehab

V4L/DVB (7655): tda10086 coding stlye fixes

This patch replaces the c++ style comments.
No functional changes
Signed-off-by: default avatarHartmut Hackmann <hartmut.hackmann@t-online.de>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@infradead.org>
parent 9a1b04e4
......@@ -90,16 +90,16 @@ static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask,
{
int val;
// read a byte and check
/* read a byte and check */
val = tda10086_read_byte(state, reg);
if (val < 0)
return val;
// mask if off
/* mask if off */
val = val & ~mask;
val |= data & 0xff;
// write it out again
/* write it out again */
return tda10086_write_byte(state, reg, val);
}
......@@ -112,63 +112,63 @@ static int tda10086_init(struct dvb_frontend* fe)
if (state->config->diseqc_tone)
t22k_off = 0;
// reset
/* reset */
tda10086_write_byte(state, 0x00, 0x00);
msleep(10);
// misc setup
/* misc setup */
tda10086_write_byte(state, 0x01, 0x94);
tda10086_write_byte(state, 0x02, 0x35); // NOTE: TT drivers appear to disable CSWP
tda10086_write_byte(state, 0x02, 0x35); /* NOTE: TT drivers appear to disable CSWP */
tda10086_write_byte(state, 0x03, 0xe4);
tda10086_write_byte(state, 0x04, 0x43);
tda10086_write_byte(state, 0x0c, 0x0c);
tda10086_write_byte(state, 0x1b, 0xb0); // noise threshold
tda10086_write_byte(state, 0x20, 0x89); // misc
tda10086_write_byte(state, 0x30, 0x04); // acquisition period length
tda10086_write_byte(state, 0x32, 0x00); // irq off
tda10086_write_byte(state, 0x31, 0x56); // setup AFC
// setup PLL (this assumes SACLK = 96MHz)
tda10086_write_byte(state, 0x55, 0x2c); // misc PLL setup
tda10086_write_byte(state, 0x1b, 0xb0); /* noise threshold */
tda10086_write_byte(state, 0x20, 0x89); /* misc */
tda10086_write_byte(state, 0x30, 0x04); /* acquisition period length */
tda10086_write_byte(state, 0x32, 0x00); /* irq off */
tda10086_write_byte(state, 0x31, 0x56); /* setup AFC */
/* setup PLL (this assumes SACLK = 96MHz) */
tda10086_write_byte(state, 0x55, 0x2c); /* misc PLL setup */
if (state->config->xtal_freq == TDA10086_XTAL_16M) {
tda10086_write_byte(state, 0x3a, 0x0b); // M=12
tda10086_write_byte(state, 0x3b, 0x01); // P=2
tda10086_write_byte(state, 0x3a, 0x0b); /* M=12 */
tda10086_write_byte(state, 0x3b, 0x01); /* P=2 */
} else {
tda10086_write_byte(state, 0x3a, 0x17); // M=24
tda10086_write_byte(state, 0x3b, 0x00); // P=1
tda10086_write_byte(state, 0x3a, 0x17); /* M=24 */
tda10086_write_byte(state, 0x3b, 0x00); /* P=1 */
}
tda10086_write_mask(state, 0x55, 0x20, 0x00); // powerup PLL
tda10086_write_mask(state, 0x55, 0x20, 0x00); /* powerup PLL */
// setup TS interface
/* setup TS interface */
tda10086_write_byte(state, 0x11, 0x81);
tda10086_write_byte(state, 0x12, 0x81);
tda10086_write_byte(state, 0x19, 0x40); // parallel mode A + MSBFIRST
tda10086_write_byte(state, 0x56, 0x80); // powerdown WPLL - unused in the mode we use
tda10086_write_byte(state, 0x57, 0x08); // bypass WPLL - unused in the mode we use
tda10086_write_byte(state, 0x19, 0x40); /* parallel mode A + MSBFIRST */
tda10086_write_byte(state, 0x56, 0x80); /* powerdown WPLL - unused in the mode we use */
tda10086_write_byte(state, 0x57, 0x08); /* bypass WPLL - unused in the mode we use */
tda10086_write_byte(state, 0x10, 0x2a);
// setup ADC
tda10086_write_byte(state, 0x58, 0x61); // ADC setup
tda10086_write_mask(state, 0x58, 0x01, 0x00); // powerup ADC
/* setup ADC */
tda10086_write_byte(state, 0x58, 0x61); /* ADC setup */
tda10086_write_mask(state, 0x58, 0x01, 0x00); /* powerup ADC */
// setup AGC
/* setup AGC */
tda10086_write_byte(state, 0x05, 0x0B);
tda10086_write_byte(state, 0x37, 0x63);
tda10086_write_byte(state, 0x3f, 0x0a); // NOTE: flydvb varies it
tda10086_write_byte(state, 0x3f, 0x0a); /* NOTE: flydvb varies it */
tda10086_write_byte(state, 0x40, 0x64);
tda10086_write_byte(state, 0x41, 0x4f);
tda10086_write_byte(state, 0x42, 0x43);
// setup viterbi
tda10086_write_byte(state, 0x1a, 0x11); // VBER 10^6, DVB, QPSK
/* setup viterbi */
tda10086_write_byte(state, 0x1a, 0x11); /* VBER 10^6, DVB, QPSK */
// setup carrier recovery
/* setup carrier recovery */
tda10086_write_byte(state, 0x3d, 0x80);
// setup SEC
tda10086_write_byte(state, 0x36, t22k_off); // all SEC off, 22k tone
tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000))); // } tone frequency
tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8); // }
/* setup SEC */
tda10086_write_byte(state, 0x36, t22k_off); /* all SEC off, 22k tone */
tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000)));
tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8);
return 0;
}
......@@ -307,7 +307,7 @@ static int tda10086_set_symbol_rate(struct tda10086_state *state,
dprintk ("%s %i\n", __func__, symbol_rate);
// setup the decimation and anti-aliasing filters..
/* setup the decimation and anti-aliasing filters.. */
if (symbol_rate < (u32) (SACLK * 0.0137)) {
dfn=4;
afs=1;
......@@ -344,13 +344,13 @@ static int tda10086_set_symbol_rate(struct tda10086_state *state,
byp=1;
}
// calculate BDR
/* calculate BDR */
big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn);
big += ((SACLK/1000ULL)-1ULL);
do_div(big, (SACLK/1000ULL));
bdr = big & 0xfffff;
// calculate BDRI
/* calculate BDRI */
tmp = (1<<dfn)*(symbol_rate/1000);
bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp;
......@@ -419,11 +419,11 @@ static int tda10086_set_frontend(struct dvb_frontend* fe,
dprintk ("%s\n", __func__);
// modify parameters for tuning
/* modify parameters for tuning */
tda10086_write_byte(state, 0x02, 0x35);
state->has_lock = false;
// set params
/* set params */
if (fe->ops.tuner_ops.set_params) {
fe->ops.tuner_ops.set_params(fe, fe_params);
if (fe->ops.i2c_gate_ctrl)
......@@ -435,7 +435,7 @@ static int tda10086_set_frontend(struct dvb_frontend* fe,
fe->ops.i2c_gate_ctrl(fe, 0);
}
// calcluate the frequency offset (in *Hz* not kHz)
/* calcluate the frequency offset (in *Hz* not kHz) */
freqoff = fe_params->frequency - freq;
freqoff = ((1<<16) * freqoff) / (SACLK/1000);
tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f));
......@@ -448,7 +448,7 @@ static int tda10086_set_frontend(struct dvb_frontend* fe,
if ((ret = tda10086_set_fec(state, fe_params)) < 0)
return ret;
// soft reset + disable TS output until lock
/* soft reset + disable TS output until lock */
tda10086_write_mask(state, 0x10, 0x40, 0x40);
tda10086_write_mask(state, 0x00, 0x01, 0x00);
......@@ -466,11 +466,11 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
dprintk ("%s\n", __func__);
// check for invalid symbol rate
/* check for invalid symbol rate */
if (fe_params->u.qpsk.symbol_rate < 500000)
return -EINVAL;
// calculate the updated frequency (note: we convert from Hz->kHz)
/* calculate the updated frequency (note: we convert from Hz->kHz) */
tmp64 = tda10086_read_byte(state, 0x52);
tmp64 |= (tda10086_read_byte(state, 0x51) << 8);
if (tmp64 & 0x8000)
......@@ -479,7 +479,7 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
do_div(tmp64, (1ULL<<15) * (1ULL<<1));
fe_params->frequency = (int) state->frequency + (int) tmp64;
// the inversion
/* the inversion */
val = tda10086_read_byte(state, 0x0c);
if (val & 0x80) {
switch(val & 0x40) {
......@@ -510,7 +510,7 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
}
}
// calculate the updated symbol rate
/* calculate the updated symbol rate */
tmp = tda10086_read_byte(state, 0x1d);
if (tmp & 0x80)
tmp |= 0xffffff00;
......@@ -518,7 +518,7 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000);
fe_params->u.qpsk.symbol_rate = state->symbol_rate + tmp;
// the FEC
/* the FEC */
val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4;
switch(val) {
case 0x00:
......@@ -571,7 +571,7 @@ static int tda10086_read_status(struct dvb_frontend* fe, fe_status_t *fe_status)
*fe_status |= FE_HAS_LOCK;
if (!state->has_lock) {
state->has_lock = true;
// modify parameters for stable reception
/* modify parameters for stable reception */
tda10086_write_byte(state, 0x02, 0x00);
}
}
......@@ -611,10 +611,10 @@ static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
dprintk ("%s\n", __func__);
// read it
/* read it */
*ucblocks = tda10086_read_byte(state, 0x18) & 0x7f;
// reset counter
/* reset counter */
tda10086_write_byte(state, 0x18, 0x00);
tda10086_write_byte(state, 0x18, 0x80);
......@@ -627,7 +627,7 @@ static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber)
dprintk ("%s\n", __func__);
// read it
/* read it */
*ber = 0;
*ber |= tda10086_read_byte(state, 0x15);
*ber |= tda10086_read_byte(state, 0x16) << 8;
......
......@@ -56,6 +56,6 @@ static inline struct dvb_frontend* tda10086_attach(const struct tda10086_config*
printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
return NULL;
}
#endif // CONFIG_DVB_TDA10086
#endif /* CONFIG_DVB_TDA10086 */
#endif // TDA10086_H
#endif /* TDA10086_H */
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