Commit b0f7fd17 authored by Paul Walmsley's avatar Paul Walmsley Committed by Tony Lindgren

OMAP3 clock: add idlest_reg, idlest_mask for DPLL3

DPLL3 dpll_data was missing idlest_* fields - add them.
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 25bab0f1
...@@ -441,6 +441,8 @@ static struct dpll_data dpll3_dd = { ...@@ -441,6 +441,8 @@ static struct dpll_data dpll3_dd = {
.recal_st_bit = OMAP3430_CORE_DPLL_ST_SHIFT, .recal_st_bit = OMAP3430_CORE_DPLL_ST_SHIFT,
.autoidle_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_AUTOIDLE), .autoidle_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_AUTOIDLE),
.autoidle_mask = OMAP3430_AUTO_CORE_DPLL_MASK, .autoidle_mask = OMAP3430_AUTO_CORE_DPLL_MASK,
.idlest_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST),
.idlest_mask = OMAP3430_ST_CORE_CLK_MASK,
.max_multiplier = OMAP3_MAX_DPLL_MULT, .max_multiplier = OMAP3_MAX_DPLL_MULT,
.max_divider = OMAP3_MAX_DPLL_DIV, .max_divider = OMAP3_MAX_DPLL_DIV,
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
......
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