Commit aacef09b authored by Zhenyu Wang's avatar Zhenyu Wang Committed by Eric Anholt

drm/i915: fix pipe source image setting in flip command

The MI_DISPLAY_FLIP command needs to be set the same pipe
source image like in pipe source register, e.g source image
size minus one. This fixes screen corrupt issue on Ironlake.
Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
parent f072d2e7
...@@ -4180,7 +4180,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc, ...@@ -4180,7 +4180,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_unpin_work *work; struct intel_unpin_work *work;
unsigned long flags; unsigned long flags;
int ret; int pipesrc_reg = (intel_crtc->pipe == 0) ? PIPEASRC : PIPEBSRC;
int ret, pipesrc;
RING_LOCALS; RING_LOCALS;
work = kzalloc(sizeof *work, GFP_KERNEL); work = kzalloc(sizeof *work, GFP_KERNEL);
...@@ -4236,7 +4237,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc, ...@@ -4236,7 +4237,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
OUT_RING(fb->pitch); OUT_RING(fb->pitch);
if (IS_I965G(dev)) { if (IS_I965G(dev)) {
OUT_RING(obj_priv->gtt_offset | obj_priv->tiling_mode); OUT_RING(obj_priv->gtt_offset | obj_priv->tiling_mode);
OUT_RING((fb->width << 16) | fb->height); pipesrc = I915_READ(pipesrc_reg);
OUT_RING(pipesrc & 0x0fff0fff);
} else { } else {
OUT_RING(obj_priv->gtt_offset); OUT_RING(obj_priv->gtt_offset);
OUT_RING(MI_NOOP); OUT_RING(MI_NOOP);
......
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