Commit a26ea684 authored by Kevin Hilman's avatar Kevin Hilman

ARM: DaVinci: upgrade entry-macros for newer kernel

Signed-off-by: default avatarKevin Hilman <khilman@mvista.com>
parent 4998aba7
/* /*
* include/asm-arm/arch-davinci/entry-macro.S
*
* Low-level IRQ helper macros for TI DaVinci-based platforms * Low-level IRQ helper macros for TI DaVinci-based platforms
* *
* This file is licensed under the terms of the GNU General Public * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
* License version 2. This program is licensed "as is" without any *
* warranty of any kind, whether express or implied. * 2007 (c) MontaVista Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/ */
#include <asm/hardware.h> #include <asm/hardware.h>
#include <asm/arch/io.h>
#include <asm/arch/irqs.h>
.macro disable_fiq .macro disable_fiq
.endm .endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_preamble, base, tmp
/* GIVEN:
* EABASE = 0 ... so IRQNR = (IRQENTRY/4) - 1
* RETURN:
* irqnr: Interrupt number. Zero corresponds
* to bit 0 of the status register
* irqstat, base, and tmp may be considered
* as scratch registers
* Z conditions means no outstanding interrupt
*/
ldr \base, =IO_ADDRESS(DAVINCI_ARM_INTC_BASE) ldr \base, =IO_ADDRESS(DAVINCI_ARM_INTC_BASE)
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \tmp, [\base, #0x14] ldr \tmp, [\base, #0x14]
mov \tmp, \tmp, lsr #2 mov \tmp, \tmp, lsr #2
sub \irqnr, \tmp, #1 sub \irqnr, \tmp, #1
......
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