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Commit a0c0c8b2 authored by Ramesh Gupta's avatar Ramesh Gupta Committed by Hari Kanigeri
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OMAP4: Syslink dispatcher header files cleanup 

This patch fixes format for hw header files for
notify dispatcher.
Signed-off-by: default avatarRamesh Gupta G <grgupta@ti.com>
parent d13c4534
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Showing with 198 additions and 302 deletions
arch/arm/plat-omap/include/syslink/hw_defs.h
View file @ a0c0c8b2
/*
* hw_defs.h
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
* Syslink driver support for OMAP Processors.
*
* Copyright (C) 2007 Texas Instruments, Inc.
* Copyright (C) 2008-2009 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR
* PURPOSE.
*/
/*
* ======== hw_defs.h ========
* Description:
* Global HW definitions
*
*! Revision History:
*! ================
*! 19 Apr 2004 sb: Added generic page size, endianness and element size defns
*! 16 Feb 2003 sb: Initial version
*/
#ifndef __HW_DEFS_H
#define __HW_DEFS_H
......@@ -42,33 +31,33 @@ typedef long hw_status;
/* hw_set_clear_t: Enumerated Type used to set and clear any bit */
enum hw_set_clear_t {
HW_CLEAR,
HW_SET
HW_CLEAR,
HW_SET
} ;
/* hw_endianism_t: Enumerated Type used to specify the endianism
* Do NOT change these values. They are used as bit fields. */
enum hw_endianism_t {
HW_LITTLE_ENDIAN,
HW_BIG_ENDIAN
HW_LITTLE_ENDIAN,
HW_BIG_ENDIAN
} ;
/* hw_elemnt_siz_t: Enumerated Type used to specify the element size
* Do NOT change these values. They are used as bit fields. */
enum hw_elemnt_siz_t {
HW_ELEM_SIZE_8BIT,
HW_ELEM_SIZE_16BIT,
HW_ELEM_SIZE_32BIT,
HW_ELEM_SIZE_64BIT
HW_ELEM_SIZE_8BIT,
HW_ELEM_SIZE_16BIT,
HW_ELEM_SIZE_32BIT,
HW_ELEM_SIZE_64BIT
} ;
/* HW_IdleMode_t: Enumerated Type used to specify Idle modes */
enum HW_IdleMode_t {
HW_FORCE_IDLE,
HW_NO_IDLE,
HW_SMART_IDLE
} ;
enum HW_IdleMode_t {
HW_FORCE_IDLE,
HW_NO_IDLE,
HW_SMART_IDLE
} ;
#endif /* __HW_DEFS_H */
arch/arm/plat-omap/include/syslink/hw_mmu.h
View file @ a0c0c8b2
/*
* hw_mmu.h
* hw_mbox.h
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
* Syslink driver support for OMAP Processors.
*
* Copyright (C) 2007 Texas Instruments, Inc.
* Copyright (C) 2008-2009 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR
* PURPOSE.
*/
/*
* ======== hw_mmu.h ========
* Description:
* MMU types and API declarations
*
*! Revision History:
*! ================
*! 19-Apr-2004 sb Moved & renamed endianness, page size, element size
TLBAdd takes in MMUMap_attrs instead of separate arguments
*! 08-Mar-2004 sb Added the Page Table management APIs
*! 16 Feb 2003 sb: Initial version
*/
#ifndef __HW_MMU_H
#define __HW_MMU_H
......@@ -60,61 +46,61 @@ extern hw_status hw_mmu_enable(const u32 base_address);
extern hw_status hw_mmu_disable(const u32 base_address);
extern hw_status hw_mmu_numlocked_set(const u32 base_address,
u32 num_lcked_entries);
u32 num_lcked_entries);
extern hw_status hw_mmu_victim_numset(const u32 base_address,
u32 vctm_entry_num);
u32 vctm_entry_num);
/* For MMU faults */
extern hw_status hw_mmu_eventack(const u32 base_address,
u32 irq_mask);
u32 irq_mask);
extern hw_status hw_mmu_event_disable(const u32 base_address,
u32 irq_mask);
u32 irq_mask);
extern hw_status hw_mmu_event_enable(const u32 base_address,
u32 irq_mask);
u32 irq_mask);
extern hw_status hw_mmu_event_status(const u32 base_address,
u32 *irq_mask);
u32 *irq_mask);
extern hw_status hw_mmu_flt_adr_rd(const u32 base_address,
u32 *addr);
u32 *addr);
/* Set the TT base address */
extern hw_status hw_mmu_ttbset(const u32 base_address,
u32 ttb_phys_addr);
u32 ttb_phys_addr);
extern hw_status hw_mmu_twl_enable(const u32 base_address);
extern hw_status hw_mmu_twl_disable(const u32 base_address);
extern hw_status hw_mmu_tlb_flush(const u32 base_address,
u32 virtual_addr,
u32 page_size);
u32 virtual_addr,
u32 page_size);
extern hw_status hw_mmu_tlb_flushAll(const u32 base_address);
extern hw_status hw_mmu_tlb_add(const u32 base_address,
u32 physical_addr,
u32 virtual_addr,
u32 page_size,
u32 entryNum,
struct hw_mmu_map_attrs_t *map_attrs,
enum hw_set_clear_t preserve_bit,
enum hw_set_clear_t valid_bit);
u32 physical_addr,
u32 virtual_addr,
u32 page_size,
u32 entryNum,
struct hw_mmu_map_attrs_t *map_attrs,
enum hw_set_clear_t preserve_bit,
enum hw_set_clear_t valid_bit);
/* For PTEs */
extern hw_status hw_mmu_pte_set(const u32 pg_tbl_va,
u32 physical_addr,
u32 virtual_addr,
u32 page_size,
struct hw_mmu_map_attrs_t *map_attrs);
u32 physical_addr,
u32 virtual_addr,
u32 page_size,
struct hw_mmu_map_attrs_t *map_attrs);
extern hw_status hw_mmu_pte_clear(const u32 pg_tbl_va,
u32 pg_size,
u32 virtual_addr);
u32 pg_size,
u32 virtual_addr);
static inline u32 hw_mmu_pte_addr_l1(u32 l1_base, u32 va)
{
......@@ -167,14 +153,14 @@ static inline u32 hw_mmu_pte_sizel1(u32 pte_val)
static inline u32 hw_mmu_pte_sizel2(u32 pte_val)
{
u32 pte_size = 0;
u32 pte_size = 0;
if (pte_val & 0x2)
pte_size = HW_PAGE_SIZE_4KB;
else if (pte_val & 0x1)
pte_size = HW_PAGE_SIZE_64KB;
if (pte_val & 0x2)
pte_size = HW_PAGE_SIZE_4KB;
else if (pte_val & 0x1)
pte_size = HW_PAGE_SIZE_64KB;
return pte_size;
return pte_size;
}
extern hw_status hw_mmu_tlb_dump(u32 base_address, bool shw_inv_entries);
......
arch/arm/plat-omap/include/syslink/hw_ocp.h
View file @ a0c0c8b2
/*
* hw_ocp.h
*
* Syslink driver support for OMAP Processors.
*
* Copyright (C) 2008-2009 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR
* PURPOSE.
*/
/* =================================================================
File hw_ocp.h
Path $ (PROJROOT)\driver\mailbox
Desc API declarations for generic OCP Socket system registers for Mailbox
Rev 0.1.0
This computer program is copyright to Texas Instruments Incorporated.
The program may not be used without the written permission of
Texas Instruments Incorporated or against the terms and conditions
stipulated in the agreement under which this program has been supplied.
(c) Texas Instruments Incorporated 2008
=====================================================================
*/
#ifndef __HW_OCP_H
#define __HW_OCP_H
/* ========================================================================
* INCLUDE FILES (only if necessary)
* =========================================================================
*/
#ifdef __cplusplus
extern "C"
{
#endif
#include <syslink/GlobalTypes.h>
#include <syslink/hw_ocp.h>
#include <syslink/hw_defs.h>
......@@ -38,61 +26,35 @@ extern "C"
#include <syslink/MBXAccInt.h>
/* =======================================================================
* EXPORTED DEFINITIONS
* ========================================================================
*/
/* =======================================================================
* EXPORTED TYPES
* ========================================================================
*/
/* -----------------------------------------------------------------------
/*
* TYPE: HW_IdleMode_t
*
* DESCRIPTION: Enumerated Type for idle modes in OCP SYSCONFIG register
*
* -------------------------------------------------------------------------
*
*/
enum hal_ocp_idlemode_t {
HW_OCP_FORCE_IDLE,
HW_OCP_NO_IDLE,
HW_OCP_SMART_IDLE
HW_OCP_FORCE_IDLE,
HW_OCP_NO_IDLE,
HW_OCP_SMART_IDLE
};
/* =======================================================================
* EXPORTED VARIABLES
* ========================================================================
*/
/* =======================================================================
* EXPORTED FUNCTIONS
* ========================================================================
*/
extern long hw_ocp_soft_reset(const unsigned long base_address);
extern long hw_ocp_soft_reset_isdone(const unsigned long base_address,
unsigned long *reset_is_done);
unsigned long *reset_is_done);
extern long hw_ocp_idle_modeset(const unsigned long base_address,
enum hal_ocp_idlemode_t idle_mode);
enum hal_ocp_idlemode_t idle_mode);
extern long hw_ocp_idlemode_get(const unsigned long base_address,
enum hal_ocp_idlemode_t *idle_mode);
enum hal_ocp_idlemode_t *idle_mode);
extern long hw_ocp_autoidle_set(const unsigned long base_address,
enum hw_set_clear_t auto_idle);
enum hw_set_clear_t auto_idle);
extern long hw_ocp_autoidle_get(const unsigned long base_address,
enum hw_set_clear_t *auto_idle);
#ifdef __cplusplus
}
#endif
enum hw_set_clear_t *auto_idle);
#endif /* __HW_OCP_H */
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