Commit 9bb019f4 authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Paul Mundt

sh: sh7785lcr: fix PCI address map for 32-bit mode

Fix the problem that cannot work PCI device on 32-bit mode because
influence of the commit 68b42d1b
("sh: sh7785lcr: Map whole PCI address space."). So this patch was
implement like a 29-bit mode, map whole physical address space of
DDR-SDRAM.
Signed-off-by: default avatarYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 7fd87b3f
...@@ -48,8 +48,13 @@ EXPORT_SYMBOL(board_pci_channels); ...@@ -48,8 +48,13 @@ EXPORT_SYMBOL(board_pci_channels);
static struct sh4_pci_address_map sh7785_pci_map = { static struct sh4_pci_address_map sh7785_pci_map = {
.window0 = { .window0 = {
#if defined(CONFIG_32BIT)
.base = SH7780_32BIT_DDR_BASE_ADDR,
.size = 0x40000000,
#else
.base = SH7780_CS0_BASE_ADDR, .base = SH7780_CS0_BASE_ADDR,
.size = 0x20000000, .size = 0x20000000,
#endif
}, },
.flags = SH4_PCIC_NO_RESET, .flags = SH4_PCIC_NO_RESET,
......
...@@ -104,6 +104,8 @@ ...@@ -104,6 +104,8 @@
#define SH7780_CS5_BASE_ADDR (SH7780_CS4_BASE_ADDR + SH7780_MEM_REGION_SIZE) #define SH7780_CS5_BASE_ADDR (SH7780_CS4_BASE_ADDR + SH7780_MEM_REGION_SIZE)
#define SH7780_CS6_BASE_ADDR (SH7780_CS5_BASE_ADDR + SH7780_MEM_REGION_SIZE) #define SH7780_CS6_BASE_ADDR (SH7780_CS5_BASE_ADDR + SH7780_MEM_REGION_SIZE)
#define SH7780_32BIT_DDR_BASE_ADDR 0x40000000
struct sh4_pci_address_map; struct sh4_pci_address_map;
/* arch/sh/drivers/pci/pci-sh7780.c */ /* arch/sh/drivers/pci/pci-sh7780.c */
......
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