SYSLINK:proc-changes to proc start and stop

This patch adds the changes to Proc start and
Proc stop based on the validation on Zebu.
Proc start function is extended to enable M3
clock and program Ducati MMU. Proc Stop is extended
to put Cores in reset and disable M3 clock, and the
option to disable individual Core and MMU.
Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>

arch/arm/plat-omap/include/syslink/ducatienabler.h

@@ -173,10 +173,8 @@ static const struct mmu_entry l4_map[] = {
 };
 
 static const struct  memory_entry l3_memory_regions[] = {
-	/*  Remaining BootVecs regions */
-	{DUCATI_BOOTVECS_ADDR, DUCATI_BOOTVECS_LEN},
-	/*  EXTMEM_CORE0: 0x4000 to 0xFFFFF */
-	{DUCATI_EXTMEM_SYSM3_ADDR, DUCATI_EXTMEM_SYSM3_LEN},
+	/*  BootVecs regions */
+	{0, (PAGE_SIZE_1MB * 2)},
 	/*  EXTMEM_CORE1: 0x10000000 to 0x100FFFFF */
 	{DUCATI_EXTMEM_APPM3_ADDR, DUCATI_EXTMEM_APPM3_LEN},
 	/*  PRIVATE_SYSM3_DATA*/

drivers/dsp/syslink/procmgr/proc4430/ducatienabler.c

@@ -236,7 +236,7 @@ void  dbg_print_ptes(bool ashow_inv_entries, bool ashow_repeat_entries)
 	}
 	/*  Dump the TLB entries as well  */
 	DPRINTK("\n*** Currently programmed TLBs ***\n");
-	hw_mmu_tlb_dump(base_ducati_l2_mmu, false);
+	hw_mmu_tlb_dump(base_ducati_l2_mmu, true);
 	DPRINTK("*** DSP MMU DUMP COMPLETED ***\n");
 }
 
@@ -582,6 +582,10 @@ EXIT_LOOP:
 
 inline u32 ducati_mem_virtToPhys(u32 da)
 {
+#if 0
+	/* FIXME: temp work around till L2MMU issue
+	 * is resolved
+	 */
 	u32 *iopgd = iopgd_offset(ducati_iommu_ptr, da);
 	u32 phyaddress;
 
@@ -601,7 +605,8 @@ inline u32 ducati_mem_virtToPhys(u32 da)
 			phyaddress |= (da & (IOPGD_SIZE - 1));
 		}
 	}
-	return phyaddress;
+#endif
+	return da;
 }
 
 
@@ -947,6 +952,12 @@ static int add_dsp_mmu_entry(u32  *phys_addr, u32 *dsp_addr,
 				status = -EINVAL;
 				break;
 			}
+			/* Lock the base counter*/
+			hw_mmu_numlocked_set(base_ducati_l2_mmu,
+						mmu_index_next);
+
+			hw_mmu_victim_numset(base_ducati_l2_mmu,
+						mmu_index_next);
 		}
 	}
 	DPRINTK("Exited add_dsp_mmu_entryphys_addr = \
@@ -1016,7 +1027,6 @@ int  ducati_mmu_init(u32 a_phy_addr)
 	u32 num_l4_entries;
 	u32 i = 0;
 	u32 map_attrs;
-	u32 ducati_boot_addr = 0;
 	u32 num_l3_mem_entries = 0;
 	u32 tiler_mapbeg = 0;
 	u32 tiler_totalsize = 0;
@@ -1034,35 +1044,22 @@ int  ducati_mmu_init(u32 a_phy_addr)
 
 	mmu_index_next = 0;
 	phys_addr = a_phy_addr;
-	DPRINTK("Value before calling add_dsp_mmu_entry phys_addr = 0x%x,"
-		"ducati_boot_addr = 0x%x\n",
-		phys_addr, ducati_boot_addr);
-	ret_val = add_dsp_mmu_entry(&phys_addr,
-		&ducati_boot_addr, PAGE_SIZE_4KB);
-	if (WARN_ON(ret_val < 0))
-		goto error_exit;
 
-	DPRINTK("Value after calling add_dsp_mmu_entry phys_addr = 0x%x,"
-		"ducati_boot_addr = 0x%x\n",
-		phys_addr, ducati_boot_addr);
-
-	/* Lock the base counter*/
-	hw_mmu_numlocked_set(ducati_mmu_linear_addr,
-						mmu_index_next);
-
-	hw_mmu_victim_numset(ducati_mmu_linear_addr,
-						mmu_index_next);
 	printk(KERN_ALERT "  Programming Ducati memory regions\n");
 	printk(KERN_ALERT "=========================================\n");
 	for (i = 0; i < num_l3_mem_entries; i++) {
+
 		printk(KERN_ALERT "VA = [0x%x] of size [0x%x] at PA = [0x%x]\n",
 				l3_memory_regions[i].ul_virt_addr,
 				l3_memory_regions[i].ul_size, phys_addr);
+
 		if (l3_memory_regions[i].ul_virt_addr == DUCATI_SHARED_IPC_ADDR)
 			shm_phys_addr = phys_addr;
-		ret_val = add_entry_ext(&phys_addr,
-				(u32 *)(&(l3_memory_regions[i].ul_virt_addr)),
-				(l3_memory_regions[i].ul_size));
+
+		ret_val = add_dsp_mmu_entry(&phys_addr,
+			(u32 *)(&(l3_memory_regions[i].ul_virt_addr)),
+			(l3_memory_regions[i].ul_size));
+
 		if (WARN_ON(ret_val < 0))
 			goto error_exit;
 	}
@@ -1088,8 +1085,8 @@ int  ducati_mmu_init(u32 a_phy_addr)
 		printk(KERN_INFO "PA [0x%x] VA [0x%x] size [0x%x]\n",
 				l4_map[i].ul_phy_addr, l4_map[i].ul_virt_addr,
 				l4_map[i].ul_size);
-		ret_val = ducati_mem_map(l4_map[i].ul_phy_addr,
-			l4_map[i].ul_virt_addr, l4_map[i].ul_size, map_attrs);
+		ret_val = add_dsp_mmu_entry((u32 *)&l4_map[i].ul_phy_addr,
+			(u32 *)&l4_map[i].ul_virt_addr, (l4_map[i].ul_size));
 		if (WARN_ON(ret_val < 0)) {
 
 			DPRINTK("**** Failed to map Peripheral ****");
@@ -1100,6 +1097,7 @@ int  ducati_mmu_init(u32 a_phy_addr)
 			goto error_exit;
 		}
 	}
+
 	/* Set the TTB to point to the L1 page table's physical address */
 	hw_mmu_ttbset(ducati_mmu_linear_addr, p_pt_attrs->l1_base_pa);
 
@@ -1121,11 +1119,6 @@ int  ducati_mmu_init(u32 a_phy_addr)
 	/*  Dump the MMU Entries */
 	dbg_print_ptes(false, false);
 
-	DPRINTK("  Programmed Ducati BootVectors 0x0 to first page at [0x%x]",
-							a_phy_addr);
-
-	DPRINTK("  Leaving DDucati_MMUManager::ducati_mmu_init [0x%x]",
-								ret_val);
 	return 0;
 error_exit:
 	return ret_val;

drivers/dsp/syslink/procmgr/proc4430/proc4430.c

@@ -42,6 +42,8 @@
 #define SYS_M3					2
 #define APP_M3					3
 #define CORE_PRM_BASE				IO_ADDRESS(0x4a306700)
+#define CORE_CM2_DUCATI_CLKSTCTRL               IO_ADDRESS(0x4A008900)
+#define CORE_CM2_DUCATI_CLKCTRL			IO_ADDRESS(0x4A008920)
 #define RM_MPU_M3_RSTCTRL_OFFSET		0x210
 #define RM_MPU_M3_RSTST_OFFSET			0x214
 #define RM_MPU_M3_RST1				0x1
@@ -150,8 +152,7 @@ int proc4430_setup(struct proc4430_config *cfg)
 		proc4430_get_config(&tmp_cfg);
 		cfg = &tmp_cfg;
 	}
-	/* Put SYS-M3 and APP M3 in reset */
-	__raw_writel(0x03, CORE_PRM_BASE + RM_MPU_M3_RSTCTRL_OFFSET);
+
 	dmm_create();
 	dmm_create_tables(DUCATI_DMM_START_ADDR, DUCATI_DMM_POOL_SIZE);
 
@@ -164,7 +165,6 @@ int proc4430_setup(struct proc4430_config *cfg)
 	}
 
 	mutex_init(proc4430_state.gate_handle);
-	ducati_setup();
 
 	/* Initialize the name to handles mapping array. */
 	memset(&proc4430_state.proc_handles, 0,
@@ -588,6 +588,8 @@ int proc4430_detach(void *handle)
 int proc4430_start(void *handle, u32 entry_pt,
 			struct processor_start_params *start_params)
 {
+	u32 reg;
+	int counter = 10;
 	if (atomic_cmpmask_and_lt(&proc4430_state.ref_count,
 					OMAP4430PROC_MAKE_MAGICSTAMP(0),
 					OMAP4430PROC_MAKE_MAGICSTAMP(1))
@@ -604,14 +606,35 @@ int proc4430_start(void *handle, u32 entry_pt,
 			"Argument processor_start_params * is NULL");
 		return -EINVAL;
 	}
-
 	switch (start_params->params->proc_id) {
 	case SYS_M3:
-		/* De-assert RST2 */
-		__raw_writel(0x02, CORE_PRM_BASE + RM_MPU_M3_RSTCTRL_OFFSET);
+		/* Module is managed automatically by HW */
+		__raw_writel(0x01, CORE_CM2_DUCATI_CLKCTRL);
+		/* Enable the M3 clock */
+		__raw_writel(0x02, CORE_CM2_DUCATI_CLKSTCTRL);
+		do {
+			reg = __raw_readl(CORE_CM2_DUCATI_CLKSTCTRL);
+			if (reg & 0x100) {
+				printk(KERN_INFO "M3 clock enabled:"
+				"CORE_CM2_DUCATI_CLKSTCTRL = 0x%x\n", reg);
+				break;
+			}
+			msleep(1);
+		} while (--counter);
+		if (counter == 0) {
+			printk(KERN_ERR "FAILED TO ENABLE DUCATI M3 CLOCK !\n");
+			return -EFAULT;
+		}
+		/* De-assert RST 3 */
+		__raw_writel(0x3, CORE_PRM_BASE + RM_MPU_M3_RSTCTRL_OFFSET);
+		ducati_setup();
+		printk(KERN_INFO "De-assert RST1\n");
+		__raw_writel(0x2, CORE_PRM_BASE + RM_MPU_M3_RSTCTRL_OFFSET);
+		return 0;
 		break;
 	case APP_M3:
 		__raw_writel(0x0, CORE_PRM_BASE + RM_MPU_M3_RSTCTRL_OFFSET);
+		printk(KERN_INFO "De-assert RST2\n");
 		break;
 	default:
 		printk(KERN_ERR "proc4430_start: ERROR input\n");
@@ -632,7 +655,7 @@ int proc4430_start(void *handle, u32 entry_pt,
  *  @sa		 proc4430_start, OMAP3530_halResetCtrl
  */
 int
-proc4430_stop(void *handle)
+proc4430_stop(void *handle, struct processor_stop_params *stop_params)
 {
 	if (atomic_cmpmask_and_lt(&proc4430_state.ref_count,
 					OMAP4430PROC_MAKE_MAGICSTAMP(0),
@@ -642,12 +665,22 @@ proc4430_stop(void *handle)
 			"Module not initialized");
 		return -ENODEV;
 	}
-
-	/* Stoppping both SYS M3 and APP M3 */
-	/* FIX ME: this needs to be changed to handle reset
-	* of only APPM3 case too
-	*/
-	__raw_writel(0x3, CORE_PRM_BASE + RM_MPU_M3_RSTCTRL_OFFSET);
+	switch (stop_params->params->proc_id) {
+	case SYS_M3:
+		ducati_destroy();
+		printk(KERN_INFO "Assert RST1 and RST2 and RST3\n");
+		__raw_writel(0x7, CORE_PRM_BASE + RM_MPU_M3_RSTCTRL_OFFSET);
+		/* Disable the M3 clock */
+		__raw_writel(0x01, CORE_CM2_DUCATI_CLKSTCTRL);
+		break;
+	case APP_M3:
+		printk(KERN_INFO "Assert RST2\n");
+		__raw_writel(0x2, CORE_PRM_BASE + RM_MPU_M3_RSTCTRL_OFFSET);
+		break;
+	default:
+		printk(KERN_ERR "proc4430_stop: ERROR input\n");
+		break;
+	}
 	return 0;
 }
 

drivers/dsp/syslink/procmgr/proc4430/proc4430.h

@@ -81,7 +81,8 @@ int proc4430_start(void *handle, u32 entry_pt,
 		struct processor_start_params *params);
 
 /* Function to start the stop processor */
-int proc4430_stop(void *handle);
+int proc4430_stop(void *handle,
+			struct processor_stop_params *params);
 
 /* Function to read from the slave processor's memory. */
 int proc4430_read(void *handle, u32 proc_addr, u32 *num_bytes,

drivers/dsp/syslink/procmgr/proc4430/proc4430_drv.c

@@ -362,8 +362,6 @@ static int __init proc4430_drv_initializeModule(void)
 	}
 	device_create(proc_4430_class, NULL, MKDEV(driver_major, driver_minor),
 			NULL, PROC4430_NAME);
-	/* FIX ME: THIS MIGHT NOT BE THE RIGHT PLACE TO CALL THE SETUP */
-	proc4430_setup(NULL);
 exit:
 	return 0;
 }

drivers/dsp/syslink/procmgr/procdefs.h

@@ -90,7 +90,8 @@ typedef int (*processor_start_fxn) (void *handle, u32 entry_pt,
 /*
  *Function pointer type for the function to stop the processor.
  */
-typedef int (*processor_stop_fxn) (void *handle);
+typedef int (*processor_stop_fxn) (void *handle,
+					struct processor_stop_params *params);
 
 /*
  * Function pointer type for the function to read from the slave

drivers/dsp/syslink/procmgr/processor.c

@@ -136,7 +136,8 @@ inline int processor_start(void *handle, u32 entry_pt,
  * devices, by placing it in reset.
  * The handle specifies the specific Processor instance to be used.
  */
-inline int processor_stop(void *handle)
+inline int processor_stop(void *handle,
+				struct processor_stop_params *params)
 {
 	int retval = 0;
 	struct processor_object *proc_handle =
@@ -145,7 +146,7 @@ inline int processor_stop(void *handle)
 	BUG_ON(handle == NULL);
 	BUG_ON(proc_handle->proc_fxn_table.stop == NULL);
 
-	retval = proc_handle->proc_fxn_table.stop(handle);
+	retval = proc_handle->proc_fxn_table.stop(handle, params);
 
 	if ((proc_handle->boot_mode == PROC_MGR_BOOTMODE_BOOT)
 	||  (proc_handle->boot_mode == PROC_MGR_BOOTMODE_NOLOAD))

drivers/dsp/syslink/procmgr/processor.h

@@ -37,7 +37,8 @@ int processor_start(void *handle, u32 entry_pt,
 				struct processor_start_params *params);
 
 /* Function to stop the processor. */
-int processor_stop(void *handle);
+int processor_stop(void *handle,
+			struct processor_stop_params *params);
 
 /* Function to read from the slave processor's memory. */
 int processor_read(void *handle, u32 proc_addr, u32 *num_bytes, void *buffer);

drivers/dsp/syslink/procmgr/procmgr.c

@@ -620,6 +620,7 @@ int proc_mgr_stop(void *handle, struct proc_mgr_stop_params *params)
 	int retval = 0;
 	struct proc_mgr_object *proc_mgr_handle =
 				(struct proc_mgr_object *)handle;
+	struct processor_stop_params proc_params;
 	if (atomic_cmpmask_and_lt(&(proc_mgr_obj_state.ref_count),
 		PROCMGR_MAKE_MAGICSTAMP(0), PROCMGR_MAKE_MAGICSTAMP(1))
 		 == true) {
@@ -634,7 +635,9 @@ int proc_mgr_stop(void *handle, struct proc_mgr_stop_params *params)
 #endif /* #if defined (CONFIG_SYSLINK_USE_SYSMGR) */
 
 	WARN_ON(mutex_lock_interruptible(proc_mgr_obj_state.gate_handle));
-	retval = processor_stop(proc_mgr_handle->proc_handle);
+	proc_params.params = params;
+	retval = processor_stop(proc_mgr_handle->proc_handle,
+						&proc_params);
 	mutex_unlock(proc_mgr_obj_state.gate_handle);
 	return retval;;
 }