Eviction Buffer not empty after Cache Sync on the L220 cache controller

This patch adds the workaround for the 484863 L220 erratum. The
writing of the L220 registers is done with a SWP rather than STR
instruction.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

arch/arm/Kconfig

@@ -586,6 +586,17 @@ config ARM_ERRATA_460075
 	  the L2 cache are lost and overwritten with stale memory
 	  contents from external memory.
 
+config ARM_ERRATA_484863
+	bool "The Cache Sync operation does not guarantee that the the Eviction Buffer is empty"
+	depends on CACHE_L2X0
+	default n
+	help
+	  According to the L220 Erratum 484863, the actual behaviour of
+	  the L220 cache controller is that the Cache Sync operation
+	  only ensures that the Write Buffer and the Write Allocate
+	  Buffer are empty but not the Eviction Buffer. This option
+	  enables the first workaround from the Errata document.
+
 endmenu
 
 source "arch/arm/common/Kconfig"

arch/arm/mm/cache-l2x0.c

@@ -34,7 +34,11 @@ static inline void sync_writel(unsigned long val, unsigned long reg,
 	unsigned long flags;
 
 	spin_lock_irqsave(&l2x0_lock, flags);
+#ifdef CONFIG_ARM_ERRATA_484863
+	asm volatile("swp %0, %0, [%1]\n" : "+r" (val) : "r" (l2x0_base + reg));
+#else
 	writel(val, l2x0_base + reg);
+#endif
 	/* wait for the operation to complete */
 	while (readl(l2x0_base + reg) & complete_mask)
 		;