Commit 93ce2f52 authored by Andrew Isaacson's avatar Andrew Isaacson Committed by Ralf Baechle

Add support for SB1A CPU.

Signed-Off-By: default avatarAndy Isaacson <adi@broadcom.com>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 4f19f990
...@@ -623,6 +623,9 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c) ...@@ -623,6 +623,9 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR); c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
#endif #endif
break; break;
case PRID_IMP_SB1A:
c->cputype = CPU_SB1A;
break;
} }
} }
......
...@@ -56,6 +56,7 @@ static const char *cpu_name[] = { ...@@ -56,6 +56,7 @@ static const char *cpu_name[] = {
[CPU_5KC] = "MIPS 5Kc", [CPU_5KC] = "MIPS 5Kc",
[CPU_R4310] = "R4310", [CPU_R4310] = "R4310",
[CPU_SB1] = "SiByte SB1", [CPU_SB1] = "SiByte SB1",
[CPU_SB1A] = "SiByte SB1A",
[CPU_TX3912] = "TX3912", [CPU_TX3912] = "TX3912",
[CPU_TX3922] = "TX3922", [CPU_TX3922] = "TX3922",
[CPU_TX3927] = "TX3927", [CPU_TX3927] = "TX3927",
......
...@@ -854,6 +854,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l, ...@@ -854,6 +854,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
case CPU_R12000: case CPU_R12000:
case CPU_4KC: case CPU_4KC:
case CPU_SB1: case CPU_SB1:
case CPU_SB1A:
case CPU_4KSC: case CPU_4KSC:
case CPU_20KC: case CPU_20KC:
case CPU_25KF: case CPU_25KF:
......
...@@ -162,7 +162,7 @@ ...@@ -162,7 +162,7 @@
#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */ #define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
#endif #endif
#if defined(CONFIG_CPU_SB1) #if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A)
#define KUSIZE _LLCONST_(0x0000100000000000) /* 2^^44 */ #define KUSIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
#define KUSIZE_64 _LLCONST_(0x0000100000000000) /* 2^^44 */ #define KUSIZE_64 _LLCONST_(0x0000100000000000) /* 2^^44 */
#define K0SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */ #define K0SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
......
...@@ -93,6 +93,7 @@ ...@@ -93,6 +93,7 @@
*/ */
#define PRID_IMP_SB1 0x0100 #define PRID_IMP_SB1 0x0100
#define PRID_IMP_SB1A 0x1100
/* /*
* These are the PRID's for when 23:16 == PRID_COMP_SANDCRAFT * These are the PRID's for when 23:16 == PRID_COMP_SANDCRAFT
...@@ -194,7 +195,8 @@ ...@@ -194,7 +195,8 @@
#define CPU_AU1200 59 #define CPU_AU1200 59
#define CPU_34K 60 #define CPU_34K 60
#define CPU_PR4450 61 #define CPU_PR4450 61
#define CPU_LAST 61 #define CPU_SB1A 62
#define CPU_LAST 62
/* /*
* ISA Level encodings * ISA Level encodings
......
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