Commit 93116573 authored by Ben Dooks's avatar Ben Dooks Committed by Jeff Garzik

DM9000: Fix endian-ness of data accesses.

Patch from: Laurent Pinchart <laurentp@cse-semaphore.com>

This patch splits the receive status in 8bit wide fields and convert the
packet length from little endian to CPU byte order.
Signed-off-by: default avatarLaurent Pinchart <laurentp@cse-semaphore.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent a8cc21f6
......@@ -867,7 +867,8 @@ dm9000_timer(unsigned long data)
}
struct dm9000_rxhdr {
u16 RxStatus;
u8 RxPktReady;
u8 RxStatus;
u16 RxLen;
} __attribute__((__packed__));
......@@ -908,7 +909,7 @@ dm9000_rx(struct net_device *dev)
(db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
RxLen = rxhdr.RxLen;
RxLen = le16_to_cpu(rxhdr.RxLen);
/* Packet Status check */
if (RxLen < 0x40) {
......@@ -920,17 +921,17 @@ dm9000_rx(struct net_device *dev)
PRINTK1("RST: RX Len:%x\n", RxLen);
}
if (rxhdr.RxStatus & 0xbf00) {
if (rxhdr.RxStatus & 0xbf) {
GoodPacket = false;
if (rxhdr.RxStatus & 0x100) {
if (rxhdr.RxStatus & 0x01) {
PRINTK1("fifo error\n");
dev->stats.rx_fifo_errors++;
}
if (rxhdr.RxStatus & 0x200) {
if (rxhdr.RxStatus & 0x02) {
PRINTK1("crc error\n");
dev->stats.rx_crc_errors++;
}
if (rxhdr.RxStatus & 0x8000) {
if (rxhdr.RxStatus & 0x80) {
PRINTK1("length error\n");
dev->stats.rx_length_errors++;
}
......
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