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Commit 92bedb8d authored by Andres Salomon's avatar Andres Salomon Committed by james toy
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With generic modular drivers handling all of this stuff, the 

geode-specific code can go away.  The cs5535-gpio, cs5535-mfgpt, and
cs5535-clockevt drivers now handle this.
Signed-off-by: default avatarAndres Salomon <dilinger@collabora.co.uk>
Cc: Jordan Crouse <jordan@cosmicpenguin.net>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: john stultz <johnstul@us.ibm.com>
Cc: Chris Ball <cjb@laptop.org>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
parent a2a3fdda
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Showing with 2 additions and 714 deletions
arch/x86/Kconfig
View file @ 92bedb8d
......@@ -2016,16 +2016,6 @@ config SCx200HR_TIMER
processor goes idle (as is done by the scheduler). The
other workaround is idle=poll boot option.
config GEODE_MFGPT_TIMER
def_bool y
prompt "Geode Multi-Function General Purpose Timer (MFGPT) events"
depends on MGEODE_LX && GENERIC_TIME && GENERIC_CLOCKEVENTS
---help---
This driver provides a clock event source based on the MFGPT
timer(s) in the CS5535 and CS5536 companion chip for the geode.
MFGPTs have a better resolution and max interval than the
generic PIT, and are suitable for use as high-res timers.
config OLPC
bool "One Laptop Per Child support"
select GPIOLIB
......
arch/x86/include/asm/geode.h
View file @ 92bedb8d
......@@ -14,98 +14,6 @@
#include <linux/io.h>
#include <linux/cs5535.h>
/* Generic southbridge functions */
#define GEODE_DEV_PMS 0
#define GEODE_DEV_ACPI 1
#define GEODE_DEV_GPIO 2
#define GEODE_DEV_MFGPT 3
extern int geode_get_dev_base(unsigned int dev);
/* Useful macros */
#define geode_pms_base() geode_get_dev_base(GEODE_DEV_PMS)
#define geode_acpi_base() geode_get_dev_base(GEODE_DEV_ACPI)
#define geode_gpio_base() geode_get_dev_base(GEODE_DEV_GPIO)
#define geode_mfgpt_base() geode_get_dev_base(GEODE_DEV_MFGPT)
/* MSRS */
#define MSR_LBAR_SMB 0x5140000B
#define MSR_LBAR_GPIO 0x5140000C
#define MSR_LBAR_MFGPT 0x5140000D
#define MSR_LBAR_ACPI 0x5140000E
#define MSR_LBAR_PMS 0x5140000F
/* Resource Sizes */
#define LBAR_GPIO_SIZE 0xFF
#define LBAR_MFGPT_SIZE 0x40
#define LBAR_ACPI_SIZE 0x40
#define LBAR_PMS_SIZE 0x80
/* ACPI registers (PMS block) */
/*
* PM1_EN is only valid when VSA is enabled for 16 bit reads.
* When VSA is not enabled, *always* read both PM1_STS and PM1_EN
* with a 32 bit read at offset 0x0
*/
#define PM1_STS 0x00
#define PM1_EN 0x02
#define PM1_CNT 0x08
#define PM2_CNT 0x0C
#define PM_TMR 0x10
#define PM_GPE0_STS 0x18
#define PM_GPE0_EN 0x1C
/* PMC registers (PMS block) */
#define PM_SSD 0x00
#define PM_SCXA 0x04
#define PM_SCYA 0x08
#define PM_OUT_SLPCTL 0x0C
#define PM_SCLK 0x10
#define PM_SED 0x1
#define PM_SCXD 0x18
#define PM_SCYD 0x1C
#define PM_IN_SLPCTL 0x20
#define PM_WKD 0x30
#define PM_WKXD 0x34
#define PM_RD 0x38
#define PM_WKXA 0x3C
#define PM_FSD 0x40
#define PM_TSD 0x44
#define PM_PSD 0x48
#define PM_NWKD 0x4C
#define PM_AWKD 0x50
#define PM_SSC 0x54
static inline u32 geode_gpio(unsigned int nr)
{
BUG_ON(nr > 28);
return 1 << nr;
}
extern void geode_gpio_set(u32, unsigned int);
extern void geode_gpio_clear(u32, unsigned int);
extern int geode_gpio_isset(u32, unsigned int);
extern void geode_gpio_setup_event(unsigned int, int, int);
extern void geode_gpio_set_irq(unsigned int, unsigned int);
static inline void geode_gpio_event_irq(unsigned int gpio, int pair)
{
geode_gpio_setup_event(gpio, pair, 0);
}
static inline void geode_gpio_event_pme(unsigned int gpio, int pair)
{
geode_gpio_setup_event(gpio, pair, 1);
}
/* Specific geode tests */
static inline int is_geode_gx(void)
{
return ((boot_cpu_data.x86_vendor == X86_VENDOR_NSC) &&
......@@ -125,29 +33,4 @@ static inline int is_geode(void)
return (is_geode_gx() || is_geode_lx());
}
static inline void geode_mfgpt_write(int timer, u16 reg, u16 value)
{
u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
outw(value, base + reg + (timer * 8));
}
static inline u16 geode_mfgpt_read(int timer, u16 reg)
{
u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
return inw(base + reg + (timer * 8));
}
extern int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable);
extern int geode_mfgpt_set_irq(int timer, int cmp, int *irq, int enable);
extern int geode_mfgpt_alloc_timer(int timer, int domain);
#define geode_mfgpt_setup_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 1)
#define geode_mfgpt_release_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 0)
#ifdef CONFIG_GEODE_MFGPT_TIMER
extern int __init mfgpt_timer_setup(void);
#else
static inline int mfgpt_timer_setup(void) { return 0; }
#endif
#endif /* _ASM_X86_GEODE_H */
arch/x86/kernel/Makefile
View file @ 92bedb8d
......@@ -89,7 +89,6 @@ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-$(CONFIG_HPET_TIMER) += hpet.o
obj-$(CONFIG_K8_NB) += k8.o
obj-$(CONFIG_MGEODE_LX) += geode_32.o mfgpt_32.o
obj-$(CONFIG_DEBUG_RODATA_TEST) += test_rodata.o
obj-$(CONFIG_DEBUG_NX_TEST) += test_nx.o
......
arch/x86/kernel/geode_32.c deleted 100644 → 0
View file @ a2a3fdda
/*
* AMD Geode southbridge support code
* Copyright (C) 2006, Advanced Micro Devices, Inc.
* Copyright (C) 2007, Andres Salomon <dilinger@debian.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public License
* as published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <asm/msr.h>
#include <asm/geode.h>
static struct {
char *name;
u32 msr;
int size;
u32 base;
} lbars[] = {
{ "geode-pms", MSR_LBAR_PMS, LBAR_PMS_SIZE, 0 },
{ "geode-acpi", MSR_LBAR_ACPI, LBAR_ACPI_SIZE, 0 },
{ "geode-gpio", MSR_LBAR_GPIO, LBAR_GPIO_SIZE, 0 },
{ "geode-mfgpt", MSR_LBAR_MFGPT, LBAR_MFGPT_SIZE, 0 }
};
static void __init init_lbars(void)
{
u32 lo, hi;
int i;
for (i = 0; i < ARRAY_SIZE(lbars); i++) {
rdmsr(lbars[i].msr, lo, hi);
if (hi & 0x01)
lbars[i].base = lo & 0x0000ffff;
if (lbars[i].base == 0)
printk(KERN_ERR "geode: Couldn't initialize '%s'\n",
lbars[i].name);
}
}
int geode_get_dev_base(unsigned int dev)
{
BUG_ON(dev >= ARRAY_SIZE(lbars));
return lbars[dev].base;
}
EXPORT_SYMBOL_GPL(geode_get_dev_base);
/* === GPIO API === */
void geode_gpio_set(u32 gpio, unsigned int reg)
{
u32 base = geode_get_dev_base(GEODE_DEV_GPIO);
if (!base)
return;
/* low bank register */
if (gpio & 0xFFFF)
outl(gpio & 0xFFFF, base + reg);
/* high bank register */
gpio >>= 16;
if (gpio)
outl(gpio, base + 0x80 + reg);
}
EXPORT_SYMBOL_GPL(geode_gpio_set);
void geode_gpio_clear(u32 gpio, unsigned int reg)
{
u32 base = geode_get_dev_base(GEODE_DEV_GPIO);
if (!base)
return;
/* low bank register */
if (gpio & 0xFFFF)
outl((gpio & 0xFFFF) << 16, base + reg);
/* high bank register */
gpio &= (0xFFFF << 16);
if (gpio)
outl(gpio, base + 0x80 + reg);
}
EXPORT_SYMBOL_GPL(geode_gpio_clear);
int geode_gpio_isset(u32 gpio, unsigned int reg)
{
u32 base = geode_get_dev_base(GEODE_DEV_GPIO);
u32 val;
if (!base)
return 0;
/* low bank register */
if (gpio & 0xFFFF) {
val = inl(base + reg) & (gpio & 0xFFFF);
if ((gpio & 0xFFFF) == val)
return 1;
}
/* high bank register */
gpio >>= 16;
if (gpio) {
val = inl(base + 0x80 + reg) & gpio;
if (gpio == val)
return 1;
}
return 0;
}
EXPORT_SYMBOL_GPL(geode_gpio_isset);
void geode_gpio_set_irq(unsigned int group, unsigned int irq)
{
u32 lo, hi;
if (group > 7 || irq > 15)
return;
rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
lo &= ~(0xF << (group * 4));
lo |= (irq & 0xF) << (group * 4);
wrmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
}
EXPORT_SYMBOL_GPL(geode_gpio_set_irq);
void geode_gpio_setup_event(unsigned int gpio, int pair, int pme)
{
u32 base = geode_get_dev_base(GEODE_DEV_GPIO);
u32 offset, shift, val;
if (gpio >= 24)
offset = GPIO_MAP_W;
else if (gpio >= 16)
offset = GPIO_MAP_Z;
else if (gpio >= 8)
offset = GPIO_MAP_Y;
else
offset = GPIO_MAP_X;
shift = (gpio % 8) * 4;
val = inl(base + offset);
/* Clear whatever was there before */
val &= ~(0xF << shift);
/* And set the new value */
val |= ((pair & 7) << shift);
/* Set the PME bit if this is a PME event */
if (pme)
val |= (1 << (shift + 3));
outl(val, base + offset);
}
EXPORT_SYMBOL_GPL(geode_gpio_setup_event);
static int __init geode_southbridge_init(void)
{
if (!is_geode())
return -ENODEV;
init_lbars();
(void) mfgpt_timer_setup();
return 0;
}
postcore_initcall(geode_southbridge_init);
arch/x86/kernel/mfgpt_32.c deleted 100644 → 0
View file @ a2a3fdda
This diff is collapsed.
drivers/gpio/Kconfig
View file @ 92bedb8d
......@@ -176,7 +176,7 @@ comment "PCI GPIO expanders:"
config GPIO_CS5535
tristate "AMD CS5535/CS5536 GPIO support"
depends on PCI && !CS5535_GPIO && !MGEODE_LX
depends on PCI && !CS5535_GPIO
help
The AMD CS5535 and CS5536 southbridges support 28 GPIO pins that
can be used for quite a number of things. The CS5535/6 is found on
......
drivers/misc/Kconfig
View file @ 92bedb8d
......@@ -217,7 +217,7 @@ config SGI_XP
config CS5535_MFGPT
tristate "CS5535/CS5536 Geode Multi-Function General Purpose Timer (MFGPT) support"
depends on PCI && !MGEODE_LX
depends on PCI
default n
help
This driver provides access to MFGPT functionality for other
......
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