Commit 8fc543c8 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6

* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
  [IA64] IOSAPIC bogus error cleanup
  [IA64] Update printing of feature set bits
  [IA64] Fix IOSAPIC delivery mode setting
  [IA64] XPC heartbeat timer function must run on CPU 0
  [IA64] Clean up /proc/interrupts output
  [IA64] Disable/re-enable CPE interrupts on Altix
  [IA64] Clean-up McKinley Errata message
  [IA64] Add gate.lds to list of files ignored by Git
  [IA64] Fix section mismatch in contig.c version of per_cpu_init()
  [IA64] Wrong args to memset in efi_gettimeofday()
  [IA64] Remove duplicate includes from ia32priv.h
  [IA64] fix number of bytes zeroed by sys_fw_init() in arch/ia64/hp/sim/boot/fw-emu.c
  [IA64] Fix perfmon sysctl directory modes
parents a70a9322 7f6ff62a
......@@ -285,7 +285,7 @@ sys_fw_init (const char *args, int arglen)
}
cmd_line[arglen] = '\0';
memset(efi_systab, 0, sizeof(efi_systab));
memset(efi_systab, 0, sizeof(*efi_systab));
efi_systab->hdr.signature = EFI_SYSTEM_TABLE_SIGNATURE;
efi_systab->hdr.revision = ((1 << 16) | 00);
efi_systab->hdr.headersize = sizeof(efi_systab->hdr);
......
......@@ -290,7 +290,6 @@ struct old_linux32_dirent {
#define _ASM_IA64_ELF_H /* Don't include elf.h */
#include <linux/sched.h>
#include <asm/processor.h>
/*
* This is used to ensure we don't load something for the wrong architecture.
......
......@@ -678,9 +678,11 @@ int __init acpi_boot_init(void)
/* I/O APIC */
if (acpi_table_parse_madt
(ACPI_MADT_TYPE_IO_SAPIC, acpi_parse_iosapic, NR_IOSAPICS) < 1)
printk(KERN_ERR PREFIX
"Error parsing MADT - no IOSAPIC entries\n");
(ACPI_MADT_TYPE_IO_SAPIC, acpi_parse_iosapic, NR_IOSAPICS) < 1) {
if (!ia64_platform_is("sn2"))
printk(KERN_ERR PREFIX
"Error parsing MADT - no IOSAPIC entries\n");
}
/* System-Level Interrupt Routing */
......
......@@ -218,9 +218,10 @@ efi_gettimeofday (struct timespec *ts)
{
efi_time_t tm;
memset(ts, 0, sizeof(ts));
if ((*efi.get_time)(&tm, NULL) != EFI_SUCCESS)
if ((*efi.get_time)(&tm, NULL) != EFI_SUCCESS) {
memset(ts, 0, sizeof(*ts));
return;
}
ts->tv_sec = mktime(tm.year, tm.month, tm.day, tm.hour, tm.minute, tm.second);
ts->tv_nsec = tm.nanosecond;
......
......@@ -748,6 +748,15 @@ skip_numa_setup:
#endif
}
static inline unsigned char choose_dmode(void)
{
#ifdef CONFIG_SMP
if (smp_int_redirect & SMP_IRQ_REDIRECTION)
return IOSAPIC_LOWEST_PRIORITY;
#endif
return IOSAPIC_FIXED;
}
/*
* ACPI can describe IOSAPIC interrupts via static tables and namespace
* methods. This provides an interface to register those interrupts and
......@@ -762,6 +771,7 @@ iosapic_register_intr (unsigned int gsi,
unsigned long flags;
struct iosapic_rte_info *rte;
u32 low32;
unsigned char dmode;
/*
* If this GSI has already been registered (i.e., it's a
......@@ -791,8 +801,8 @@ iosapic_register_intr (unsigned int gsi,
spin_lock(&irq_desc[irq].lock);
dest = get_target_cpu(gsi, irq);
err = register_intr(gsi, irq, IOSAPIC_LOWEST_PRIORITY,
polarity, trigger);
dmode = choose_dmode();
err = register_intr(gsi, irq, dmode, polarity, trigger);
if (err < 0) {
spin_unlock(&irq_desc[irq].lock);
irq = err;
......@@ -961,10 +971,12 @@ iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi,
{
int vector, irq;
unsigned int dest = cpu_physical_id(smp_processor_id());
unsigned char dmode;
irq = vector = isa_irq_to_vector(isa_irq);
BUG_ON(bind_irq_vector(irq, vector, CPU_MASK_ALL));
register_intr(gsi, irq, IOSAPIC_LOWEST_PRIORITY, polarity, trigger);
dmode = choose_dmode();
register_intr(gsi, irq, dmode, polarity, trigger);
DBG("ISA: IRQ %u -> GSI %u (%s,%s) -> CPU %d (0x%04x) vector %d\n",
isa_irq, gsi, trigger == IOSAPIC_EDGE ? "edge" : "level",
......
......@@ -61,9 +61,11 @@ int show_interrupts(struct seq_file *p, void *v)
unsigned long flags;
if (i == 0) {
seq_printf(p, " ");
char cpuname[16];
seq_printf(p, " ");
for_each_online_cpu(j) {
seq_printf(p, "CPU%d ",j);
snprintf(cpuname, 10, "CPU%d", j);
seq_printf(p, "%10s ", cpuname);
}
seq_putc(p, '\n');
}
......
......@@ -571,7 +571,7 @@ out:
* Outputs
* None
*/
static void __init
void
ia64_mca_register_cpev (int cpev)
{
/* Register the CPE interrupt vector with SAL */
......
......@@ -470,7 +470,7 @@ register_info(char *page)
return p - page;
}
static const char *proc_features[]={
static char *proc_features_0[]={ /* Feature set 0 */
NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
NULL,NULL,NULL,NULL,NULL,NULL,NULL, NULL,NULL,
NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
......@@ -502,25 +502,92 @@ static const char *proc_features[]={
"Enable BERR promotion"
};
static char *proc_features_16[]={ /* Feature set 16 */
"Disable ETM",
"Enable ETM",
"Enable MCA on half-way timer",
"Enable snoop WC",
NULL,
"Enable Fast Deferral",
"Disable MCA on memory aliasing",
"Enable RSB",
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
"DP system processor",
"Low Voltage",
"HT supported",
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL
};
static char **proc_features[]={
proc_features_0,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
proc_features_16,
NULL, NULL, NULL, NULL,
};
static char *
feature_set_info(char *page, u64 avail, u64 status, u64 control, u64 set)
{
char *p = page;
char **vf, **v;
int i;
vf = v = proc_features[set];
for(i=0; i < 64; i++, avail >>=1, status >>=1, control >>=1) {
if (!(control)) /* No remaining bits set */
break;
if (!(avail & 0x1)) /* Print only bits that are available */
continue;
if (vf)
v = vf + i;
if ( v && *v ) {
p += sprintf(p, "%-40s : %s %s\n", *v,
avail & 0x1 ? (status & 0x1 ?
"On " : "Off"): "",
avail & 0x1 ? (control & 0x1 ?
"Ctrl" : "NoCtrl"): "");
} else {
p += sprintf(p, "Feature set %2ld bit %2d\t\t\t"
" : %s %s\n",
set, i,
avail & 0x1 ? (status & 0x1 ?
"On " : "Off"): "",
avail & 0x1 ? (control & 0x1 ?
"Ctrl" : "NoCtrl"): "");
}
}
return p;
}
static int
processor_info(char *page)
{
char *p = page;
const char **v = proc_features;
u64 avail=1, status=1, control=1;
int i;
u64 avail=1, status=1, control=1, feature_set=0;
s64 ret;
if ((ret=ia64_pal_proc_get_features(&avail, &status, &control)) != 0) return 0;
do {
ret = ia64_pal_proc_get_features(&avail, &status, &control,
feature_set);
if (ret < 0) {
return p - page;
}
if (ret == 1) {
feature_set++;
continue;
}
p = feature_set_info(p, avail, status, control, feature_set);
feature_set++;
} while(1);
for(i=0; i < 64; i++, v++,avail >>=1, status >>=1, control >>=1) {
if ( ! *v ) continue;
p += sprintf(p, "%-40s : %s%s %s\n", *v,
avail & 0x1 ? "" : "NotImpl",
avail & 0x1 ? (status & 0x1 ? "On" : "Off"): "",
avail & 0x1 ? (control & 0x1 ? "Ctrl" : "NoCtrl"): "");
}
return p - page;
}
......
......@@ -129,9 +129,6 @@ ia64_patch_mckinley_e9 (unsigned long start, unsigned long end)
first_time = 0;
if (need_workaround)
printk(KERN_INFO "Leaving McKinley Errata 9 workaround enabled\n");
else
printk(KERN_INFO "McKinley Errata 9 workaround not needed; "
"disabling it\n");
}
if (need_workaround)
return;
......
......@@ -558,7 +558,7 @@ static ctl_table pfm_sysctl_dir[] = {
{
.ctl_name = CTL_UNNUMBERED,
.procname = "perfmon",
.mode = 0755,
.mode = 0555,
.child = pfm_ctl_table,
},
{}
......@@ -567,7 +567,7 @@ static ctl_table pfm_sysctl_root[] = {
{
.ctl_name = CTL_KERN,
.procname = "kernel",
.mode = 0755,
.mode = 0555,
.child = pfm_sysctl_dir,
},
{}
......
......@@ -146,6 +146,46 @@ find_bootmap_location (unsigned long start, unsigned long end, void *arg)
return 0;
}
#ifdef CONFIG_SMP
static void *cpu_data;
/**
* per_cpu_init - setup per-cpu variables
*
* Allocate and setup per-cpu data areas.
*/
void * __cpuinit
per_cpu_init (void)
{
int cpu;
static int first_time=1;
/*
* get_free_pages() cannot be used before cpu_init() done. BSP
* allocates "NR_CPUS" pages for all CPUs to avoid that AP calls
* get_zeroed_page().
*/
if (first_time) {
first_time=0;
for (cpu = 0; cpu < NR_CPUS; cpu++) {
memcpy(cpu_data, __phys_per_cpu_start, __per_cpu_end - __per_cpu_start);
__per_cpu_offset[cpu] = (char *) cpu_data - __per_cpu_start;
cpu_data += PERCPU_PAGE_SIZE;
per_cpu(local_per_cpu_offset, cpu) = __per_cpu_offset[cpu];
}
}
return __per_cpu_start + __per_cpu_offset[smp_processor_id()];
}
static inline void
alloc_per_cpu_data(void)
{
cpu_data = __alloc_bootmem(PERCPU_PAGE_SIZE * NR_CPUS,
PERCPU_PAGE_SIZE, __pa(MAX_DMA_ADDRESS));
}
#else
#define alloc_per_cpu_data() do { } while (0)
#endif /* CONFIG_SMP */
/**
* find_memory - setup memory map
*
......@@ -182,41 +222,9 @@ find_memory (void)
find_initrd();
alloc_per_cpu_data();
}
#ifdef CONFIG_SMP
/**
* per_cpu_init - setup per-cpu variables
*
* Allocate and setup per-cpu data areas.
*/
void * __cpuinit
per_cpu_init (void)
{
void *cpu_data;
int cpu;
static int first_time=1;
/*
* get_free_pages() cannot be used before cpu_init() done. BSP
* allocates "NR_CPUS" pages for all CPUs to avoid that AP calls
* get_zeroed_page().
*/
if (first_time) {
first_time=0;
cpu_data = __alloc_bootmem(PERCPU_PAGE_SIZE * NR_CPUS,
PERCPU_PAGE_SIZE, __pa(MAX_DMA_ADDRESS));
for (cpu = 0; cpu < NR_CPUS; cpu++) {
memcpy(cpu_data, __phys_per_cpu_start, __per_cpu_end - __per_cpu_start);
__per_cpu_offset[cpu] = (char *) cpu_data - __per_cpu_start;
cpu_data += PERCPU_PAGE_SIZE;
per_cpu(local_per_cpu_offset, cpu) = __per_cpu_offset[cpu];
}
}
return __per_cpu_start + __per_cpu_offset[smp_processor_id()];
}
#endif /* CONFIG_SMP */
static int
count_pages (u64 start, u64 end, void *arg)
{
......
......@@ -5,7 +5,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
* Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved.
*/
#include <linux/irq.h>
......@@ -85,12 +85,18 @@ static void sn_shutdown_irq(unsigned int irq)
{
}
extern void ia64_mca_register_cpev(int);
static void sn_disable_irq(unsigned int irq)
{
if (irq == local_vector_to_irq(IA64_CPE_VECTOR))
ia64_mca_register_cpev(0);
}
static void sn_enable_irq(unsigned int irq)
{
if (irq == local_vector_to_irq(IA64_CPE_VECTOR))
ia64_mca_register_cpev(irq);
}
static void sn_ack_irq(unsigned int irq)
......
......@@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2004-2006 Silicon Graphics, Inc. All Rights Reserved.
* Copyright (c) 2004-2007 Silicon Graphics, Inc. All Rights Reserved.
*/
......@@ -257,7 +257,9 @@ xpc_hb_checker(void *ignore)
set_cpus_allowed(current, cpumask_of_cpu(XPC_HB_CHECK_CPU));
/* set our heartbeating to other partitions into motion */
xpc_hb_check_timeout = jiffies + (xpc_hb_check_interval * HZ);
xpc_hb_beater(0);
while (!(volatile int) xpc_exiting) {
......@@ -1338,16 +1340,8 @@ xpc_init(void)
dev_warn(xpc_part, "can't register die notifier\n");
}
/*
* Set the beating to other partitions into motion. This is
* the last requirement for other partitions' discovery to
* initiate communications with us.
*/
init_timer(&xpc_hb_timer);
xpc_hb_timer.function = xpc_hb_beater;
xpc_hb_beater(0);
/*
* The real work-horse behind xpc. This processes incoming
......
......@@ -1379,10 +1379,11 @@ struct pal_features_s;
static inline s64
ia64_pal_proc_get_features (u64 *features_avail,
u64 *features_status,
u64 *features_control)
u64 *features_control,
u64 features_set)
{
struct ia64_pal_retval iprv;
PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, 0, 0);
PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, features_set, 0);
if (iprv.status == 0) {
*features_avail = iprv.v0;
*features_status = iprv.v1;
......
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