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Commit 8f99f823 authored by Thomas Gleixner's avatar Thomas Gleixner
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ARM: atomic_lock conversions 

Annotate the locks which cannot be converted to sleeping locks in -rt
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 89c94487
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Showing with 82 additions and 82 deletions
arch/arm/include/asm/dma.h
View file @ 8f99f823
...@@ -31,18 +31,18 @@ ...@@ -31,18 +31,18 @@
#define DMA_MODE_CASCADE 0xc0 #define DMA_MODE_CASCADE 0xc0
#define DMA_AUTOINIT 0x10 #define DMA_AUTOINIT 0x10
extern spinlock_t dma_spin_lock; extern atomic_spinlock_t dma_spin_lock;
static inline unsigned long claim_dma_lock(void) static inline unsigned long claim_dma_lock(void)
{ {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&dma_spin_lock, flags); atomic_spin_lock_irqsave(&dma_spin_lock, flags);
return flags; return flags;
} }
static inline void release_dma_lock(unsigned long flags) static inline void release_dma_lock(unsigned long flags)
{ {
spin_unlock_irqrestore(&dma_spin_lock, flags); atomic_spin_unlock_irqrestore(&dma_spin_lock, flags);
} }
/* Clear the 'DMA Pointer Flip Flop'. /* Clear the 'DMA Pointer Flip Flop'.
......
arch/arm/kernel/dma.c
View file @ 8f99f823
...@@ -21,7 +21,7 @@ ...@@ -21,7 +21,7 @@
#include <asm/mach/dma.h> #include <asm/mach/dma.h>
DEFINE_SPINLOCK(dma_spin_lock); DEFINE_ATOMIC_SPINLOCK(dma_spin_lock);
EXPORT_SYMBOL(dma_spin_lock); EXPORT_SYMBOL(dma_spin_lock);
static dma_t *dma_chan[MAX_DMA_CHANNELS]; static dma_t *dma_chan[MAX_DMA_CHANNELS];
......
arch/arm/kernel/smp.c
View file @ 8f99f823
...@@ -451,17 +451,17 @@ void __cpuinit percpu_timer_setup(void) ...@@ -451,17 +451,17 @@ void __cpuinit percpu_timer_setup(void)
local_timer_setup(evt); local_timer_setup(evt);
} }
static DEFINE_SPINLOCK(stop_lock); static DEFINE_ATOMIC_SPINLOCK(stop_lock);
/* /*
* ipi_cpu_stop - handle IPI from smp_send_stop() * ipi_cpu_stop - handle IPI from smp_send_stop()
*/ */
static void ipi_cpu_stop(unsigned int cpu) static void ipi_cpu_stop(unsigned int cpu)
{ {
spin_lock(&stop_lock); atomic_spin_lock(&stop_lock);
printk(KERN_CRIT "CPU%u: stopping\n", cpu); printk(KERN_CRIT "CPU%u: stopping\n", cpu);
dump_stack(); dump_stack();
spin_unlock(&stop_lock); atomic_spin_unlock(&stop_lock);
set_cpu_online(cpu, false); set_cpu_online(cpu, false);
......
arch/arm/kernel/traps.c
View file @ 8f99f823
...@@ -239,7 +239,7 @@ static void __die(const char *str, int err, struct thread_info *thread, struct p ...@@ -239,7 +239,7 @@ static void __die(const char *str, int err, struct thread_info *thread, struct p
} }
} }
DEFINE_SPINLOCK(die_lock); DEFINE_ATOMIC_SPINLOCK(die_lock);
/* /*
* This function is protected against re-entrancy. * This function is protected against re-entrancy.
...@@ -251,12 +251,12 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err) ...@@ -251,12 +251,12 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err)
oops_enter(); oops_enter();
console_verbose(); console_verbose();
spin_lock_irq(&die_lock); atomic_spin_lock_irq(&die_lock);
bust_spinlocks(1); bust_spinlocks(1);
__die(str, err, thread, regs); __die(str, err, thread, regs);
bust_spinlocks(0); bust_spinlocks(0);
add_taint(TAINT_DIE); add_taint(TAINT_DIE);
spin_unlock_irq(&die_lock); atomic_spin_unlock_irq(&die_lock);
if (in_interrupt()) if (in_interrupt())
panic("Fatal exception in interrupt"); panic("Fatal exception in interrupt");
...@@ -282,24 +282,24 @@ void arm_notify_die(const char *str, struct pt_regs *regs, ...@@ -282,24 +282,24 @@ void arm_notify_die(const char *str, struct pt_regs *regs,
} }
static LIST_HEAD(undef_hook); static LIST_HEAD(undef_hook);
static DEFINE_SPINLOCK(undef_lock); static DEFINE_ATOMIC_SPINLOCK(undef_lock);
void register_undef_hook(struct undef_hook *hook) void register_undef_hook(struct undef_hook *hook)
{ {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&undef_lock, flags); atomic_spin_lock_irqsave(&undef_lock, flags);
list_add(&hook->node, &undef_hook); list_add(&hook->node, &undef_hook);
spin_unlock_irqrestore(&undef_lock, flags); atomic_spin_unlock_irqrestore(&undef_lock, flags);
} }
void unregister_undef_hook(struct undef_hook *hook) void unregister_undef_hook(struct undef_hook *hook)
{ {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&undef_lock, flags); atomic_spin_lock_irqsave(&undef_lock, flags);
list_del(&hook->node); list_del(&hook->node);
spin_unlock_irqrestore(&undef_lock, flags); atomic_spin_unlock_irqrestore(&undef_lock, flags);
} }
static int call_undef_hook(struct pt_regs *regs, unsigned int instr) static int call_undef_hook(struct pt_regs *regs, unsigned int instr)
...@@ -308,12 +308,12 @@ static int call_undef_hook(struct pt_regs *regs, unsigned int instr) ...@@ -308,12 +308,12 @@ static int call_undef_hook(struct pt_regs *regs, unsigned int instr)
unsigned long flags; unsigned long flags;
int (*fn)(struct pt_regs *regs, unsigned int instr) = NULL; int (*fn)(struct pt_regs *regs, unsigned int instr) = NULL;
spin_lock_irqsave(&undef_lock, flags); atomic_spin_lock_irqsave(&undef_lock, flags);
list_for_each_entry(hook, &undef_hook, node) list_for_each_entry(hook, &undef_hook, node)
if ((instr & hook->instr_mask) == hook->instr_val && if ((instr & hook->instr_mask) == hook->instr_val &&
(regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val) (regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val)
fn = hook->fn; fn = hook->fn;
spin_unlock_irqrestore(&undef_lock, flags); atomic_spin_unlock_irqrestore(&undef_lock, flags);
return fn ? fn(regs, instr) : 1; return fn ? fn(regs, instr) : 1;
} }
......
arch/arm/mach-footbridge/include/mach/hardware.h
View file @ 8f99f823
...@@ -86,7 +86,7 @@ ...@@ -86,7 +86,7 @@
#define CPLD_FLASH_WR_ENABLE 1 #define CPLD_FLASH_WR_ENABLE 1
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
extern spinlock_t nw_gpio_lock; extern atomic_spinlock_t nw_gpio_lock;
extern void nw_gpio_modify_op(unsigned int mask, unsigned int set); extern void nw_gpio_modify_op(unsigned int mask, unsigned int set);
extern void nw_gpio_modify_io(unsigned int mask, unsigned int in); extern void nw_gpio_modify_io(unsigned int mask, unsigned int in);
extern unsigned int nw_gpio_read(void); extern unsigned int nw_gpio_read(void);
......
arch/arm/mach-footbridge/netwinder-hw.c
View file @ 8f99f823
...@@ -68,7 +68,7 @@ static inline void wb977_ww(int reg, int val) ...@@ -68,7 +68,7 @@ static inline void wb977_ww(int reg, int val)
/* /*
* This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE
*/ */
DEFINE_SPINLOCK(nw_gpio_lock); DEFINE_ATOMIC_SPINLOCK(nw_gpio_lock);
EXPORT_SYMBOL(nw_gpio_lock); EXPORT_SYMBOL(nw_gpio_lock);
static unsigned int current_gpio_op; static unsigned int current_gpio_op;
...@@ -327,9 +327,9 @@ static inline void wb977_init_gpio(void) ...@@ -327,9 +327,9 @@ static inline void wb977_init_gpio(void)
/* /*
* Set Group1/Group2 outputs * Set Group1/Group2 outputs
*/ */
spin_lock_irqsave(&nw_gpio_lock, flags); atomic_spin_lock_irqsave(&nw_gpio_lock, flags);
nw_gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN); nw_gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN);
spin_unlock_irqrestore(&nw_gpio_lock, flags); atomic_spin_unlock_irqrestore(&nw_gpio_lock, flags);
} }
/* /*
...@@ -390,9 +390,9 @@ static void __init cpld_init(void) ...@@ -390,9 +390,9 @@ static void __init cpld_init(void)
{ {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&nw_gpio_lock, flags); atomic_spin_lock_irqsave(&nw_gpio_lock, flags);
nw_cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE); nw_cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE);
spin_unlock_irqrestore(&nw_gpio_lock, flags); atomic_spin_unlock_irqrestore(&nw_gpio_lock, flags);
} }
static unsigned char rwa_unlock[] __initdata = static unsigned char rwa_unlock[] __initdata =
...@@ -616,9 +616,9 @@ static int __init nw_hw_init(void) ...@@ -616,9 +616,9 @@ static int __init nw_hw_init(void)
cpld_init(); cpld_init();
rwa010_init(); rwa010_init();
spin_lock_irqsave(&nw_gpio_lock, flags); atomic_spin_lock_irqsave(&nw_gpio_lock, flags);
nw_gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS); nw_gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS);
spin_unlock_irqrestore(&nw_gpio_lock, flags); atomic_spin_unlock_irqrestore(&nw_gpio_lock, flags);
} }
return 0; return 0;
} }
......
arch/arm/mach-footbridge/netwinder-leds.c
View file @ 8f99f823
...@@ -31,13 +31,13 @@ ...@@ -31,13 +31,13 @@
static char led_state; static char led_state;
static char hw_led_state; static char hw_led_state;
static DEFINE_SPINLOCK(leds_lock); static DEFINE_ATOMIC_SPINLOCK(leds_lock);
static void netwinder_leds_event(led_event_t evt) static void netwinder_leds_event(led_event_t evt)
{ {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&leds_lock, flags); atomic_spin_lock_irqsave(&leds_lock, flags);
switch (evt) { switch (evt) {
case led_start: case led_start:
...@@ -117,12 +117,12 @@ static void netwinder_leds_event(led_event_t evt) ...@@ -117,12 +117,12 @@ static void netwinder_leds_event(led_event_t evt)
break; break;
} }
spin_unlock_irqrestore(&leds_lock, flags); atomic_spin_unlock_irqrestore(&leds_lock, flags);
if (led_state & LED_STATE_ENABLED) { if (led_state & LED_STATE_ENABLED) {
spin_lock_irqsave(&nw_gpio_lock, flags); atomic_spin_lock_irqsave(&nw_gpio_lock, flags);
nw_gpio_modify_op(GPIO_RED_LED | GPIO_GREEN_LED, hw_led_state); nw_gpio_modify_op(GPIO_RED_LED | GPIO_GREEN_LED, hw_led_state);
spin_unlock_irqrestore(&nw_gpio_lock, flags); atomic_spin_unlock_irqrestore(&nw_gpio_lock, flags);
} }
} }
......
arch/arm/mach-integrator/core.c
View file @ 8f99f823
...@@ -199,7 +199,7 @@ static struct amba_pl010_data integrator_uart_data = { ...@@ -199,7 +199,7 @@ static struct amba_pl010_data integrator_uart_data = {
#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET
static DEFINE_SPINLOCK(cm_lock); static DEFINE_ATOMIC_SPINLOCK(cm_lock);
/** /**
* cm_control - update the CM_CTRL register. * cm_control - update the CM_CTRL register.
...@@ -211,10 +211,10 @@ void cm_control(u32 mask, u32 set) ...@@ -211,10 +211,10 @@ void cm_control(u32 mask, u32 set)
unsigned long flags; unsigned long flags;
u32 val; u32 val;
spin_lock_irqsave(&cm_lock, flags); atomic_spin_lock_irqsave(&cm_lock, flags);
val = readl(CM_CTRL) & ~mask; val = readl(CM_CTRL) & ~mask;
writel(val | set, CM_CTRL); writel(val | set, CM_CTRL);
spin_unlock_irqrestore(&cm_lock, flags); atomic_spin_unlock_irqrestore(&cm_lock, flags);
} }
EXPORT_SYMBOL(cm_control); EXPORT_SYMBOL(cm_control);
......
arch/arm/mach-integrator/pci_v3.c
View file @ 8f99f823
...@@ -162,7 +162,7 @@ ...@@ -162,7 +162,7 @@
* 7:2 register number * 7:2 register number
* *
*/ */
static DEFINE_SPINLOCK(v3_lock); static DEFINE_ATOMIC_SPINLOCK(v3_lock);
#define PCI_BUS_NONMEM_START 0x00000000 #define PCI_BUS_NONMEM_START 0x00000000
#define PCI_BUS_NONMEM_SIZE SZ_256M #define PCI_BUS_NONMEM_SIZE SZ_256M
...@@ -283,7 +283,7 @@ static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where, ...@@ -283,7 +283,7 @@ static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where,
unsigned long flags; unsigned long flags;
u32 v; u32 v;
spin_lock_irqsave(&v3_lock, flags); atomic_spin_lock_irqsave(&v3_lock, flags);
addr = v3_open_config_window(bus, devfn, where); addr = v3_open_config_window(bus, devfn, where);
switch (size) { switch (size) {
...@@ -301,7 +301,7 @@ static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where, ...@@ -301,7 +301,7 @@ static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where,
} }
v3_close_config_window(); v3_close_config_window();
spin_unlock_irqrestore(&v3_lock, flags); atomic_spin_unlock_irqrestore(&v3_lock, flags);
*val = v; *val = v;
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
...@@ -313,7 +313,7 @@ static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where, ...@@ -313,7 +313,7 @@ static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where,
unsigned long addr; unsigned long addr;
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&v3_lock, flags); atomic_spin_lock_irqsave(&v3_lock, flags);
addr = v3_open_config_window(bus, devfn, where); addr = v3_open_config_window(bus, devfn, where);
switch (size) { switch (size) {
...@@ -334,7 +334,7 @@ static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where, ...@@ -334,7 +334,7 @@ static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where,
} }
v3_close_config_window(); v3_close_config_window();
spin_unlock_irqrestore(&v3_lock, flags); atomic_spin_unlock_irqrestore(&v3_lock, flags);
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
} }
...@@ -509,7 +509,7 @@ void __init pci_v3_preinit(void) ...@@ -509,7 +509,7 @@ void __init pci_v3_preinit(void)
hook_fault_code(8, v3_pci_fault, SIGBUS, "external abort on non-linefetch"); hook_fault_code(8, v3_pci_fault, SIGBUS, "external abort on non-linefetch");
hook_fault_code(10, v3_pci_fault, SIGBUS, "external abort on non-linefetch"); hook_fault_code(10, v3_pci_fault, SIGBUS, "external abort on non-linefetch");
spin_lock_irqsave(&v3_lock, flags); atomic_spin_lock_irqsave(&v3_lock, flags);
/* /*
* Unlock V3 registers, but only if they were previously locked. * Unlock V3 registers, but only if they were previously locked.
...@@ -582,7 +582,7 @@ void __init pci_v3_preinit(void) ...@@ -582,7 +582,7 @@ void __init pci_v3_preinit(void)
printk(KERN_ERR "PCI: unable to grab PCI error " printk(KERN_ERR "PCI: unable to grab PCI error "
"interrupt: %d\n", ret); "interrupt: %d\n", ret);
spin_unlock_irqrestore(&v3_lock, flags); atomic_spin_unlock_irqrestore(&v3_lock, flags);
} }
void __init pci_v3_postinit(void) void __init pci_v3_postinit(void)
......
arch/arm/mach-ixp4xx/common-pci.c
View file @ 8f99f823
...@@ -54,7 +54,7 @@ unsigned long ixp4xx_pci_reg_base = 0; ...@@ -54,7 +54,7 @@ unsigned long ixp4xx_pci_reg_base = 0;
* these transactions are atomic or we will end up * these transactions are atomic or we will end up
* with corrupt data on the bus or in a driver. * with corrupt data on the bus or in a driver.
*/ */
static DEFINE_SPINLOCK(ixp4xx_pci_lock); static DEFINE_ATOMIC_SPINLOCK(ixp4xx_pci_lock);
/* /*
* Read from PCI config space * Read from PCI config space
...@@ -62,10 +62,10 @@ static DEFINE_SPINLOCK(ixp4xx_pci_lock); ...@@ -62,10 +62,10 @@ static DEFINE_SPINLOCK(ixp4xx_pci_lock);
static void crp_read(u32 ad_cbe, u32 *data) static void crp_read(u32 ad_cbe, u32 *data)
{ {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&ixp4xx_pci_lock, flags); atomic_spin_lock_irqsave(&ixp4xx_pci_lock, flags);
*PCI_CRP_AD_CBE = ad_cbe; *PCI_CRP_AD_CBE = ad_cbe;
*data = *PCI_CRP_RDATA; *data = *PCI_CRP_RDATA;
spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); atomic_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
} }
/* /*
...@@ -74,10 +74,10 @@ static void crp_read(u32 ad_cbe, u32 *data) ...@@ -74,10 +74,10 @@ static void crp_read(u32 ad_cbe, u32 *data)
static void crp_write(u32 ad_cbe, u32 data) static void crp_write(u32 ad_cbe, u32 data)
{ {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&ixp4xx_pci_lock, flags); atomic_spin_lock_irqsave(&ixp4xx_pci_lock, flags);
*PCI_CRP_AD_CBE = CRP_AD_CBE_WRITE | ad_cbe; *PCI_CRP_AD_CBE = CRP_AD_CBE_WRITE | ad_cbe;
*PCI_CRP_WDATA = data; *PCI_CRP_WDATA = data;
spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); atomic_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
} }
static inline int check_master_abort(void) static inline int check_master_abort(void)
...@@ -101,7 +101,7 @@ int ixp4xx_pci_read_errata(u32 addr, u32 cmd, u32* data) ...@@ -101,7 +101,7 @@ int ixp4xx_pci_read_errata(u32 addr, u32 cmd, u32* data)
int retval = 0; int retval = 0;
int i; int i;
spin_lock_irqsave(&ixp4xx_pci_lock, flags); atomic_spin_lock_irqsave(&ixp4xx_pci_lock, flags);
*PCI_NP_AD = addr; *PCI_NP_AD = addr;
...@@ -118,7 +118,7 @@ int ixp4xx_pci_read_errata(u32 addr, u32 cmd, u32* data) ...@@ -118,7 +118,7 @@ int ixp4xx_pci_read_errata(u32 addr, u32 cmd, u32* data)
if(check_master_abort()) if(check_master_abort())
retval = 1; retval = 1;
spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); atomic_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
return retval; return retval;
} }
...@@ -127,7 +127,7 @@ int ixp4xx_pci_read_no_errata(u32 addr, u32 cmd, u32* data) ...@@ -127,7 +127,7 @@ int ixp4xx_pci_read_no_errata(u32 addr, u32 cmd, u32* data)
unsigned long flags; unsigned long flags;
int retval = 0; int retval = 0;
spin_lock_irqsave(&ixp4xx_pci_lock, flags); atomic_spin_lock_irqsave(&ixp4xx_pci_lock, flags);
*PCI_NP_AD = addr; *PCI_NP_AD = addr;
...@@ -140,7 +140,7 @@ int ixp4xx_pci_read_no_errata(u32 addr, u32 cmd, u32* data) ...@@ -140,7 +140,7 @@ int ixp4xx_pci_read_no_errata(u32 addr, u32 cmd, u32* data)
if(check_master_abort()) if(check_master_abort())
retval = 1; retval = 1;
spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); atomic_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
return retval; return retval;
} }
...@@ -149,7 +149,7 @@ int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data) ...@@ -149,7 +149,7 @@ int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data)
unsigned long flags; unsigned long flags;
int retval = 0; int retval = 0;
spin_lock_irqsave(&ixp4xx_pci_lock, flags); atomic_spin_lock_irqsave(&ixp4xx_pci_lock, flags);
*PCI_NP_AD = addr; *PCI_NP_AD = addr;
...@@ -162,7 +162,7 @@ int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data) ...@@ -162,7 +162,7 @@ int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data)
if(check_master_abort()) if(check_master_abort())
retval = 1; retval = 1;
spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); atomic_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
return retval; return retval;
} }
......
arch/arm/mach-shark/leds.c
View file @ 8f99f823
...@@ -36,7 +36,7 @@ static char led_state; ...@@ -36,7 +36,7 @@ static char led_state;
static short hw_led_state; static short hw_led_state;
static short saved_state; static short saved_state;
static DEFINE_SPINLOCK(leds_lock); static DEFINE_ATOMIC_SPINLOCK(leds_lock);
short sequoia_read(int addr) { short sequoia_read(int addr) {
outw(addr,0x24); outw(addr,0x24);
...@@ -52,7 +52,7 @@ static void sequoia_leds_event(led_event_t evt) ...@@ -52,7 +52,7 @@ static void sequoia_leds_event(led_event_t evt)
{ {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&leds_lock, flags); atomic_spin_lock_irqsave(&leds_lock, flags);
hw_led_state = sequoia_read(0x09); hw_led_state = sequoia_read(0x09);
...@@ -144,7 +144,7 @@ static void sequoia_leds_event(led_event_t evt) ...@@ -144,7 +144,7 @@ static void sequoia_leds_event(led_event_t evt)
if (led_state & LED_STATE_ENABLED) if (led_state & LED_STATE_ENABLED)
sequoia_write(hw_led_state,0x09); sequoia_write(hw_led_state,0x09);
spin_unlock_irqrestore(&leds_lock, flags); atomic_spin_unlock_irqrestore(&leds_lock, flags);
} }
static int __init leds_init(void) static int __init leds_init(void)
......
arch/arm/mm/cache-l2x0.c
View file @ 8f99f823
...@@ -26,19 +26,19 @@ ...@@ -26,19 +26,19 @@
#define CACHE_LINE_SIZE 32 #define CACHE_LINE_SIZE 32
static void __iomem *l2x0_base; static void __iomem *l2x0_base;
static DEFINE_SPINLOCK(l2x0_lock); static DEFINE_ATOMIC_SPINLOCK(l2x0_lock);
static inline void sync_writel(unsigned long val, unsigned long reg, static inline void sync_writel(unsigned long val, unsigned long reg,
unsigned long complete_mask) unsigned long complete_mask)
{ {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&l2x0_lock, flags); atomic_spin_lock_irqsave(&l2x0_lock, flags);
writel(val, l2x0_base + reg); writel(val, l2x0_base + reg);
/* wait for the operation to complete */ /* wait for the operation to complete */
while (readl(l2x0_base + reg) & complete_mask) while (readl(l2x0_base + reg) & complete_mask)
; ;
spin_unlock_irqrestore(&l2x0_lock, flags); atomic_spin_unlock_irqrestore(&l2x0_lock, flags);
} }
static inline void cache_sync(void) static inline void cache_sync(void)
......
arch/arm/mm/context.c
View file @ 8f99f823
...@@ -14,7 +14,7 @@ ...@@ -14,7 +14,7 @@
#include <asm/mmu_context.h> #include <asm/mmu_context.h>
#include <asm/tlbflush.h> #include <asm/tlbflush.h>
static DEFINE_SPINLOCK(cpu_asid_lock); static DEFINE_ATOMIC_SPINLOCK(cpu_asid_lock);
unsigned int cpu_last_asid = ASID_FIRST_VERSION; unsigned int cpu_last_asid = ASID_FIRST_VERSION;
/* /*
...@@ -32,7 +32,7 @@ void __new_context(struct mm_struct *mm) ...@@ -32,7 +32,7 @@ void __new_context(struct mm_struct *mm)
{ {
unsigned int asid; unsigned int asid;
spin_lock(&cpu_asid_lock); atomic_spin_lock(&cpu_asid_lock);
asid = ++cpu_last_asid; asid = ++cpu_last_asid;
if (asid == 0) if (asid == 0)
asid = cpu_last_asid = ASID_FIRST_VERSION; asid = cpu_last_asid = ASID_FIRST_VERSION;
...@@ -57,7 +57,7 @@ void __new_context(struct mm_struct *mm) ...@@ -57,7 +57,7 @@ void __new_context(struct mm_struct *mm)
dsb(); dsb();
} }
} }
spin_unlock(&cpu_asid_lock); atomic_spin_unlock(&cpu_asid_lock);
mm->cpu_vm_mask = cpumask_of_cpu(smp_processor_id()); mm->cpu_vm_mask = cpumask_of_cpu(smp_processor_id());
mm->context.id = asid; mm->context.id = asid;
......
arch/arm/mm/copypage-v4mc.c
View file @ 8f99f823
...@@ -30,7 +30,7 @@ ...@@ -30,7 +30,7 @@
#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
L_PTE_MT_MINICACHE) L_PTE_MT_MINICACHE)
static DEFINE_SPINLOCK(minicache_lock); static DEFINE_ATOMIC_SPINLOCK(minicache_lock);
/* /*
* ARMv4 mini-dcache optimised copy_user_highpage * ARMv4 mini-dcache optimised copy_user_highpage
...@@ -76,14 +76,14 @@ void v4_mc_copy_user_highpage(struct page *to, struct page *from, ...@@ -76,14 +76,14 @@ void v4_mc_copy_user_highpage(struct page *to, struct page *from,
if (test_and_clear_bit(PG_dcache_dirty, &from->flags)) if (test_and_clear_bit(PG_dcache_dirty, &from->flags))
__flush_dcache_page(page_mapping(from), from); __flush_dcache_page(page_mapping(from), from);
spin_lock(&minicache_lock); atomic_spin_lock(&minicache_lock);
set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(page_to_pfn(from), minicache_pgprot), 0); set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
flush_tlb_kernel_page(0xffff8000); flush_tlb_kernel_page(0xffff8000);
mc_copy_user_page((void *)0xffff8000, kto); mc_copy_user_page((void *)0xffff8000, kto);
spin_unlock(&minicache_lock); atomic_spin_unlock(&minicache_lock);
kunmap_atomic(kto, KM_USER1); kunmap_atomic(kto, KM_USER1);
} }
......
arch/arm/mm/copypage-v6.c
View file @ 8f99f823
...@@ -27,7 +27,7 @@ ...@@ -27,7 +27,7 @@
#define from_address (0xffff8000) #define from_address (0xffff8000)
#define to_address (0xffffc000) #define to_address (0xffffc000)
static DEFINE_SPINLOCK(v6_lock); static DEFINE_ATOMIC_SPINLOCK(v6_lock);
/* /*
* Copy the user page. No aliasing to deal with so we can just * Copy the user page. No aliasing to deal with so we can just
...@@ -88,7 +88,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to, ...@@ -88,7 +88,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
* Now copy the page using the same cache colour as the * Now copy the page using the same cache colour as the
* pages ultimate destination. * pages ultimate destination.
*/ */
spin_lock(&v6_lock); atomic_spin_lock(&v6_lock);
set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0); set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0);
set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0); set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0);
...@@ -101,7 +101,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to, ...@@ -101,7 +101,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
copy_page((void *)kto, (void *)kfrom); copy_page((void *)kto, (void *)kfrom);
spin_unlock(&v6_lock); atomic_spin_unlock(&v6_lock);
} }
/* /*
...@@ -121,13 +121,13 @@ static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vad ...@@ -121,13 +121,13 @@ static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vad
* Now clear the page using the same cache colour as * Now clear the page using the same cache colour as
* the pages ultimate destination. * the pages ultimate destination.
*/ */
spin_lock(&v6_lock); atomic_spin_lock(&v6_lock);
set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0); set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0);
flush_tlb_kernel_page(to); flush_tlb_kernel_page(to);
clear_page((void *)to); clear_page((void *)to);
spin_unlock(&v6_lock); atomic_spin_unlock(&v6_lock);
} }
struct cpu_user_fns v6_user_fns __initdata = { struct cpu_user_fns v6_user_fns __initdata = {
......
arch/arm/mm/copypage-xscale.c
View file @ 8f99f823
...@@ -32,7 +32,7 @@ ...@@ -32,7 +32,7 @@
#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
L_PTE_MT_MINICACHE) L_PTE_MT_MINICACHE)
static DEFINE_SPINLOCK(minicache_lock); static DEFINE_ATOMIC_SPINLOCK(minicache_lock);
/* /*
* XScale mini-dcache optimised copy_user_highpage * XScale mini-dcache optimised copy_user_highpage
...@@ -98,14 +98,14 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from, ...@@ -98,14 +98,14 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from,
if (test_and_clear_bit(PG_dcache_dirty, &from->flags)) if (test_and_clear_bit(PG_dcache_dirty, &from->flags))
__flush_dcache_page(page_mapping(from), from); __flush_dcache_page(page_mapping(from), from);
spin_lock(&minicache_lock); atomic_spin_lock(&minicache_lock);
set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0); set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
flush_tlb_kernel_page(COPYPAGE_MINICACHE); flush_tlb_kernel_page(COPYPAGE_MINICACHE);
mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto); mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
spin_unlock(&minicache_lock); atomic_spin_unlock(&minicache_lock);
kunmap_atomic(kto, KM_USER1); kunmap_atomic(kto, KM_USER1);
} }
......
arch/arm/mm/dma-mapping.c
View file @ 8f99f823
...@@ -41,7 +41,7 @@ ...@@ -41,7 +41,7 @@
* These are the page tables (2MB each) covering uncached, DMA consistent allocations * These are the page tables (2MB each) covering uncached, DMA consistent allocations
*/ */
static pte_t *consistent_pte[NUM_CONSISTENT_PTES]; static pte_t *consistent_pte[NUM_CONSISTENT_PTES];
static DEFINE_SPINLOCK(consistent_lock); static DEFINE_ATOMIC_SPINLOCK(consistent_lock);
/* /*
* VM region handling support. * VM region handling support.
...@@ -97,7 +97,7 @@ arm_vm_region_alloc(struct arm_vm_region *head, size_t size, gfp_t gfp) ...@@ -97,7 +97,7 @@ arm_vm_region_alloc(struct arm_vm_region *head, size_t size, gfp_t gfp)
if (!new) if (!new)
goto out; goto out;
spin_lock_irqsave(&consistent_lock, flags); atomic_spin_lock_irqsave(&consistent_lock, flags);
list_for_each_entry(c, &head->vm_list, vm_list) { list_for_each_entry(c, &head->vm_list, vm_list) {
if ((addr + size) < addr) if ((addr + size) < addr)
...@@ -118,11 +118,11 @@ arm_vm_region_alloc(struct arm_vm_region *head, size_t size, gfp_t gfp) ...@@ -118,11 +118,11 @@ arm_vm_region_alloc(struct arm_vm_region *head, size_t size, gfp_t gfp)
new->vm_end = addr + size; new->vm_end = addr + size;
new->vm_active = 1; new->vm_active = 1;
spin_unlock_irqrestore(&consistent_lock, flags); atomic_spin_unlock_irqrestore(&consistent_lock, flags);
return new; return new;
nospc: nospc:
spin_unlock_irqrestore(&consistent_lock, flags); atomic_spin_unlock_irqrestore(&consistent_lock, flags);
kfree(new); kfree(new);
out: out:
return NULL; return NULL;
...@@ -317,9 +317,9 @@ static int dma_mmap(struct device *dev, struct vm_area_struct *vma, ...@@ -317,9 +317,9 @@ static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
spin_lock_irqsave(&consistent_lock, flags); atomic_spin_lock_irqsave(&consistent_lock, flags);
c = arm_vm_region_find(&consistent_head, (unsigned long)cpu_addr); c = arm_vm_region_find(&consistent_head, (unsigned long)cpu_addr);
spin_unlock_irqrestore(&consistent_lock, flags); atomic_spin_unlock_irqrestore(&consistent_lock, flags);
if (c) { if (c) {
unsigned long off = vma->vm_pgoff; unsigned long off = vma->vm_pgoff;
...@@ -378,13 +378,13 @@ void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr ...@@ -378,13 +378,13 @@ void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr
size = PAGE_ALIGN(size); size = PAGE_ALIGN(size);
spin_lock_irqsave(&consistent_lock, flags); atomic_spin_lock_irqsave(&consistent_lock, flags);
c = arm_vm_region_find(&consistent_head, (unsigned long)cpu_addr); c = arm_vm_region_find(&consistent_head, (unsigned long)cpu_addr);
if (!c) if (!c)
goto no_area; goto no_area;
c->vm_active = 0; c->vm_active = 0;
spin_unlock_irqrestore(&consistent_lock, flags); atomic_spin_unlock_irqrestore(&consistent_lock, flags);
if ((c->vm_end - c->vm_start) != size) { if ((c->vm_end - c->vm_start) != size) {
printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n", printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
...@@ -431,15 +431,15 @@ void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr ...@@ -431,15 +431,15 @@ void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr
flush_tlb_kernel_range(c->vm_start, c->vm_end); flush_tlb_kernel_range(c->vm_start, c->vm_end);
spin_lock_irqsave(&consistent_lock, flags); atomic_spin_lock_irqsave(&consistent_lock, flags);
list_del(&c->vm_list); list_del(&c->vm_list);
spin_unlock_irqrestore(&consistent_lock, flags); atomic_spin_unlock_irqrestore(&consistent_lock, flags);
kfree(c); kfree(c);
return; return;
no_area: no_area:
spin_unlock_irqrestore(&consistent_lock, flags); atomic_spin_unlock_irqrestore(&consistent_lock, flags);
printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n", printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",
__func__, cpu_addr); __func__, cpu_addr);
dump_stack(); dump_stack();
......
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