Commit 8be80ed3 authored by Bernd Schmidt's avatar Bernd Schmidt Committed by Bryan Wu

Blackfin arch: Initialize the exception vectors early in the boot process

Initialize the exception vectors early in the boot process, so that CPLB faults
can be handled when memory protection is enabled.
Signed-off-by: default avatarBernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: default avatarBryan Wu <bryan.wu@analog.com>
parent d6e274dd
......@@ -425,6 +425,7 @@ void __init setup_arch(char **cmdline_p)
BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
!= ATOMIC_XOR32 - FIXED_CODE_START);
init_exception_vectors();
bf53x_cache_init();
}
......
......@@ -358,26 +358,10 @@ static void bf561_demux_gpio_irq(unsigned int inta_irq,
#endif /* CONFIG_IRQCHIP_DEMUX_GPIO */
/*
* This function should be called during kernel startup to initialize
* the BFin IRQ handling routines.
*/
int __init init_arch_irq(void)
void __init init_exception_vectors(void)
{
int irq;
unsigned long ilat = 0;
/* Disable all the peripheral intrs - page 4-29 HW Ref manual */
bfin_write_SICA_IMASK0(SIC_UNMASK_ALL);
bfin_write_SICA_IMASK1(SIC_UNMASK_ALL);
SSYNC();
bfin_write_SICA_IWR0(IWR_ENABLE_ALL);
bfin_write_SICA_IWR1(IWR_ENABLE_ALL);
local_irq_disable();
init_exception_buff();
#ifndef CONFIG_KGDB
bfin_write_EVT0(evt_emulation);
#endif
......@@ -395,6 +379,27 @@ int __init init_arch_irq(void)
bfin_write_EVT14(evt14_softirq);
bfin_write_EVT15(evt_system_call);
CSYNC();
}
/*
* This function should be called during kernel startup to initialize
* the BFin IRQ handling routines.
*/
int __init init_arch_irq(void)
{
int irq;
unsigned long ilat = 0;
/* Disable all the peripheral intrs - page 4-29 HW Ref manual */
bfin_write_SICA_IMASK0(SIC_UNMASK_ALL);
bfin_write_SICA_IMASK1(SIC_UNMASK_ALL);
SSYNC();
bfin_write_SICA_IWR0(IWR_ENABLE_ALL);
bfin_write_SICA_IWR1(IWR_ENABLE_ALL);
local_irq_disable();
init_exception_buff();
for (irq = 0; irq <= SYS_IRQS; irq++) {
if (irq <= IRQ_CORETMR)
......
......@@ -713,6 +713,29 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq,
}
#endif /* CONFIG_IRQCHIP_DEMUX_GPIO */
void __init init_exception_vectors(void)
{
SSYNC();
#ifndef CONFIG_KGDB
bfin_write_EVT0(evt_emulation);
#endif
bfin_write_EVT2(evt_evt2);
bfin_write_EVT3(trap);
bfin_write_EVT5(evt_ivhw);
bfin_write_EVT6(evt_timer);
bfin_write_EVT7(evt_evt7);
bfin_write_EVT8(evt_evt8);
bfin_write_EVT9(evt_evt9);
bfin_write_EVT10(evt_evt10);
bfin_write_EVT11(evt_evt11);
bfin_write_EVT12(evt_evt12);
bfin_write_EVT13(evt_evt13);
bfin_write_EVT14(evt14_softirq);
bfin_write_EVT15(evt_system_call);
CSYNC();
}
/*
* This function should be called during kernel startup to initialize
* the BFin IRQ handling routines.
......@@ -733,29 +756,10 @@ int __init init_arch_irq(void)
bfin_write_SIC_IMASK(SIC_UNMASK_ALL);
bfin_write_SIC_IWR(IWR_ENABLE_ALL);
#endif
SSYNC();
local_irq_disable();
#ifndef CONFIG_KGDB
bfin_write_EVT0(evt_emulation);
#endif
bfin_write_EVT2(evt_evt2);
bfin_write_EVT3(trap);
bfin_write_EVT5(evt_ivhw);
bfin_write_EVT6(evt_timer);
bfin_write_EVT7(evt_evt7);
bfin_write_EVT8(evt_evt8);
bfin_write_EVT9(evt_evt9);
bfin_write_EVT10(evt_evt10);
bfin_write_EVT11(evt_evt11);
bfin_write_EVT12(evt_evt12);
bfin_write_EVT13(evt_evt13);
bfin_write_EVT14(evt14_softirq);
bfin_write_EVT15(evt_system_call);
CSYNC();
#if defined(CONFIG_IRQCHIP_DEMUX_GPIO) && defined(CONFIG_BF54x)
#ifdef CONFIG_PINTx_REASSIGN
pint[0]->assign = CONFIG_PINT0_ASSIGN;
......
......@@ -61,6 +61,7 @@ extern void bfin_dcache_init(void);
extern int read_iloc(void);
extern int bfin_console_init(void);
extern asmlinkage void lower_to_irq14(void);
extern void init_exception_vectors(void);
extern void init_dma(void);
extern void program_IAR(void);
extern void evt14_softirq(void);
......
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