Commit 890aeacf authored by Jeremy Fitzhardinge's avatar Jeremy Fitzhardinge

x86/ioapic.c: unify __mask_IO_APIC_irq()

The main difference between 32 and 64-bit __mask_IO_APIC_irq() does a
readback from the I/O APIC to synchronize it.

If there's a hardware requirement to do a readback sync after updating
an APIC register, then it will be a hardware requrement regardless of
whether the kernel is compiled 32 or 64-bit.

Unify __mask_IO_APIC_irq() using the 64-bit version which always syncs
with io_apic_sync().
Signed-off-by: default avatarJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
parent 2f210deb
...@@ -580,7 +580,6 @@ static void __unmask_IO_APIC_irq(struct irq_cfg *cfg) ...@@ -580,7 +580,6 @@ static void __unmask_IO_APIC_irq(struct irq_cfg *cfg)
io_apic_modify_irq(cfg, ~IO_APIC_REDIR_MASKED, 0, NULL); io_apic_modify_irq(cfg, ~IO_APIC_REDIR_MASKED, 0, NULL);
} }
#ifdef CONFIG_X86_64
static void io_apic_sync(struct irq_pin_list *entry) static void io_apic_sync(struct irq_pin_list *entry)
{ {
/* /*
...@@ -596,12 +595,8 @@ static void __mask_IO_APIC_irq(struct irq_cfg *cfg) ...@@ -596,12 +595,8 @@ static void __mask_IO_APIC_irq(struct irq_cfg *cfg)
{ {
io_apic_modify_irq(cfg, ~0, IO_APIC_REDIR_MASKED, &io_apic_sync); io_apic_modify_irq(cfg, ~0, IO_APIC_REDIR_MASKED, &io_apic_sync);
} }
#else /* CONFIG_X86_32 */
static void __mask_IO_APIC_irq(struct irq_cfg *cfg)
{
io_apic_modify_irq(cfg, ~0, IO_APIC_REDIR_MASKED, NULL);
}
#ifdef CONFIG_X86_32
static void __mask_and_edge_IO_APIC_irq(struct irq_cfg *cfg) static void __mask_and_edge_IO_APIC_irq(struct irq_cfg *cfg)
{ {
io_apic_modify_irq(cfg, ~IO_APIC_REDIR_LEVEL_TRIGGER, io_apic_modify_irq(cfg, ~IO_APIC_REDIR_LEVEL_TRIGGER,
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment