Commit 870e08a5 authored by Kevin Hilman's avatar Kevin Hilman

ARM: DaVinci: compile fixes after 2.6.24 merge

Special thanks to Dirk for the IDE and net fixes.
Signed-off-by: default avatarDirk Behme <dirk.behme@googlemail.com>
Signed-off-by: default avatarKevin Hilman <khilman@mvista.com>
parent 45ced3b3
......@@ -45,7 +45,6 @@
static ide_hwif_t *palm_bk3710_hwif = NULL;
struct ide_pci_device_s palm_bk3710_dummydata;
palm_bk3710_ideregs *palm_bk3710_base = NULL;
long ide_palm_clk = 0;
/*
......@@ -354,7 +353,7 @@ static int palm_bk3710_hostdma(ide_drive_t * drive, u8 xferspeed)
static inline int palm_bk3710_drivedma(ide_drive_t * pDrive)
{
u8 speed = ide_rate_filter(pDrive, 2); /* We have a 76.5 MHz clock hence only UDMA66 is possible */
u8 speed = ide_set_xfer_rate(pDrive, 2); /* We have a 76.5 MHz clock hence only UDMA66 is possible */
/* If no DMA/single word DMA was available or the chipset has DMA bugs
then disable DMA and use PIO */
......@@ -362,7 +361,7 @@ static inline int palm_bk3710_drivedma(ide_drive_t * pDrive)
palm_bk3710_tune_drive(pDrive, 255);
} else {
palm_bk3710_hostdma(pDrive, speed);
ide_tune_dma(pDrive);
ide_set_dma(pDrive);
}
return 0;
......@@ -383,7 +382,7 @@ static int palm_bk3710_checkdma(ide_drive_t * drive)
drive->init_speed = 0;
if ((id->capability & 1) && drive->autodma) {
if ((id->capability & 1) && (!drive->nodma) && (!noautodma)) {
if (id->field_valid & 4) {
if (id->dma_ultra & hwif->ultra_mask) {
/* Force if Capable UltraDMA */
......@@ -405,7 +404,7 @@ static int palm_bk3710_checkdma(ide_drive_t * drive)
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
no_dma_set:
hwif->tuneproc(drive, 255);
palm_bk3710_tune_drive(drive, 255);
hwif->dma_off_quietly(drive);
}
......@@ -492,24 +491,16 @@ int palm_bk3710_init(void)
ide_ctlr_info.irq = IRQ_IDE;
ide_ctlr_info.chipset = ide_palm3710;
ide_ctlr_info.ack_intr = NULL;
if (ide_register_hw(&ide_ctlr_info, 0, &palm_bk3710_hwif) < 0) {
if (ide_register_hw(&ide_ctlr_info, NULL, 0, &palm_bk3710_hwif) < 0) {
printk("Palm Chip BK3710 IDE Register Fail\n");
return -1;
}
palm_bk3710_hwif->tuneproc = &palm_bk3710_tune_drive;
palm_bk3710_hwif->noprobe = 0;
#ifndef CONFIG_DAVINCI_BLK_DEV_CF
#ifdef CONFIG_BLK_DEV_IDEDMA
palm_bk3710_hwif->speedproc = &palm_bk3710_hostdma;
/* Just put this for using the ide-dma.c init code */
palm_bk3710_dummydata.extra = 0;
palm_bk3710_hwif->cds = &palm_bk3710_dummydata;
/* Setup up the memory map base for this instance of hwif */
palm_bk3710_hwif->mmio = 0;
palm_bk3710_hwif->ide_dma_check = palm_bk3710_checkdma;
palm_bk3710_hwif->ultra_mask = 0x1f; /* Ultra DMA Mode 4 Max
(input clk 99MHz) */
palm_bk3710_hwif->mwdma_mask = 0x7;
......@@ -520,8 +511,8 @@ int palm_bk3710_init(void)
IO_ADDRESS(IDE_PALM_REG_MMAP_BASE) + 2;
palm_bk3710_hwif->dma_prdtable =
IO_ADDRESS(IDE_PALM_REG_MMAP_BASE) + 4;
palm_bk3710_hwif->drives[0].autodma = 1;
palm_bk3710_hwif->drives[1].autodma = 1;
palm_bk3710_hwif->drives[0].nodma = 0;
palm_bk3710_hwif->drives[1].nodma = 0;
ide_setup_dma(palm_bk3710_hwif,
IO_ADDRESS(IDE_PALM_REG_MMAP_BASE), 8);
palm_bk3710_checkdma (&palm_bk3710_hwif->drives[0]);
......
......@@ -393,7 +393,8 @@ config VIDEO_TVP5146
config VIDEO_DAVINCI
tristate "Davinci Video Capture"
depends on VIDEO_DEV && VIDEO_TVP5146 && ARCH_DAVINCI
select VIDEO_BUF
select VIDEOBUF_GEN
select VIDEOBUF_DMA_SG
help
Support for Davinci based frame grabber through CCDC.
......
......@@ -1499,6 +1499,8 @@ typedef struct emac_dev_s {
unsigned long set_to_close;
void *led_handle;
struct napi_struct napi;
/* DDC related parameters */
emac_status ddc_status;
......@@ -1637,7 +1639,7 @@ static int emac_net_rx_cb(emac_dev_t * dev,
void *rx_args);
static int emac_poll(struct net_device *netdev, int *budget);
static int emac_poll(struct napi_struct *napi, int budget);
#ifdef CONFIG_NET_POLL_CONTROLLER
static void emac_poll_controller(struct net_device *dev);
#endif
......@@ -1813,9 +1815,9 @@ static inline void emac_free(void *ptr)
kfree(ptr);
}
#define EMAC_CACHE_INVALIDATE(addr, size) consistent_sync((void *)addr, size, DMA_FROM_DEVICE)
#define EMAC_CACHE_WRITEBACK(addr, size) consistent_sync((void *)addr, size, DMA_TO_DEVICE)
#define EMAC_CACHE_WRITEBACK_INVALIDATE(addr, size) consistent_sync((void *)addr,size, DMA_BIDIRECTIONAL)
#define EMAC_CACHE_INVALIDATE(addr, size) dma_cache_maint((void *)addr, size, DMA_FROM_DEVICE)
#define EMAC_CACHE_WRITEBACK(addr, size) dma_cache_maint((void *)addr, size, DMA_TO_DEVICE)
#define EMAC_CACHE_WRITEBACK_INVALIDATE(addr, size) dma_cache_maint((void *)addr,size, DMA_BIDIRECTIONAL)
/* buffer-descriptors in IO space. No cache invalidation needed */
#define BD_CACHE_INVALIDATE(addr, size)
......@@ -3450,11 +3452,10 @@ static int emac_dev_init(struct net_device *netdev)
netdev->set_multicast_list = emac_dev_mcast_set;
netdev->tx_timeout = emac_tx_timeout;
netdev->set_mac_address = emac_dev_set_mac_addr;
netdev->poll = emac_poll;
#ifdef CONFIG_NET_POLL_CONTROLLER
netdev->poll_controller = emac_poll_controller;
#endif
netdev->weight = EMAC_DEFAULT_RX_MAX_SERVICE;
netif_napi_add(netdev, &dev->napi, emac_poll, 16);
/* reset the broadcast and multicast flags and enable them
based upon configuration of driver */
......@@ -4504,6 +4505,8 @@ static int emac_open(emac_dev_t * _dev, void *param)
dev->regs->rx_free_buffer[channel] = 0;
}
napi_enable(&dev->napi);
/* finally set MAC control register, enable MII */
dev->mac_control |= (1 << EMAC_MACCONTROL_MIIEN_SHIFT);
dev->regs->mac_control = dev->mac_control;
......@@ -4545,6 +4548,8 @@ static int emac_close(emac_dev_t * _dev, void *param)
return (EMAC_ERR_DEV_ALREADY_CLOSED);
}
napi_disable(&dev->napi);
/* stop the tick timer via DDA */
emac_control_cb(dev, EMAC_IOCTL_TIMER_STOP, NULL, NULL);
......@@ -6510,17 +6515,17 @@ static int emac_rx_bdproc(emac_dev_t * _dev, u32 channel,
/* Linux 2.6 Kernel Ethernet Poll function Call only RX processing in
* the poll function - TX is taken care of in interrupt context
*/
static int emac_poll(struct net_device *netdev, int *budget)
static int emac_poll(struct napi_struct *napi, int budget)
{
emac_dev_t *dev = netdev_priv(netdev);
unsigned int work = min(netdev->quota, *budget);
struct emac_dev_s *dev = container_of(napi, struct emac_dev_s, napi);
struct net_device *netdev = dev->next_device;
unsigned int pkts_pending = 0;
/* this is used to pass the rx packets to be processed and
* return the number of rx packets processed */
rx_tx_params *napi_params = &dev->napi_rx_tx;
if (!dev->set_to_close) {
napi_params->rx_pkts = work;
napi_params->rx_pkts = budget;
napi_params->tx_pkts = EMAC_DEFAULT_TX_MAX_SERVICE;
/* process packets - call the DDC packet processing function */
......@@ -6529,14 +6534,10 @@ static int emac_poll(struct net_device *netdev, int *budget)
/* if more packets reschedule the tasklet or call
* pkt_process_end */
if (!pkts_pending) {
if (test_bit(__LINK_STATE_RX_SCHED, &netdev->state)) {
netif_rx_complete(netdev);
}
emac_pkt_process_end(dev, NULL);
__netif_rx_complete(netdev, napi);
return 0;
} else if (!test_bit(0, &dev->set_to_close)) {
*budget -= napi_params->ret_rx_pkts;
netdev->quota -= napi_params->ret_rx_pkts;
return 1;
}
}
......@@ -6671,7 +6672,7 @@ irqreturn_t emac_hal_isr(int irq, void *dev_id)
++dev->isr_count;
if (!dev->set_to_close) {
/* NAPI support */
netif_rx_schedule(dev->owner);
netif_rx_schedule(dev->next_device, &dev->napi);
} else {
/* we are closing down, so dont process anything */
}
......
......@@ -1851,6 +1851,9 @@ config FB_IBM_GXT4500
config FB_DAVINCI
bool "Davinci Framebuffer support"
depends on FB && ARCH_DAVINCI
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
help
This is the frame buffer device driver for the DaVinci video
hardware found on the TI DaVinci EVM. If
......
......@@ -122,7 +122,7 @@ obj-$(CONFIG_FB_EFI) += efifb.o
obj-$(CONFIG_FB_VGA16) += vga16fb.o
obj-$(CONFIG_FB_OF) += offb.o
obj-$(CONFIG_FB_BF54X_LQ043) += bf54x-lq043fb.o
obj-$(CONFIG_FB_DAVINCI += davincifb.o
obj-$(CONFIG_FB_DAVINCI) += davincifb.o
# the test framebuffer is last
obj-$(CONFIG_FB_VIRTUAL) += vfb.o
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment