ARM: OMAP: DSPGW: DSP Gateway driver 3.3.1

Here's the patch that updates DSP Gateway driver to 3.3.1, that
supports omap2 DSP. It also contains generic mailbox interface
considering IVA use on 2420, but this patch itself doesn't contain any
IVA driver.

Regarding omap2, this code is tested only on our 2420 custom board, so
feedbacks from testing on other chips / boards will be greatly
appreciated.
Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com>

arch/arm/mach-omap1/Kconfig

@@ -179,5 +179,3 @@ config OMAP_ARM_30MHZ
 	help
           Enable 30MHz clock for OMAP CPU. If unsure, say N.
 
-source "arch/arm/plat-omap/dsp/Kconfig"
-

arch/arm/mach-omap2/io.c

@@ -44,6 +44,24 @@ static struct map_desc omap2_io_desc[] __initdata = {
 		.pfn		= __phys_to_pfn(L4_24XX_PHYS),
 		.length		= L4_24XX_SIZE,
 		.type		= MT_DEVICE
+	},
+	{
+		.virtual	= DSP_MEM_24XX_VIRT,
+		.pfn		= __phys_to_pfn(DSP_MEM_24XX_PHYS),
+		.length		= DSP_MEM_24XX_SIZE,
+		.type		= MT_DEVICE
+	},
+	{
+		.virtual	= DSP_IPI_24XX_VIRT,
+		.pfn		= __phys_to_pfn(DSP_IPI_24XX_PHYS),
+		.length		= DSP_IPI_24XX_SIZE,
+		.type		= MT_DEVICE
+	},
+	{
+		.virtual	= DSP_MMU_24XX_VIRT,
+		.pfn		= __phys_to_pfn(DSP_MMU_24XX_PHYS),
+		.length		= DSP_MMU_24XX_SIZE,
+		.type		= MT_DEVICE
 	}
 };
 

arch/arm/plat-omap/Kconfig

@@ -172,6 +172,8 @@ config OMAP_SERIAL_WAKE
 	  to data on the serial RX line. This allows you to wake the
 	  system from serial console.
 
+source "arch/arm/plat-omap/dsp/Kconfig"
+
 endmenu
 
 endif

arch/arm/plat-omap/Makefile

@@ -26,4 +26,4 @@ obj-$(CONFIG_OMAP_COMPONENT_VERSION) += component-version.o
 obj-$(CONFIG_OMAP_GPIO_SWITCH) += gpio-switch.o
 
 # DSP subsystem
-obj-y += dsp/
+obj-$(CONFIG_OMAP_DSP) += dsp/ mailbox.o

arch/arm/plat-omap/dsp/Kconfig

 
 config OMAP_DSP
 	tristate "OMAP DSP driver (DSP Gateway)"
-	depends on ARCH_OMAP15XX || ARCH_OMAP16XX
+	depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP24XX
 	help
 	  This enables OMAP DSP driver, DSP Gateway.
 

arch/arm/plat-omap/dsp/dsp_common.h

 /*
- * linux/arch/arm/mach-omap/dsp/dsp_common.h
+ * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
  *
- * Header for OMAP DSP driver static part
+ * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved.
  *
- * Copyright (C) 2002-2005 Nokia Corporation
+ * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
  *
- * Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation. 
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
  *
- * 2005/06/13:  DSP Gateway version 3.3
  */
 
+#ifndef DRIVER_DSP_COMMON_H
+#define DRIVER_DSP_COMMON_H
+
 #include "hardware_dsp.h"
 
 #define DSPSPACE_SIZE	0x1000000
@@ -36,48 +36,49 @@
 	do { omap_writel(omap_readl(r) | (b), (r)); } while(0)
 #define omap_clr_bit_regl(b,r) \
 	do { omap_writel(omap_readl(r) & ~(b), (r)); } while(0)
+#define omap_set_bits_regl(val,mask,r) \
+	do { omap_writel((omap_readl(r) & ~(mask)) | (val), (r)); } while(0)
+
+#if defined(CONFIG_ARCH_OMAP15XX)
+#define INT_DSP_MMU	INT_1510_DSP_MMU
+#elif defined(CONFIG_ARCH_OMAP16XX)
+#define INT_DSP_MMU	INT_1610_DSP_MMU
+#elif defined(CONFIG_ARCH_OMAP24XX)
+#define INT_DSP_MMU	INT_24XX_DSP_MMU
+#endif
 
 #define dspword_to_virt(dw)	((void *)(dspmem_base + ((dw) << 1)))
 #define dspbyte_to_virt(db)	((void *)(dspmem_base + (db)))
-#define virt_to_dspword(va)	(((unsigned long)(va) - dspmem_base) >> 1)
-#define virt_to_dspbyte(va)	((unsigned long)(va) - dspmem_base)
+#define virt_to_dspword(va) \
+	((dsp_long_t)(((unsigned long)(va) - dspmem_base) >> 1))
+#define virt_to_dspbyte(va) \
+	((dsp_long_t)((unsigned long)(va) - dspmem_base))
 #define is_dsp_internal_mem(va) \
 	(((unsigned long)(va) >= dspmem_base) &&  \
 	 ((unsigned long)(va) < dspmem_base + dspmem_size))
 #define is_dspbyte_internal_mem(db)	((db) < dspmem_size)
 #define is_dspword_internal_mem(dw)	(((dw) << 1) < dspmem_size)
 
+#ifdef CONFIG_ARCH_OMAP1
 /*
  * MPUI byteswap/wordswap on/off
  *   default setting: wordswap = all, byteswap = APIMEM only
  */
 #define mpui_wordswap_on() \
-	do { \
-		omap_writel( \
-			(omap_readl(MPUI_CTRL) & ~MPUI_CTRL_WORDSWAP_MASK) | \
-			MPUI_CTRL_WORDSWAP_ALL, MPUI_CTRL); \
-	} while(0)
+	omap_set_bits_regl(MPUI_CTRL_WORDSWAP_ALL, MPUI_CTRL_WORDSWAP_MASK, \
+			   MPUI_CTRL)
 
 #define mpui_wordswap_off() \
-	do { \
-		omap_writel( \
-			(omap_readl(MPUI_CTRL) & ~MPUI_CTRL_WORDSWAP_MASK) | \
-			MPUI_CTRL_WORDSWAP_NONE, MPUI_CTRL); \
-	} while(0)
+	omap_set_bits_regl(MPUI_CTRL_WORDSWAP_NONE, MPUI_CTRL_WORDSWAP_MASK, \
+			   MPUI_CTRL)
 
 #define mpui_byteswap_on() \
-	do { \
-		omap_writel( \
-			(omap_readl(MPUI_CTRL) & ~MPUI_CTRL_BYTESWAP_MASK) | \
-			MPUI_CTRL_BYTESWAP_API, MPUI_CTRL); \
-	} while(0)
+	omap_set_bits_regl(MPUI_CTRL_BYTESWAP_API, MPUI_CTRL_BYTESWAP_MASK, \
+			   MPUI_CTRL)
 
 #define mpui_byteswap_off() \
-	do { \
-		omap_writel( \
-			(omap_readl(MPUI_CTRL) & ~MPUI_CTRL_BYTESWAP_MASK) | \
-			MPUI_CTRL_BYTESWAP_NONE, MPUI_CTRL); \
-	} while(0)
+	omap_set_bits_regl(MPUI_CTRL_BYTESWAP_NONE, MPUI_CTRL_BYTESWAP_MASK, \
+			   MPUI_CTRL)
 
 /*
  * TC wordswap on / off
@@ -88,11 +89,7 @@
 			    TC_ENDIANISM); \
 	} while(0)
 
-#define tc_noswap() \
-	do {  \
-		omap_writel(omap_readl(TC_ENDIANISM) & ~TC_ENDIANISM_EN, \
-			    TC_ENDIANISM); \
-	} while(0)
+#define tc_noswap()	omap_clr_bit_regl(TC_ENDIANISM_EN, TC_ENDIANISM)
 
 /*
  * enable priority registers, EMIF, MPUI control logic
@@ -101,32 +98,60 @@
 #define __dsp_disable()	omap_clr_bit_regw(ARM_RSTCT1_DSP_RST, ARM_RSTCT1)
 #define __dsp_run()	omap_set_bit_regw(ARM_RSTCT1_DSP_EN, ARM_RSTCT1)
 #define __dsp_reset()	omap_clr_bit_regw(ARM_RSTCT1_DSP_EN, ARM_RSTCT1)
+#endif /* CONFIG_ARCH_OMAP1 */
 
+#ifdef CONFIG_ARCH_OMAP2
+/*
+ * PRCM / IPI control logic
+ */
+#define RSTCTRL_RST1_DSP	0x00000001
+#define RSTCTRL_RST2_DSP	0x00000002
+#define __dsp_core_enable() \
+	do { RM_RSTCTRL_DSP &= ~RSTCTRL_RST1_DSP; } while (0)
+#define __dsp_core_disable() \
+	do { RM_RSTCTRL_DSP |= RSTCTRL_RST1_DSP; } while (0)
+#define __dsp_per_enable() \
+	do { RM_RSTCTRL_DSP &= ~RSTCTRL_RST2_DSP; } while (0)
+#define __dsp_per_disable() \
+	do { RM_RSTCTRL_DSP |= RSTCTRL_RST2_DSP; } while (0)
+#endif /* CONFIG_ARCH_OMAP2 */
+
+typedef u32 dsp_long_t;	/* must have ability to carry TADD_ABORTADR */
+
+#if defined(CONFIG_ARCH_OMAP1)
 extern struct clk *dsp_ck_handle;
 extern struct clk *api_ck_handle;
-extern unsigned long dspmem_base, dspmem_size,
-		     daram_base, daram_size,
-		     saram_base, saram_size;
+#elif defined(CONFIG_ARCH_OMAP2)
+extern struct clk *dsp_fck_handle;
+extern struct clk *dsp_ick_handle;
+#endif
+extern dsp_long_t dspmem_base, dspmem_size,
+		  daram_base, daram_size,
+		  saram_base, saram_size;
 
-enum e_cpustat {
+enum cpustat_e {
 	CPUSTAT_RESET = 0,
-	CPUSTAT_GBL_IDLE = 1,
-	CPUSTAT_CPU_IDLE = 2,
-	CPUSTAT_RUN = 3
+#ifdef CONFIG_ARCH_OMAP1
+	CPUSTAT_GBL_IDLE,
+	CPUSTAT_CPU_IDLE,
+#endif
+	CPUSTAT_RUN,
+	CPUSTAT_MAX
 };
 
-#define cpustat_name(stat) \
-	((stat == CPUSTAT_RESET)    ? "RESET" :\
-	 (stat == CPUSTAT_GBL_IDLE) ? "GBL_IDLE" :\
-	 (stat == CPUSTAT_CPU_IDLE) ? "CPU_IDLE" :\
-	 (stat == CPUSTAT_RUN)      ? "RUN" :\
-	 			      "unknown")
-
-int dsp_set_rstvect(unsigned long adr);
-void dsp_set_idle_boot_base(unsigned long adr, size_t size);
-void dsp_cpustat_request(enum e_cpustat req);
-enum e_cpustat dsp_cpustat_get_stat(void);
-unsigned short dsp_cpustat_get_icrmask(void);
-void dsp_cpustat_set_icrmask(unsigned short mask);
+int dsp_set_rstvect(dsp_long_t adr);
+dsp_long_t dsp_get_rstvect(void);
+#ifdef CONFIG_ARCH_OMAP1
+void dsp_set_idle_boot_base(dsp_long_t adr, size_t size);
+void dsp_reset_idle_boot_base(void);
+#endif
+void dsp_cpustat_request(enum cpustat_e req);
+enum cpustat_e dsp_cpustat_get_stat(void);
+u16 dsp_cpustat_get_icrmask(void);
+void dsp_cpustat_set_icrmask(u16 mask);
+#ifdef CONFIG_ARCH_OMAP1
 void dsp_register_mem_cb(int (*req_cb)(void), void (*rel_cb)(void));
 void dsp_unregister_mem_cb(void);
+#endif
+
+#endif /* DRIVER_DSP_COMMON_H */

arch/arm/plat-omap/dsp/dsp_ctl_core.c

 /*
- * linux/arch/arm/mach-omap/dsp/dsp_ctl_core.c
+ * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
  *
- * OMAP DSP control devices core driver
+ * Copyright (C) 2004-2006 Nokia Corporation. All rights reserved.
  *
- * Copyright (C) 2004,2005 Nokia Corporation
+ * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
  *
- * Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation. 
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
  *
- * 2005/07/26:  DSP Gateway version 3.3
  */
 
-#include <linux/module.h>
 #include <linux/major.h>
 #include <linux/fs.h>
 #include <linux/device.h>
 #include <linux/init.h>
-#include <asm/arch/dsp.h>
-#include "hardware_dsp.h"
+#include "dsp.h"
 
 #define CTL_MINOR	0
 #define MEM_MINOR	1
@@ -86,7 +81,6 @@ int __init dsp_ctl_core_init(void)
 {
 	int retval;
 	int i;
-	struct class_device *cdev;
 
 	retval = register_chrdev(OMAP_DSP_CTL_MAJOR, "dspctl",
 				 &dsp_ctl_core_fops);
@@ -99,7 +93,7 @@ int __init dsp_ctl_core_init(void)
 
 	dsp_ctl_class = class_create(THIS_MODULE, "dspctl");
 	for (i = 0; i < ARRAY_SIZE(dev_list); i++) {
-		cdev = class_device_create(dsp_ctl_class, NULL,
+		class_device_create(dsp_ctl_class, NULL,
 				    MKDEV(OMAP_DSP_CTL_MAJOR,
 					  dev_list[i].minor),
 				    NULL, dev_list[i].devname);

arch/arm/plat-omap/dsp/dsp_mbcmd.h

+/*
+ * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
+ *
+ * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved.
+ *
+ * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation. 
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+/*
+ * DSP mailbox protocol definitions
+ */
+#define MBPROT_REVISION	0x0019
+
+#define TCTL_TINIT		0x0000
+#define TCTL_TEN		0x0001
+#define TCTL_TDIS		0x0002
+#define TCTL_TCLR		0x0003
+#define TCTL_TCLR_FORCE		0x0004
+
+#define RUNLEVEL_USER		0x01
+#define RUNLEVEL_SUPER		0x0e
+#define RUNLEVEL_RECOVERY	0x10
+
+#define PM_DISABLE		0x00
+#define PM_ENABLE		0x01
+
+#define KFUNC_FBCTL		0x00
+#define KFUNC_AUDIO_PWR		0x01
+
+#define FBCTL_UPD		0x0000
+#define FBCTL_ENABLE		0x0002
+#define FBCTL_DISABLE		0x0003
+
+#define AUDIO_PWR_UP		0x0000
+#define AUDIO_PWR_DOWN1		0x0001
+#define AUDIO_PWR_DOWN2		0x0002
+
+#define TDEL_SAFE		0x0000
+#define TDEL_KILL		0x0001
+
+#define DSPCFG_REQ		0x00
+#define DSPCFG_SYSADRH		0x28
+#define DSPCFG_SYSADRL		0x29
+#define DSPCFG_PROTREV		0x70
+#define DSPCFG_ABORT		0x78
+#define DSPCFG_LAST		0x80
+
+#define REGRW_MEMR		0x00
+#define REGRW_MEMW		0x01
+#define REGRW_IOR		0x02
+#define REGRW_IOW		0x03
+#define REGRW_DATA		0x04
+
+#define VARID_ICRMASK		0x00
+#define VARID_LOADINFO		0x01
+
+#define TTYP_ARCV		0x0001
+#define TTYP_ASND		0x0002
+#define TTYP_BKMD		0x0004
+#define TTYP_BKDM		0x0008
+#define TTYP_PVMD		0x0010
+#define TTYP_PVDM		0x0020
+
+#define EID_BADTID		0x10
+#define EID_BADTCN		0x11
+#define EID_BADBID		0x20
+#define EID_BADCNT		0x21
+#define EID_NOTLOCKED		0x22
+#define EID_STVBUF		0x23
+#define EID_BADADR		0x24
+#define EID_BADTCTL		0x30
+#define EID_BADPARAM		0x50
+#define EID_FATAL		0x58
+#define EID_NOMEM		0xc0
+#define EID_NORES		0xc1
+#define EID_IPBFULL		0xc2
+#define EID_WDT			0xd0
+#define EID_TASKNOTRDY		0xe0
+#define EID_TASKBSY		0xe1
+#define EID_TASKERR		0xef
+#define EID_BADCFGTYP		0xf0
+#define EID_DEBUG		0xf8
+#define EID_BADSEQ		0xfe
+#define EID_BADCMD		0xff
+
+#define TNM_LEN			16
+
+#define TID_FREE		0xff
+#define TID_ANON		0xfe
+
+#define BID_NULL		0xffff
+#define BID_PVT			0xfffe

arch/arm/plat-omap/dsp/error.c

 /*
- * linux/arch/arm/mach-omap/dsp/error.c
+ * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
  *
- * OMAP DSP error detection I/F device driver
+ * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved.
  *
- * Copyright (C) 2002-2005 Nokia Corporation
+ * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
  *
- * Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation. 
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
  *
- * 2005/03/11:  DSP Gateway version 3.3
  */
 
 #include <linux/module.h>
-#include <linux/init.h>
-#include <linux/major.h>
 #include <linux/fs.h>
 #include <linux/poll.h>
 #include <linux/sched.h>
 #include <linux/interrupt.h>
 #include <asm/uaccess.h>
-#include <asm/io.h>
-#include <asm/ioctls.h>
-#include <asm/arch/dsp.h>
+#include "dsp_mbcmd.h"
 #include "dsp.h"
 
+/*
+ * value seen through read()
+ */
+#define DSP_ERR_WDT	0x00000001
+#define DSP_ERR_MMU	0x00000002
+static unsigned long errval;
+
 static DECLARE_WAIT_QUEUE_HEAD(err_wait_q);
-static unsigned long errcode;
 static int errcnt;
-static unsigned short wdtval;	/* FIXME: read through ioctl */
-static unsigned long mmu_fadr;	/* FIXME: read through ioctl */
+static u16 wdtval;	/* FIXME: read through ioctl */
+static u32 mmu_fadr;	/* FIXME: read through ioctl */
 
 /*
  * DSP error detection device file operations
  */
-static ssize_t dsp_err_read(struct file *file, char *buf, size_t count,
+static ssize_t dsp_err_read(struct file *file, char __user *buf, size_t count,
 			    loff_t *ppos)
 {
 	unsigned long flags;
@@ -71,7 +70,7 @@ static ssize_t dsp_err_read(struct file *file, char *buf, size_t count,
 	}
 
 	local_irq_save(flags);
-	status = copy_to_user(buf, &errcode, 4);
+	status = copy_to_user(buf, &errval, 4);
 	if (status) {
 		local_irq_restore(flags);
 		return -EFAULT;
@@ -100,68 +99,86 @@ struct file_operations dsp_err_fops = {
 };
 
 /*
- * DSP MMU
+ * set / clear functions
  */
-void dsp_err_mmu_set(unsigned long adr)
+
+/* DSP MMU */
+static void dsp_err_mmu_set(unsigned long arg)
 {
 	disable_irq(INT_DSP_MMU);
-	errcode |= OMAP_DSP_ERRDT_MMU;
-	errcnt++;
-	mmu_fadr = adr;
-	wake_up_interruptible(&err_wait_q);
+	mmu_fadr = (u32)arg;
 }
 
-void dsp_err_mmu_clear(void)
+static void dsp_err_mmu_clr(void)
 {
-	errcode &= ~OMAP_DSP_ERRDT_MMU;
 	enable_irq(INT_DSP_MMU);
 }
 
-int dsp_err_mmu_isset(void)
+/* WDT */
+static void dsp_err_wdt_set(unsigned long arg)
 {
-	return (errcode & OMAP_DSP_ERRDT_MMU) ? 1 : 0;
+	wdtval = (u16)arg;
 }
 
 /*
- * WDT
+ * error code handler
  */
-void dsp_err_wdt_clear(void)
+static struct {
+	unsigned long val;
+	void (*set)(unsigned long arg);
+	void (*clr)(void);
+} dsp_err_desc[ERRCODE_MAX] = {
+	[ERRCODE_MMU] = { DSP_ERR_MMU, dsp_err_mmu_set, dsp_err_mmu_clr },
+	[ERRCODE_WDT] = { DSP_ERR_WDT, dsp_err_wdt_set, NULL },
+};
+
+void dsp_err_set(enum errcode_e code, unsigned long arg)
 {
-	errcode &= ~OMAP_DSP_ERRDT_WDT;
+	if (dsp_err_desc[code].set != NULL)
+		dsp_err_desc[code].set(arg);
+
+	errval |= dsp_err_desc[code].val;
+	errcnt++;
+	wake_up_interruptible(&err_wait_q);
+}
+
+void dsp_err_clear(enum errcode_e code)
+{
+	errval &= ~dsp_err_desc[code].val;
+
+	if (dsp_err_desc[code].clr != NULL)
+		dsp_err_desc[code].clr();
 }
 
-int dsp_err_wdt_isset(void)
+int dsp_err_isset(enum errcode_e code)
 {
-	return (errcode & OMAP_DSP_ERRDT_WDT) ? 1 : 0;
+	return (errval & dsp_err_desc[code].val) ? 1 : 0;
 }
 
 /*
- * functions called from mailbox1 interrupt routine
+ * functions called from mailbox interrupt routine
  */
-static void mbx1_err_wdt(unsigned short data)
+static void mbx_err_wdt(u16 data)
 {
-	errcode |= OMAP_DSP_ERRDT_WDT;
-	errcnt++;
-	wdtval = data;
-	wake_up_interruptible(&err_wait_q);
+	dsp_err_set(DSP_ERR_WDT, (unsigned long)data);
 }
 
 #ifdef OLD_BINARY_SUPPORT
 /* v3.3 obsolete */
-void mbx1_wdt(struct mbcmd *mb)
+void mbx_wdt(struct mbcmd *mb)
 {
-	mbx1_err_wdt(mb->data);
+	mbx_err_wdt(mb->data);
 }
 #endif
 
-extern void mbx1_err_ipbfull(void);
-extern void mbx1_err_fatal(unsigned char tid);
+extern void mbx_err_ipbfull(void);
+extern void mbx_err_fatal(u8 tid);
 
-void mbx1_err(struct mbcmd *mb)
+void mbx_err(struct mbcmd *mb)
 {
-	unsigned char eid = mb->cmd_l;
+	u8 eid = mb->cmd_l;
 	char *eidnm = subcmd_name(mb);
-	unsigned char tid;
+	u8 tid;
 
 	if (eidnm) {
 		printk(KERN_WARNING
@@ -173,17 +190,17 @@ void mbx1_err(struct mbcmd *mb)
 	}
 
 	switch (eid) {
-	case OMAP_DSP_EID_IPBFULL:
-		mbx1_err_ipbfull();
+	case EID_IPBFULL:
+		mbx_err_ipbfull();
 		break;
 
-	case OMAP_DSP_EID_FATAL:
+	case EID_FATAL:
 		tid = mb->data & 0x00ff;
-		mbx1_err_fatal(tid);
+		mbx_err_fatal(tid);
 		break;
 
-	case OMAP_DSP_EID_WDT:
-		mbx1_err_wdt(mb->data);
+	case EID_WDT:
+		mbx_err_wdt(mb->data);
 		break;
 	}
 }
@@ -193,11 +210,14 @@ void mbx1_err(struct mbcmd *mb)
  */
 void dsp_err_start(void)
 {
+	enum errcode_e i;
+
+	for (i = 0; i < ERRCODE_MAX; i++) {
+		if (dsp_err_isset(i))
+			dsp_err_clear(i);
+	}
+
 	errcnt = 0;
-	if (dsp_err_wdt_isset())
-		dsp_err_wdt_clear();
-	if (dsp_err_mmu_isset())
-		dsp_err_mmu_clear();
 }
 
 void dsp_err_stop(void)

arch/arm/plat-omap/dsp/fifo.h

 /*
- * linux/arch/arm/mach-omap/dsp/fifo.h
+ * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
  *
- * FIFO buffer operators
+ * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved.
  *
- * Copyright (C) 2002-2005 Nokia Corporation
+ * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
  *
- * Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation. 
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
  *
- * 2005/02/24:  DSP Gateway version 3.3
  */
 
 struct fifo_struct {
@@ -53,8 +50,10 @@ static inline int init_fifo(struct fifo_struct *fifo, size_t sz)
 static inline void free_fifo(struct fifo_struct *fifo)
 {
 	spin_lock(&fifo->lock);
-	if (fifo->buf == NULL)
+	if (fifo->buf == NULL) {
+		spin_unlock(&fifo->lock);
 		return;
+	}
 
 	kfree(fifo->buf);
 	fifo->buf = NULL;
@@ -87,25 +86,17 @@ static inline int realloc_fifo(struct fifo_struct *fifo, size_t sz)
 		kfree(fifo->buf);
 
 	/* alloc */
-	if ((fifo->buf = kmalloc(sz, GFP_KERNEL)) == NULL) {
-		fifo->sz = 0;
-		ret = -ENOMEM;
-		goto out;
-	}
-	fifo->sz = sz;
-	fifo->cnt = 0;
-	fifo->wp = 0;
+	ret = alloc_fifo(fifo, sz);
 
 out:
 	spin_unlock(&fifo->lock);
 	return ret;
 }
 
-static inline void write_word_to_fifo(struct fifo_struct *fifo,
-				      unsigned short word)
+static inline void write_word_to_fifo(struct fifo_struct *fifo, u16 word)
 {
 	spin_lock(&fifo->lock);
-	*(unsigned short *)&fifo->buf[fifo->wp] = word;
+	*(u16 *)&fifo->buf[fifo->wp] = word;
 	if ((fifo->wp += 2) == fifo->sz)
 		fifo->wp = 0;
 	if ((fifo->cnt += 2) > fifo->sz)

arch/arm/plat-omap/dsp/hardware_dsp.h

 /*
- * linux/arch/arm/mach-omap/dsp/hardware_dsp.h
+ * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
  *
- * Register bit definitions for DSP driver
+ * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved.
  *
- * Copyright (C) 2002-2005 Nokia Corporation
+ * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
  *
- * Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation. 
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
  *
- * 2005/05/30:  DSP Gateway version 3.3
  */
 
 #ifndef __OMAP_DSP_HARDWARE_DSP_H
 #define __OMAP_DSP_HARDWARE_DSP_H
 
-#ifdef CONFIG_ARCH_OMAP15XX
-#define OMAP1510_DARAM_BASE	0xe0000000
-#define OMAP1510_DARAM_SIZE	0x10000
-#define OMAP1510_SARAM_BASE	0xe0010000
-#define OMAP1510_SARAM_SIZE	0x18000
+#ifdef CONFIG_ARCH_OMAP1
+#include "omap1_dsp.h"
 #endif
-#ifdef CONFIG_ARCH_OMAP16XX
-#define OMAP16XX_DARAM_BASE	0xe0000000
-#define OMAP16XX_DARAM_SIZE	0x10000
-#define OMAP16XX_SARAM_BASE	0xe0010000
-#define OMAP16XX_SARAM_SIZE	0x18000
+#ifdef CONFIG_ARCH_OMAP2
+#include "omap2_dsp.h"
 #endif
 
-/*
- * MAJOR device number: !! allocated arbitrary !!
- */
-#define OMAP_DSP_CTL_MAJOR		96
-#define OMAP_DSP_TASK_MAJOR		97
-
-/*
- * Reset Control
- */
-#define ARM_RSTCT1_SW_RST		0x0008
-#define ARM_RSTCT1_DSP_RST		0x0004
-#define ARM_RSTCT1_DSP_EN		0x0002
-#define ARM_RSTCT1_ARM_RST		0x0001
-
-/*
- * MPUI
- */
-#define MPUI_CTRL_WORDSWAP_MASK		0x00600000
-#define MPUI_CTRL_WORDSWAP_ALL		0x00000000
-#define MPUI_CTRL_WORDSWAP_NONAPI	0x00200000
-#define MPUI_CTRL_WORDSWAP_API		0x00400000
-#define MPUI_CTRL_WORDSWAP_NONE		0x00600000
-#define MPUI_CTRL_AP_MASK		0x001c0000
-#define MPUI_CTRL_AP_MDH		0x00000000
-#define MPUI_CTRL_AP_MHD		0x00040000
-#define MPUI_CTRL_AP_DMH		0x00080000
-#define MPUI_CTRL_AP_HMD		0x000c0000
-#define MPUI_CTRL_AP_DHM		0x00100000
-#define MPUI_CTRL_AP_HDM		0x00140000
-#define MPUI_CTRL_BYTESWAP_MASK		0x00030000
-#define MPUI_CTRL_BYTESWAP_NONE		0x00000000
-#define MPUI_CTRL_BYTESWAP_NONAPI	0x00010000
-#define MPUI_CTRL_BYTESWAP_ALL		0x00020000
-#define MPUI_CTRL_BYTESWAP_API		0x00030000
-#define MPUI_CTRL_TIMEOUT_MASK		0x0000ff00
-#define MPUI_CTRL_APIF_HNSTB_DIV_MASK	0x000000f0
-#define MPUI_CTRL_S_NABORT_GL		0x00000008
-#define MPUI_CTRL_S_NABORT_32BIT	0x00000004
-#define MPUI_CTRL_EN_TIMEOUT		0x00000002
-#define MPUI_CTRL_HF_MCUCLK		0x00000001
-#define MPUI_DSP_BOOT_CONFIG_DIRECT	0x00000000
-#define MPUI_DSP_BOOT_CONFIG_PSD_DIRECT	0x00000001
-#define MPUI_DSP_BOOT_CONFIG_IDLE	0x00000002
-#define MPUI_DSP_BOOT_CONFIG_DL16	0x00000003
-#define MPUI_DSP_BOOT_CONFIG_DL32	0x00000004
-#define MPUI_DSP_BOOT_CONFIG_MPUI	0x00000005
-#define MPUI_DSP_BOOT_CONFIG_INTERNAL	0x00000006
-
-/*
- * DSP boot mode
- *   direct:        0xffff00
- *   pseudo direct: 0x080000
- *   MPUI:          branch 0x010000
- *   internel:      branch 0x024000
- */
-#define DSP_BOOT_ADR_DIRECT		0xffff00
-#define DSP_BOOT_ADR_PSD_DIRECT		0x080000
-#define DSP_BOOT_ADR_MPUI		0x010000
-#define DSP_BOOT_ADR_INTERNAL		0x024000
-
-/*
- * TC
- */
-#define TC_ENDIANISM_SWAP		0x00000002
-#define TC_ENDIANISM_SWAP_WORD		0x00000002
-#define TC_ENDIANISM_SWAP_BYTE		0x00000000
-#define TC_ENDIANISM_EN			0x00000001
-
-/*
- * DSP MMU
- */
-#define DSPMMU_BASE			(0xfffed200)
-#define DSPMMU_PREFETCH			(DSPMMU_BASE + 0x00)
-#define DSPMMU_WALKING_ST		(DSPMMU_BASE + 0x04)
-#define DSPMMU_CNTL			(DSPMMU_BASE + 0x08)
-#define DSPMMU_FAULT_AD_H		(DSPMMU_BASE + 0x0c)
-#define DSPMMU_FAULT_AD_L		(DSPMMU_BASE + 0x10)
-#define DSPMMU_FAULT_ST			(DSPMMU_BASE + 0x14)
-#define DSPMMU_IT_ACK			(DSPMMU_BASE + 0x18)
-#define DSPMMU_TTB_H			(DSPMMU_BASE + 0x1c)
-#define DSPMMU_TTB_L			(DSPMMU_BASE + 0x20)
-#define DSPMMU_LOCK			(DSPMMU_BASE + 0x24)
-#define DSPMMU_LD_TLB			(DSPMMU_BASE + 0x28)
-#define DSPMMU_CAM_H			(DSPMMU_BASE + 0x2c)
-#define DSPMMU_CAM_L			(DSPMMU_BASE + 0x30)
-#define DSPMMU_RAM_H			(DSPMMU_BASE + 0x34)
-#define DSPMMU_RAM_L			(DSPMMU_BASE + 0x38)
-#define DSPMMU_GFLUSH			(DSPMMU_BASE + 0x3c)
-#define DSPMMU_FLUSH_ENTRY		(DSPMMU_BASE + 0x40)
-#define DSPMMU_READ_CAM_H		(DSPMMU_BASE + 0x44)
-#define DSPMMU_READ_CAM_L		(DSPMMU_BASE + 0x48)
-#define DSPMMU_READ_RAM_H		(DSPMMU_BASE + 0x4c)
-#define DSPMMU_READ_RAM_L		(DSPMMU_BASE + 0x50)
-
-#define DSPMMU_CNTL_BURST_16MNGT_EN	0x0020
-#define DSPMMU_CNTL_WTL_EN		0x0004
-#define DSPMMU_CNTL_MMU_EN		0x0002
-#define DSPMMU_CNTL_RESET_SW		0x0001
-
-#define DSPMMU_FAULT_AD_H_DP		0x0100
-#define DSPMMU_FAULT_AD_H_ADR_MASK	0x00ff
-
-#define DSPMMU_FAULT_ST_PREF		0x0008
-#define DSPMMU_FAULT_ST_PERM		0x0004
-#define DSPMMU_FAULT_ST_TLB_MISS	0x0002
-#define DSPMMU_FAULT_ST_TRANS		0x0001
-
-#define DSPMMU_IT_ACK_IT_ACK		0x0001
-
-#define DSPMMU_LOCK_BASE_MASK		0xfc00
-#define DSPMMU_LOCK_BASE_SHIFT		10
-#define DSPMMU_LOCK_VICTIM_MASK		0x03f0
-#define DSPMMU_LOCK_VICTIM_SHIFT	4
-
-#define DSPMMU_CAM_H_VA_TAG_H_MASK		0x0003
-
-#define DSPMMU_CAM_L_VA_TAG_L1_MASK		0xc000
-#define DSPMMU_CAM_L_VA_TAG_L2_MASK_1MB		0x0000
-#define DSPMMU_CAM_L_VA_TAG_L2_MASK_64KB	0x3c00
-#define DSPMMU_CAM_L_VA_TAG_L2_MASK_4KB		0x3fc0
-#define DSPMMU_CAM_L_VA_TAG_L2_MASK_1KB		0x3ff0
-#define DSPMMU_CAM_L_P				0x0008
-#define DSPMMU_CAM_L_V				0x0004
-#define DSPMMU_CAM_L_SLST_MASK			0x0003
-#define DSPMMU_CAM_L_SLST_1MB			0x0000
-#define DSPMMU_CAM_L_SLST_64KB			0x0001
-#define DSPMMU_CAM_L_SLST_4KB			0x0002
-#define DSPMMU_CAM_L_SLST_1KB			0x0003
-
-#define DSPMMU_RAM_L_RAM_LSB_MASK	0xfc00
-#define DSPMMU_RAM_L_AP_MASK		0x0300
-#define DSPMMU_RAM_L_AP_NA		0x0000
-#define DSPMMU_RAM_L_AP_RO		0x0200
-#define DSPMMU_RAM_L_AP_FA		0x0300
-
-#define DSPMMU_GFLUSH_GFLUSH		0x0001
-
-#define DSPMMU_FLUSH_ENTRY_FLUSH_ENTRY	0x0001
-
-#define DSPMMU_LD_TLB_RD		0x0002
-#define DSPMMU_LD_TLB_LD		0x0001
-
-/*
- * Mailbox
- */
-#define MAILBOX_BASE			(0xfffcf000)
-#define MAILBOX_ARM2DSP1		(MAILBOX_BASE + 0x00)
-#define MAILBOX_ARM2DSP1b		(MAILBOX_BASE + 0x04)
-#define MAILBOX_DSP2ARM1		(MAILBOX_BASE + 0x08)
-#define MAILBOX_DSP2ARM1b		(MAILBOX_BASE + 0x0c)
-#define MAILBOX_DSP2ARM2		(MAILBOX_BASE + 0x10)
-#define MAILBOX_DSP2ARM2b		(MAILBOX_BASE + 0x14)
-#define MAILBOX_ARM2DSP1_Flag		(MAILBOX_BASE + 0x18)
-#define MAILBOX_DSP2ARM1_Flag		(MAILBOX_BASE + 0x1c)
-#define MAILBOX_DSP2ARM2_Flag		(MAILBOX_BASE + 0x20)
-
-/*
- * DSP ICR
- */
-#define DSPREG_ICR_RESERVED_BITS	0xffc0
-#define DSPREG_ICR_EMIF_IDLE_DOMAIN	0x0020
-#define DSPREG_ICR_DPLL_IDLE_DOMAIN	0x0010
-#define DSPREG_ICR_PER_IDLE_DOMAIN	0x0008
-#define DSPREG_ICR_CACHE_IDLE_DOMAIN	0x0004
-#define DSPREG_ICR_DMA_IDLE_DOMAIN	0x0002
-#define DSPREG_ICR_CPU_IDLE_DOMAIN	0x0001
-
 #endif /* __OMAP_DSP_HARDWARE_DSP_H */

arch/arm/plat-omap/dsp/ioctl.h

+/*
+ * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
+ *
+ * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved.
+ *
+ * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation. 
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+/*
+ * for /dev/dspctl/ctl
+ */
+#define DSPCTL_IOCTL_RESET		1
+#define DSPCTL_IOCTL_RUN		2
+#define DSPCTL_IOCTL_SETRSTVECT		3
+#ifdef CONFIG_ARCH_OMAP1
+#define DSPCTL_IOCTL_CPU_IDLE		4
+#define DSPCTL_IOCTL_MPUI_WORDSWAP_ON	5
+#define DSPCTL_IOCTL_MPUI_WORDSWAP_OFF	6
+#define DSPCTL_IOCTL_MPUI_BYTESWAP_ON	7
+#define DSPCTL_IOCTL_MPUI_BYTESWAP_OFF	8
+#define DSPCTL_IOCTL_GBL_IDLE		9
+#endif /* CONFIG_ARCH_OMAP1 */
+#define DSPCTL_IOCTL_DSPCFG		10
+#define DSPCTL_IOCTL_DSPUNCFG		11
+#define DSPCTL_IOCTL_TASKCNT		12
+#define DSPCTL_IOCTL_POLL		13
+#define DSPCTL_IOCTL_REGMEMR		40
+#define DSPCTL_IOCTL_REGMEMW		41
+#define DSPCTL_IOCTL_REGIOR		42
+#define DSPCTL_IOCTL_REGIOW		43
+#define DSPCTL_IOCTL_GETVAR		44
+#define DSPCTL_IOCTL_SETVAR		45
+#define DSPCTL_IOCTL_RUNLEVEL		50
+#define DSPCTL_IOCTL_SUSPEND		51
+#define DSPCTL_IOCTL_RESUME		52
+#ifdef CONFIG_OMAP_DSP_FBEXPORT
+#define DSPCTL_IOCTL_FBEN		53
+#define DSPCTL_IOCTL_FBDIS		54
+#endif /* CONFIG_OMAP_DSP_FBEXPORT */
+#define DSPCTL_IOCTL_MBSEND		99
+
+struct omap_dsp_mailbox_cmd {
+	__u16 cmd;
+	__u16 data;
+};
+
+struct omap_dsp_reginfo {
+	__u16 adr;
+	__u16 val;
+};
+
+struct omap_dsp_varinfo {
+	__u8 varid;
+	__u16 val[0];
+};
+
+/*
+ * for taskdev
+ * (ioctls below should be >= 0x10000)
+ */
+#define TASK_IOCTL_BFLSH	0x10000
+#define TASK_IOCTL_SETBSZ	0x10001
+#define TASK_IOCTL_LOCK		0x10002
+#define TASK_IOCTL_UNLOCK	0x10003
+#define TASK_IOCTL_GETNAME	0x10004
+
+/*
+ * for /dev/dspctl/mem
+ */
+#define MEM_IOCTL_EXMAP		1
+#define MEM_IOCTL_EXUNMAP	2
+#define MEM_IOCTL_EXMAP_FLUSH	3
+#define MEM_IOCTL_FBEXPORT	5
+#ifdef CONFIG_ARCH_OMAP1
+#define MEM_IOCTL_MMUITACK	7
+#endif
+#define MEM_IOCTL_MMUINIT	9
+#define MEM_IOCTL_KMEM_RESERVE	11
+#define MEM_IOCTL_KMEM_RELEASE	12
+
+struct omap_dsp_mapinfo {
+	__u32 dspadr;
+	__u32 size;
+};
+
+/*
+ * for /dev/dspctl/twch
+ */
+#define TWCH_IOCTL_MKDEV	1
+#define TWCH_IOCTL_RMDEV	2
+#define TWCH_IOCTL_TADD		11
+#define TWCH_IOCTL_TDEL		12
+#define TWCH_IOCTL_TKILL	13
+
+struct omap_dsp_taddinfo {
+	__u8 minor;
+	__u32 taskadr;
+};
+
+#define TADD_ABORTADR	0xffffffff

arch/arm/plat-omap/dsp/ipbuf.c

 /*
- * linux/arch/arm/mach-omap/dsp/ipbuf.c
+ * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
  *
- * IPBUF handler
+ * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved.
  *
- * Copyright (C) 2002-2005 Nokia Corporation
+ * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
  *
- * Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation. 
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
  *
- * 2005/06/06:  DSP Gateway version 3.3
  */
 
-#include <linux/init.h>
 #include <linux/sched.h>
-#include <linux/interrupt.h>
-#include <linux/workqueue.h>
 #include <linux/device.h>
-#include <asm/signal.h>
-#include <asm/arch/dsp.h>
+#include <asm/arch/mailbox.h>
+#include "dsp_mbcmd.h"
 #include "dsp.h"
 #include "ipbuf.h"
 
-struct ipbuf **ipbuf;
+static struct ipbuf_head *g_ipbuf;
 struct ipbcfg ipbcfg;
 struct ipbuf_sys *ipbuf_sys_da, *ipbuf_sys_ad;
 static struct ipblink ipb_free = IPBLINK_INIT;
 static int ipbuf_sys_hold_mem_active;
 
+static ssize_t ipbuf_show(struct device *dev, struct device_attribute *attr,
+			  char *buf);
+static struct device_attribute dev_attr_ipbuf = __ATTR_RO(ipbuf);
+
 void ipbuf_stop(void)
 {
 	int i;
 
+	device_remove_file(&dsp_device.dev, &dev_attr_ipbuf);
+
 	spin_lock(&ipb_free.lock);
-	INIT_IPBLINK(&ipb_free);
+	RESET_IPBLINK(&ipb_free);
 	spin_unlock(&ipb_free.lock);
 
 	ipbcfg.ln = 0;
-	if (ipbuf) {
-		kfree(ipbuf);
-		ipbuf = NULL;
+	if (g_ipbuf) {
+		kfree(g_ipbuf);
+		g_ipbuf = NULL;
 	}
 	for (i = 0; i < ipbuf_sys_hold_mem_active; i++) {
 		dsp_mem_disable((void *)daram_base);
@@ -59,9 +59,9 @@ void ipbuf_stop(void)
 	ipbuf_sys_hold_mem_active = 0;
 }
 
-int ipbuf_config(unsigned short ln, unsigned short lsz, void *base)
+int ipbuf_config(u16 ln, u16 lsz, void *base)
 {
-	unsigned long lsz_byte = ((unsigned long)lsz) << 1;
+	size_t lsz_byte = ((size_t)lsz) << 1;
 	size_t size;
 	int ret = 0;
 	int i;
@@ -79,8 +79,8 @@ int ipbuf_config(unsigned short ln, unsigned short lsz, void *base)
 	if (dsp_address_validate(base, size, "global ipbuf") < 0)
 		return -EINVAL;
 
-	ipbuf = kmalloc(sizeof(void *) * ln, GFP_KERNEL);
-	if (ipbuf == NULL) {
+	g_ipbuf = kmalloc(sizeof(struct ipbuf_head) * ln, GFP_KERNEL);
+	if (g_ipbuf == NULL) {
 		printk(KERN_ERR
 		       "omapdsp: memory allocation for ipbuf failed.\n");
 		return -ENOMEM;
@@ -90,7 +90,8 @@ int ipbuf_config(unsigned short ln, unsigned short lsz, void *base)
 
 		top = base + (sizeof(struct ipbuf) + lsz_byte) * i;
 		btm = base + (sizeof(struct ipbuf) + lsz_byte) * (i+1) - 1;
-		ipbuf[i] = (struct ipbuf *)top;
+		g_ipbuf[i].p = (struct ipbuf *)top;
+		g_ipbuf[i].bid = i;
 		if (((unsigned long)top & 0xfffe0000) !=
 		    ((unsigned long)btm & 0xfffe0000)) {
 			/*
@@ -99,7 +100,7 @@ int ipbuf_config(unsigned short ln, unsigned short lsz, void *base)
 			 */
 			printk(KERN_ERR
 			       "omapdsp: ipbuf[%d] crosses 64k-word boundary!\n"
-			       "  @0x%p, size=0x%08lx\n", i, top, lsz_byte);
+			       "  @0x%p, size=0x%08x\n", i, top, lsz_byte);
 			ret = -EINVAL;
 			goto free_out;
 		}
@@ -115,15 +116,17 @@ int ipbuf_config(unsigned short ln, unsigned short lsz, void *base)
 	       "           %d words * %d lines at 0x%p.\n",
 	       ipbcfg.lsz, ipbcfg.ln, ipbcfg.base);
 
+	device_create_file(&dsp_device.dev, &dev_attr_ipbuf);
+
 	return ret;
 
 free_out:
-	kfree(ipbuf);
-	ipbuf = NULL;
+	kfree(g_ipbuf);
+	g_ipbuf = NULL;
 	return ret;
 }
 
-int ipbuf_sys_config(void *p, enum arm_dsp_dir dir)
+int ipbuf_sys_config(void *p, enum arm_dsp_dir_e dir)
 {
 	char *dir_str = (dir == DIR_D2A) ? "D2A" : "A2D";
 
@@ -158,7 +161,7 @@ int ipbuf_sys_config(void *p, enum arm_dsp_dir dir)
 	return 0;
 }
 
-int ipbuf_p_validate(void *p, enum arm_dsp_dir dir)
+int ipbuf_p_validate(void *p, enum arm_dsp_dir_e dir)
 {
 	char *dir_str = (dir == DIR_D2A) ? "D2A" : "A2D";
 
@@ -175,57 +178,60 @@ int ipbuf_p_validate(void *p, enum arm_dsp_dir dir)
 /*
  * Global IPBUF operations
  */
-unsigned short get_free_ipbuf(unsigned char tid)
+struct ipbuf_head *bid_to_ipbuf(u16 bid)
 {
-	unsigned short bid;
+	return &g_ipbuf[bid];
+}
+
+struct ipbuf_head *get_free_ipbuf(u8 tid)
+{
+	struct ipbuf_head *ipb_h;
 
 	if (dsp_mem_enable_ipbuf() < 0)
-		return OMAP_DSP_BID_NULL;
+		return NULL;
 
 	spin_lock(&ipb_free.lock);
 
 	if (ipblink_empty(&ipb_free)) {
 		/* FIXME: wait on queue when not available.  */
-		bid = OMAP_DSP_BID_NULL;
+		ipb_h = NULL;
 		goto out;
 	}
-	bid = ipb_free.top;
-	ipbuf[bid]->la = tid;	/* lock */
-	ipblink_del_top(&ipb_free, ipbuf);
+	ipb_h = &g_ipbuf[ipb_free.top];
+	ipb_h->p->la = tid;	/* lock */
+	__ipblink_del_top(&ipb_free);
 out:
 	spin_unlock(&ipb_free.lock);
 	dsp_mem_disable_ipbuf();
 
-	return bid;
+	return ipb_h;
 }
 
-void release_ipbuf(unsigned short bid)
+void release_ipbuf(struct ipbuf_head *ipb_h)
 {
-	if (ipbuf[bid]->la == OMAP_DSP_TID_FREE) {
+	if (ipb_h->p->la == TID_FREE) {
 		printk(KERN_WARNING
 		       "omapdsp: attempt to release unlocked IPBUF[%d].\n",
-		       bid);
+		       ipb_h->bid);
 		/*
 		 * FIXME: re-calc bsycnt
 		 */
 		return;
 	}
-	ipbuf[bid]->la = OMAP_DSP_TID_FREE;
-	ipbuf[bid]->sa = OMAP_DSP_TID_FREE;
-	spin_lock(&ipb_free.lock);
-	ipblink_add_tail(&ipb_free, bid, ipbuf);
-	spin_unlock(&ipb_free.lock);
+	ipb_h->p->la = TID_FREE;
+	ipb_h->p->sa = TID_FREE;
+	ipblink_add_tail(&ipb_free, ipb_h->bid);
 }
 
-static int try_yld(unsigned short bid)
+static int try_yld(struct ipbuf_head *ipb_h)
 {
 	int status;
 
-	ipbuf[bid]->sa = OMAP_DSP_TID_ANON;
-	status = dsp_mbsend(MBCMD(BKYLD), 0, bid);
+	ipb_h->p->sa = TID_ANON;
+	status = mbcompose_send(BKYLD, 0, ipb_h->bid);
 	if (status < 0) {
 		/* DSP is busy and ARM keeps this line. */
-		release_ipbuf(bid);
+		release_ipbuf(ipb_h);
 		return status;
 	}
 
@@ -239,12 +245,11 @@ static int try_yld(unsigned short bid)
 static void do_balance_ipbuf(void)
 {
 	while (ipbcfg.bsycnt <= ipbcfg.ln / 4) {
-		unsigned short bid;
+		struct ipbuf_head *ipb_h;
 
-		bid = get_free_ipbuf(OMAP_DSP_TID_ANON);
-		if (bid == OMAP_DSP_BID_NULL)
+		if ((ipb_h = get_free_ipbuf(TID_ANON)) == NULL)
 			return;
-		if (try_yld(bid) < 0)
+		if (try_yld(ipb_h) < 0)
 			return;
 	}
 }
@@ -258,31 +263,31 @@ void balance_ipbuf(void)
 }
 
 /* for process context */
-void unuse_ipbuf(unsigned short bid)
+void unuse_ipbuf(struct ipbuf_head *ipb_h)
 {
 	if (ipbcfg.bsycnt > ipbcfg.ln / 4) {
 		/* we don't have enough IPBUF lines. let's keep it. */
-		release_ipbuf(bid);
+		release_ipbuf(ipb_h);
 	} else {
 		/* we have enough IPBUF lines. let's return this line to DSP. */
-		ipbuf[bid]->la = OMAP_DSP_TID_ANON;
-		try_yld(bid);
+		ipb_h->p->la = TID_ANON;
+		try_yld(ipb_h);
 		balance_ipbuf();
 	}
 }
 
 /* for interrupt context */
-void unuse_ipbuf_nowait(unsigned short bid)
+void unuse_ipbuf_nowait(struct ipbuf_head *ipb_h)
 {
-	release_ipbuf(bid);
+	release_ipbuf(ipb_h);
 	balance_ipbuf();
 }
 
 /*
- * functions called from mailbox1 interrupt routine
+ * functions called from mailbox interrupt routine
  */
 
-void mbx1_err_ipbfull(void)
+void mbx_err_ipbfull(void)
 {
 	ipbcfg.cnt_full++;
 }
@@ -294,12 +299,13 @@ static ssize_t ipbuf_show(struct device *dev, struct device_attribute *attr,
 			  char *buf)
 {
 	int len = 0;
-	unsigned short bid;
+	u16 bid;
 
 	for (bid = 0; bid < ipbcfg.ln; bid++) {
-		unsigned short la = ipbuf[bid]->la;
-		unsigned short ld = ipbuf[bid]->ld;
-		unsigned short c  = ipbuf[bid]->c;
+		struct ipbuf_head *ipb_h = &g_ipbuf[bid];
+		u16 la = ipb_h->p->la;
+		u16 ld = ipb_h->p->ld;
+		u16 c  = ipb_h->p->c;
 
 		if (len > PAGE_SIZE - 100) {
 			len += sprintf(buf + len, "out of buffer.\n");
@@ -307,13 +313,13 @@ static ssize_t ipbuf_show(struct device *dev, struct device_attribute *attr,
 		}
 
 		len += sprintf(buf + len, "ipbuf[%d]: adr = 0x%p\n",
-			       bid, ipbuf[bid]);
-		if (la == OMAP_DSP_TID_FREE) {
+			       bid, ipb_h->p);
+		if (la == TID_FREE) {
 			len += sprintf(buf + len,
 				       "  DSPtask[%d]->Linux "
 				       "(already read and now free for Linux)\n",
 				       ld);
-		} else if (ld == OMAP_DSP_TID_FREE) {
+		} else if (ld == TID_FREE) {
 			len += sprintf(buf + len,
 				       "  Linux->DSPtask[%d] "
 				       "(already read and now free for DSP)\n",
@@ -333,7 +339,7 @@ static ssize_t ipbuf_show(struct device *dev, struct device_attribute *attr,
 
 	len += sprintf(buf + len, "\nFree IPBUF link: ");
 	spin_lock(&ipb_free.lock);
-	ipblink_for_each(bid, &ipb_free, ipbuf) {
+	ipblink_for_each(bid, &ipb_free) {
 		len += sprintf(buf + len, "%d ", bid);
 	}
 	spin_unlock(&ipb_free.lock);
@@ -344,5 +350,3 @@ static ssize_t ipbuf_show(struct device *dev, struct device_attribute *attr,
 finish:
 	return len;
 }
-
-struct device_attribute dev_attr_ipbuf = __ATTR_RO(ipbuf);

arch/arm/plat-omap/dsp/ipbuf.h

 /*
- * linux/arch/arm/mach-omap/dsp/ipbuf.h
+ * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
  *
- * Header for IPBUF
+ * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved.
  *
- * Copyright (C) 2002-2005 Nokia Corporation
+ * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
  *
- * Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation. 
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
  *
- * 2005/05/17:  DSP Gateway version 3.3
  */
 
 struct ipbuf {
-	unsigned short c;	/* count */
-	unsigned short next;	/* link */
-	unsigned short la;	/* lock owner (ARM side) */
-	unsigned short sa;	/* sync word (ARM->DSP) */
-	unsigned short ld;	/* lock owner (DSP side) */
-	unsigned short sd;	/* sync word (DSP->ARM) */
+	u16 c;			/* count */
+	u16 next;		/* link */
+	u16 la;			/* lock owner (ARM side) */
+	u16 sa;			/* sync word (ARM->DSP) */
+	u16 ld;			/* lock owner (DSP side) */
+	u16 sd;			/* sync word (DSP->ARM) */
 	unsigned char d[0];	/* data */
 };
 
 struct ipbuf_p {
-	unsigned short c;	/* count */
-	unsigned short s;	/* sync word */
-	unsigned short al;	/* data address lower */
-	unsigned short ah;	/* data address upper */
+	u16 c;		/* count */
+	u16 s;		/* sync word */
+	u16 al;		/* data address lower */
+	u16 ah;		/* data address upper */
 };
 
+#define IPBUF_SYS_DLEN	31
+
 struct ipbuf_sys {
-	unsigned short s;	/* sync word */
-	unsigned short d[31];	/* data */
+	u16 s;			/* sync word */
+	u16 d[IPBUF_SYS_DLEN];	/* data */
 };
 
 struct ipbcfg {
-	unsigned short ln;
-	unsigned short lsz;
+	u16 ln;
+	u16 lsz;
 	void *base;
-	unsigned short bsycnt;
+	u16 bsycnt;
 	unsigned long cnt_full;	/* count of IPBFULL error */
 };
 
-extern struct ipbuf **ipbuf;
+struct ipbuf_head {
+	u16 bid;
+	struct ipbuf *p;
+};
+
 extern struct ipbcfg ipbcfg;
 extern struct ipbuf_sys *ipbuf_sys_da, *ipbuf_sys_ad;
 
 #define ipb_bsycnt_inc(ipbcfg) \
 	do { \
-		disable_irq(INT_D2A_MB1); \
+		disable_mbx_irq(mbx_dsp); \
 		(ipbcfg)->bsycnt++; \
-		enable_irq(INT_D2A_MB1); \
+		enable_mbx_irq(mbx_dsp); \
 	} while(0)
 
 #define ipb_bsycnt_dec(ipbcfg) \
 	do { \
-		disable_irq(INT_D2A_MB1); \
+		disable_mbx_irq(mbx_dsp); \
 		(ipbcfg)->bsycnt--; \
-		enable_irq(INT_D2A_MB1); \
+		enable_mbx_irq(mbx_dsp); \
 	} while(0)
 
 #define dsp_mem_enable_ipbuf()	dsp_mem_enable(ipbcfg.base)
@@ -77,58 +80,120 @@ extern struct ipbuf_sys *ipbuf_sys_da, *ipbuf_sys_ad;
 
 struct ipblink {
 	spinlock_t lock;
-	unsigned short top;
-	unsigned short tail;
+	u16 top;
+	u16 tail;
 };
 
 #define IPBLINK_INIT { \
 		.lock = SPIN_LOCK_UNLOCKED, \
-		.top  = OMAP_DSP_BID_NULL, \
-		.tail = OMAP_DSP_BID_NULL, \
+		.top  = BID_NULL, \
+		.tail = BID_NULL, \
 	}
 
 #define INIT_IPBLINK(link) \
 	do { \
 		spin_lock_init(&(link)->lock); \
-		(link)->top  = OMAP_DSP_BID_NULL; \
-		(link)->tail = OMAP_DSP_BID_NULL; \
+		(link)->top  = BID_NULL; \
+		(link)->tail = BID_NULL; \
 	} while(0)
 
-#define ipblink_empty(link)	((link)->top == OMAP_DSP_BID_NULL)
+#define RESET_IPBLINK(link) \
+	do { \
+		(link)->top  = BID_NULL; \
+		(link)->tail = BID_NULL; \
+	} while(0)
+
+#define ipblink_empty(link)	((link)->top == BID_NULL)
 
-static __inline__ void ipblink_del_top(struct ipblink *link,
-				       struct ipbuf **ipbuf)
+static __inline__ void __ipblink_del_top(struct ipblink *link)
 {
-	struct ipbuf *bufp = ipbuf[link->top];
+	struct ipbuf_head *ipb_h = bid_to_ipbuf(link->top);
 
-	if ((link->top = bufp->next) == OMAP_DSP_BID_NULL)
-		link->tail = OMAP_DSP_BID_NULL;
+	if ((link->top = ipb_h->p->next) == BID_NULL)
+		link->tail = BID_NULL;
 	else
-		bufp->next = OMAP_DSP_BID_NULL;
+		ipb_h->p->next = BID_NULL;
 }
 
-static __inline__ void ipblink_add_tail(struct ipblink *link,
-					unsigned short bid,
-					struct ipbuf **ipbuf)
+static __inline__ void ipblink_del_top(struct ipblink *link)
+{
+	spin_lock(&link->lock);
+	__ipblink_del_top(link);
+	spin_unlock(&link->lock);
+}
+
+static __inline__ void __ipblink_add_tail(struct ipblink *link, u16 bid)
 {
 	if (ipblink_empty(link))
 		link->top = bid;
 	else
-		ipbuf[link->tail]->next = bid;
+		bid_to_ipbuf(link->tail)->p->next = bid;
 	link->tail = bid;
 }
 
+static __inline__ void ipblink_add_tail(struct ipblink *link, u16 bid)
+{
+	spin_lock(&link->lock);
+	__ipblink_add_tail(link, bid);
+	spin_unlock(&link->lock);
+}
+
+static __inline__ void __ipblink_flush(struct ipblink *link)
+{
+	u16 bid;
+
+	while (!ipblink_empty(link)) {
+		bid = link->top;
+		__ipblink_del_top(link);
+		unuse_ipbuf(bid_to_ipbuf(bid));
+	}
+}
+
+static __inline__ void ipblink_flush(struct ipblink *link)
+{
+	spin_lock(&link->lock);
+	__ipblink_flush(link);
+	spin_unlock(&link->lock);
+}
+
+static __inline__ void __ipblink_add_pvt(struct ipblink *link)
+{
+	link->top  = BID_PVT;
+	link->tail = BID_PVT;
+}
+
 static __inline__ void ipblink_add_pvt(struct ipblink *link)
 {
-	link->top  = OMAP_DSP_BID_PVT;
-	link->tail = OMAP_DSP_BID_PVT;
+	spin_lock(&link->lock);
+	__ipblink_add_pvt(link);
+	spin_unlock(&link->lock);
+}
+
+static __inline__ void __ipblink_del_pvt(struct ipblink *link)
+{
+	link->top  = BID_NULL;
+	link->tail = BID_NULL;
 }
 
 static __inline__ void ipblink_del_pvt(struct ipblink *link)
 {
-	link->top  = OMAP_DSP_BID_NULL;
-	link->tail = OMAP_DSP_BID_NULL;
+	spin_lock(&link->lock);
+	__ipblink_del_pvt(link);
+	spin_unlock(&link->lock);
+}
+
+static __inline__ void __ipblink_flush_pvt(struct ipblink *link)
+{
+	if (!ipblink_empty(link))
+		ipblink_del_pvt(link);
+}
+
+static __inline__ void ipblink_flush_pvt(struct ipblink *link)
+{
+	spin_lock(&link->lock);
+	__ipblink_flush_pvt(link);
+	spin_unlock(&link->lock);
 }
 
-#define ipblink_for_each(bid, link, ipbuf) \
-	for (bid = (link)->top; bid != OMAP_DSP_BID_NULL; bid = ipbuf[bid]->next)
+#define ipblink_for_each(bid, link) \
+	for (bid = (link)->top; bid != BID_NULL; bid = bid_to_ipbuf(bid)->p->next)

arch/arm/plat-omap/dsp/omap1_dsp.h

+/*
+ * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
+ *
+ * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved.
+ *
+ * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation. 
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#ifndef __OMAP_DSP_OMAP1_DSP_H
+#define __OMAP_DSP_OMAP1_DSP_H
+
+#ifdef CONFIG_ARCH_OMAP15XX
+#define OMAP1510_DARAM_BASE	(OMAP1510_DSP_BASE + 0x0)
+#define OMAP1510_DARAM_SIZE	0x10000
+#define OMAP1510_SARAM_BASE	(OMAP1510_DSP_BASE + 0x10000)
+#define OMAP1510_SARAM_SIZE	0x18000
+#endif
+
+#ifdef CONFIG_ARCH_OMAP16XX
+#define OMAP16XX_DARAM_BASE	(OMAP16XX_DSP_BASE + 0x0)
+#define OMAP16XX_DARAM_SIZE	0x10000
+#define OMAP16XX_SARAM_BASE	(OMAP16XX_DSP_BASE + 0x10000)
+#define OMAP16XX_SARAM_SIZE	0x18000
+#endif
+
+/*
+ * Reset Control
+ */
+#define ARM_RSTCT1_SW_RST		0x0008
+#define ARM_RSTCT1_DSP_RST		0x0004
+#define ARM_RSTCT1_DSP_EN		0x0002
+#define ARM_RSTCT1_ARM_RST		0x0001
+
+/*
+ * MPUI
+ */
+#define MPUI_CTRL_WORDSWAP_MASK		0x00600000
+#define MPUI_CTRL_WORDSWAP_ALL		0x00000000
+#define MPUI_CTRL_WORDSWAP_NONAPI	0x00200000
+#define MPUI_CTRL_WORDSWAP_API		0x00400000
+#define MPUI_CTRL_WORDSWAP_NONE		0x00600000
+#define MPUI_CTRL_AP_MASK		0x001c0000
+#define MPUI_CTRL_AP_MDH		0x00000000
+#define MPUI_CTRL_AP_MHD		0x00040000
+#define MPUI_CTRL_AP_DMH		0x00080000
+#define MPUI_CTRL_AP_HMD		0x000c0000
+#define MPUI_CTRL_AP_DHM		0x00100000
+#define MPUI_CTRL_AP_HDM		0x00140000
+#define MPUI_CTRL_BYTESWAP_MASK		0x00030000
+#define MPUI_CTRL_BYTESWAP_NONE		0x00000000
+#define MPUI_CTRL_BYTESWAP_NONAPI	0x00010000
+#define MPUI_CTRL_BYTESWAP_ALL		0x00020000
+#define MPUI_CTRL_BYTESWAP_API		0x00030000
+#define MPUI_CTRL_TIMEOUT_MASK		0x0000ff00
+#define MPUI_CTRL_APIF_HNSTB_DIV_MASK	0x000000f0
+#define MPUI_CTRL_S_NABORT_GL		0x00000008
+#define MPUI_CTRL_S_NABORT_32BIT	0x00000004
+#define MPUI_CTRL_EN_TIMEOUT		0x00000002
+#define MPUI_CTRL_HF_MCUCLK		0x00000001
+#define DSP_BOOT_CONFIG_DIRECT		0x00000000
+#define DSP_BOOT_CONFIG_PSD_DIRECT	0x00000001
+#define DSP_BOOT_CONFIG_IDLE		0x00000002
+#define DSP_BOOT_CONFIG_DL16		0x00000003
+#define DSP_BOOT_CONFIG_DL32		0x00000004
+#define DSP_BOOT_CONFIG_MPUI		0x00000005
+#define DSP_BOOT_CONFIG_INTERNAL	0x00000006
+
+/*
+ * DSP boot mode
+ *   direct:        0xffff00
+ *   pseudo direct: 0x080000
+ *   MPUI:          branch 0x010000
+ *   internel:      branch 0x024000
+ */
+#define DSP_BOOT_ADR_DIRECT		0xffff00
+#define DSP_BOOT_ADR_PSD_DIRECT		0x080000
+#define DSP_BOOT_ADR_MPUI		0x010000
+#define DSP_BOOT_ADR_INTERNAL		0x024000
+
+/*
+ * TC
+ */
+#define TC_ENDIANISM_SWAP		0x00000002
+#define TC_ENDIANISM_SWAP_WORD		0x00000002
+#define TC_ENDIANISM_SWAP_BYTE		0x00000000
+#define TC_ENDIANISM_EN			0x00000001
+
+/*
+ * DSP MMU
+ */
+#define DSP_MMU_BASE			(0xfffed200)
+#define DSP_MMU_PREFETCH		(DSP_MMU_BASE + 0x00)
+#define DSP_MMU_WALKING_ST		(DSP_MMU_BASE + 0x04)
+#define DSP_MMU_CNTL			(DSP_MMU_BASE + 0x08)
+#define DSP_MMU_FAULT_AD_H		(DSP_MMU_BASE + 0x0c)
+#define DSP_MMU_FAULT_AD_L		(DSP_MMU_BASE + 0x10)
+#define DSP_MMU_FAULT_ST		(DSP_MMU_BASE + 0x14)
+#define DSP_MMU_IT_ACK			(DSP_MMU_BASE + 0x18)
+#define DSP_MMU_TTB_H			(DSP_MMU_BASE + 0x1c)
+#define DSP_MMU_TTB_L			(DSP_MMU_BASE + 0x20)
+#define DSP_MMU_LOCK			(DSP_MMU_BASE + 0x24)
+#define DSP_MMU_LD_TLB			(DSP_MMU_BASE + 0x28)
+#define DSP_MMU_CAM_H			(DSP_MMU_BASE + 0x2c)
+#define DSP_MMU_CAM_L			(DSP_MMU_BASE + 0x30)
+#define DSP_MMU_RAM_H			(DSP_MMU_BASE + 0x34)
+#define DSP_MMU_RAM_L			(DSP_MMU_BASE + 0x38)
+#define DSP_MMU_GFLUSH			(DSP_MMU_BASE + 0x3c)
+#define DSP_MMU_FLUSH_ENTRY		(DSP_MMU_BASE + 0x40)
+#define DSP_MMU_READ_CAM_H		(DSP_MMU_BASE + 0x44)
+#define DSP_MMU_READ_CAM_L		(DSP_MMU_BASE + 0x48)
+#define DSP_MMU_READ_RAM_H		(DSP_MMU_BASE + 0x4c)
+#define DSP_MMU_READ_RAM_L		(DSP_MMU_BASE + 0x50)
+
+#define DSP_MMU_CNTL_BURST_16MNGT_EN	0x0020
+#define DSP_MMU_CNTL_WTL_EN		0x0004
+#define DSP_MMU_CNTL_MMU_EN		0x0002
+#define DSP_MMU_CNTL_RESET_SW		0x0001
+
+#define DSP_MMU_FAULT_AD_H_DP		0x0100
+#define DSP_MMU_FAULT_AD_H_ADR_MASK	0x00ff
+
+#define DSP_MMU_FAULT_ST_PREF		0x0008
+#define DSP_MMU_FAULT_ST_PERM		0x0004
+#define DSP_MMU_FAULT_ST_TLB_MISS	0x0002
+#define DSP_MMU_FAULT_ST_TRANS		0x0001
+
+#define DSP_MMU_IT_ACK_IT_ACK		0x0001
+
+#define DSP_MMU_LOCK_BASE_MASK		0xfc00
+#define DSP_MMU_LOCK_BASE_SHIFT		10
+#define DSP_MMU_LOCK_VICTIM_MASK	0x03f0
+#define DSP_MMU_LOCK_VICTIM_SHIFT	4
+
+#define DSP_MMU_CAM_H_VA_TAG_H_MASK		0x0003
+
+#define DSP_MMU_CAM_L_VA_TAG_L1_MASK		0xc000
+#define DSP_MMU_CAM_L_VA_TAG_L2_MASK_1MB	0x0000
+#define DSP_MMU_CAM_L_VA_TAG_L2_MASK_64KB	0x3c00
+#define DSP_MMU_CAM_L_VA_TAG_L2_MASK_4KB	0x3fc0
+#define DSP_MMU_CAM_L_VA_TAG_L2_MASK_1KB	0x3ff0
+#define DSP_MMU_CAM_L_P				0x0008
+#define DSP_MMU_CAM_L_V				0x0004
+#define DSP_MMU_CAM_L_PAGESIZE_MASK		0x0003
+#define DSP_MMU_CAM_L_PAGESIZE_1MB		0x0000
+#define DSP_MMU_CAM_L_PAGESIZE_64KB		0x0001
+#define DSP_MMU_CAM_L_PAGESIZE_4KB		0x0002
+#define DSP_MMU_CAM_L_PAGESIZE_1KB		0x0003
+
+#define DSP_MMU_RAM_L_RAM_LSB_MASK	0xfc00
+#define DSP_MMU_RAM_L_AP_MASK		0x0300
+#define DSP_MMU_RAM_L_AP_NA		0x0000
+#define DSP_MMU_RAM_L_AP_RO		0x0200
+#define DSP_MMU_RAM_L_AP_FA		0x0300
+
+#define DSP_MMU_GFLUSH_GFLUSH		0x0001
+
+#define DSP_MMU_FLUSH_ENTRY_FLUSH_ENTRY	0x0001
+
+#define DSP_MMU_LD_TLB_RD		0x0002
+#define DSP_MMU_LD_TLB_LD		0x0001
+
+/*
+ * DSP ICR
+ */
+#define DSPREG_ICR_RESERVED_BITS	0xffc0
+#define DSPREG_ICR_EMIF			0x0020
+#define DSPREG_ICR_DPLL			0x0010
+#define DSPREG_ICR_PER			0x0008
+#define DSPREG_ICR_CACHE		0x0004
+#define DSPREG_ICR_DMA			0x0002
+#define DSPREG_ICR_CPU			0x0001
+
+#endif /* __OMAP_DSP_OMAP1_DSP_H */

arch/arm/plat-omap/dsp/uaccess_dsp.S

 /*
- * linux/arch/arm/mach-omap/dsp/uaccess_dsp.S
+ * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
  *
- * user memory access functions for DSP driver
+ * Copyright (C) 2004-2006 Nokia Corporation. All rights reserved.
  *
- * Copyright (C) 2004,2005 Nokia Corporation
+ * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
  *
- * Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation. 
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
  *
- * 2004/06/29:  DSP Gateway version 3.3
  */
 
 #include <linux/linkage.h>

arch/arm/plat-omap/dsp/uaccess_dsp.h

 /*
- * linux/arch/arm/mach-omap/dsp/uaccess_dsp.h
+ * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
  *
- * Header for user access functions for DSP driver
+ * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved.
  *
- * Copyright (C) 2002-2005 Nokia Corporation
+ * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
  *
- * Modified from linux/include/asm-arm/uaccess.h
- * by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation. 
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
  *
- * 2004/06/29:  DSP Gateway version 3.3
  */
 
 #ifndef _OMAP_DSP_UACCESS_DSP_H
 #define _OMAP_DSP_UACCESS_DSP_H
 
 #include <asm/uaccess.h>
+#include "dsp_common.h"
 
 #define HAVE_ASM_COPY_FROM_USER_DSP_2B
 
@@ -39,12 +36,6 @@ extern unsigned long __copy_to_user_dsp_2b(void __user *to,
 						const void *from);
 #endif
 
-extern unsigned long dspmem_base, dspmem_size;
-#define is_dsp_internal_mem(va) \
-	(((unsigned long)(va) >= dspmem_base) &&  \
-	 ((unsigned long)(va) < dspmem_base + dspmem_size))
-
-
 #ifndef HAVE_ASM_COPY_FROM_USER_DSP_2B
 static __inline__ unsigned long copy_from_user_dsp_2b(void *to,
 						      const void *from)
@@ -181,6 +172,4 @@ static __inline__ unsigned long copy_to_user_dsp(void *to, const void *from,
 	return n;
 }
 
-#undef is_dsp_internal_mem
-
 #endif /* _OMAP_DSP_UACCESS_DSP_H */

include/asm-arm/arch-omap/io.h

@@ -77,6 +77,17 @@
 #define io_p2v(pa)	((pa) + IO_OFFSET)	/* Works for L3 and L4 */
 #define io_v2p(va)	((va) - IO_OFFSET)	/* Works for L3 and L4 */
 
+/* DSP */
+#define DSP_MEM_24XX_PHYS	OMAP24XX_DSP_MEM_BASE	/* 0x58000000 */
+#define DSP_MEM_24XX_VIRT	0xe0000000
+#define DSP_MEM_24XX_SIZE	0x28000
+#define DSP_IPI_24XX_PHYS	OMAP24XX_DSP_IPI_BASE	/* 0x59000000 */
+#define DSP_IPI_24XX_VIRT	0xe1000000
+#define DSP_IPI_24XX_SIZE	SZ_4K
+#define DSP_MMU_24XX_PHYS	OMAP24XX_DSP_MMU_BASE	/* 0x5a000000 */
+#define DSP_MMU_24XX_VIRT	0xe2000000
+#define DSP_MMU_24XX_SIZE	SZ_4K
+
 #endif
 
 #ifndef __ASSEMBLER__