Commit 8403b938 authored by Tony Lindgren's avatar Tony Lindgren

Add OMAP camera driver

Adds OMAP camera driver.
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 4ed2ff0a
......@@ -358,4 +358,10 @@ config VIDEO_M32R_AR_M64278
Say Y here to use the Renesas M64278E-800 camera module,
which supports VGA(640x480 pixcels) size of images.
config VIDEO_OMAP_CAMERA
tristate "OMAP Video for Linux camera driver"
depends on VIDEO_DEV && ARCH_OMAP16XX
select VIDEO_BUF
endmenu
......@@ -52,5 +52,6 @@ obj-$(CONFIG_VIDEO_BTCX) += btcx-risc.o
obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o
obj-$(CONFIG_VIDEO_M32R_AR_M64278) += arv.o
obj-$(CONFIG_VIDEO_OMAP_CAMERA) += omap/
EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/dvb-core
# Makefile for camera driver for H2/H3
omapCamera-objs := camera_core.o omap16xxcam.o sensor_ov9640.o
obj-y += omapCamera.o
EXTRA_CFLAGS = -I$(src)/..
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/*
* drivers/media/video/omap/camera_core.h
*
* Copyright (C) 2004 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef CAMERA_CORE__H
#define CAMERA_CORE__H
struct camera_fh;
#include <media/video-buf.h>
#include <asm/scatterlist.h>
struct camera_device;
typedef void (*dma_callback_t)(void *arg1, void *arg2);
struct sgdma_state {
const struct scatterlist *sglist;
int sglen; /* number of sglist entries */
int next_sglist; /* index of next sglist entry to process */
int queued_sglist; /* number of sglist entries queued for DMA */
unsigned long csr; /* DMA return code */
dma_callback_t callback;
void *arg;
};
/* NUM_SG_DMA is the number of scatter-gather DMA transfers that can be queued.
*/
#define NUM_SG_DMA VIDEO_MAX_FRAME+2
/* per-device data structure */
struct camera_device {
struct device dev;
struct video_device *vfd;
spinlock_t overlay_lock; /* spinlock for overlay DMA counter */
int overlay_cnt; /* count of queued overlay DMA xfers */
struct scatterlist overlay_sglist;
unsigned long overlay_base_phys;
unsigned long overlay_base;
unsigned long overlay_size;
spinlock_t vbq_lock; /* spinlock for videobuf queues */
struct videobuf_queue_ops vbq_ops; /* videobuf queue operations */
unsigned long field_count; /* field counter for videobuf_buffer */
/* scatter-gather DMA management */
spinlock_t sg_lock;
int free_sgdma; /* number of free sg dma slots */
int next_sgdma; /* index of next sg dma slot to use */
struct sgdma_state sgdma[NUM_SG_DMA];
char in_use;
/* The img_lock is used to serialize access to the image parameters for
* overlay and capture. Need to use spin_lock_irq when writing to the
* reading, streaming, and previewing parameters. A regular spin_lock
* will suffice for all other cases.
*/
spinlock_t img_lock;
/* We allow reading from at most one filehandle at a time.
* non-NULL means reading is in progress.
*/
struct camera_fh *reading;
/* We allow streaming from at most one filehandle at a time.
* non-NULL means streaming is in progress.
*/
struct camera_fh *streaming;
/* We allow previewing from at most one filehandle at a time.
* non-NULL means previewing is in progress.
*/
struct camera_fh *previewing;
/* capture parameters (frame rate, number of buffers) */
struct v4l2_captureparm cparm;
/* This is the frame period actually requested by the user. */
struct v4l2_fract nominal_timeperframe;
/* frequency (in Hz) of camera interface xclk output */
unsigned long xclk;
/* Pointer to the sensor interface ops */
struct camera_sensor *cam_sensor;
void *sensor_data;
/* Pointer to the camera interface hardware ops */
struct camera_hardware *cam_hardware;
void *hardware_data;
/* pix defines the size and pixel format of the image captured by the
* sensor. This also defines the size of the framebuffers. The
* same pool of framebuffers is used for video capture and video
* overlay. These parameters are set/queried by the
* VIDIOC_S_FMT/VIDIOC_G_FMT ioctls with a CAPTURE buffer type.
*/
struct v4l2_pix_format pix;
/* crop defines the size and offset of the video overlay source window
* within the framebuffer. These parameters are set/queried by the
* VIDIOC_S_CROP/VIDIOC_G_CROP ioctls with an OVERLAY buffer type.
* The cropping rectangle allows a subset of the captured image to be
* previewed. It only affects the portion of the image previewed, not
* captured; the entire camera image is always captured.
*/
struct v4l2_rect crop;
/* win defines the size and offset of the video overlay target window
* within the video display. These parameters are set/queried by the
* VIDIOC_S_FMT/VIDIOC_G_FMT ioctls with an OVERLAY buffer type.
*/
struct v4l2_window win;
/* fbuf reflects the size of the video display. It is queried with the
* VIDIOC_G_FBUF ioctl. The size of the video display cannot be
* changed with the VIDIOC_S_FBUF ioctl.
*/
struct v4l2_framebuffer fbuf;
/* end of generic stuff, the above should be common to all omaps */
/* note, 2420 uses videobuf to do caprure, it is more memory efficient
we need 1710 and 2420 do capture in the same way */
/* Variables to store the capture state */
/* Wait till DMA is completed */
wait_queue_head_t new_video_frame;
char capture_completed;
char capture_started;
spinlock_t capture_lock;
struct scatterlist capture_sglist;
unsigned long capture_base;
unsigned long capture_base_phys;
char active;
};
/* per-filehandle data structure */
struct camera_fh {
struct camera_device *cam;
enum v4l2_buf_type type;
struct videobuf_queue vbq;
};
#define CAM_NAME "omap-camera"
#endif /* CAMERA_CORE__H */
/*
* drivers/media/video/omap/camera_hw_if.h
*
* Copyright (C) 2004 Texas Instruments, Inc.
*
* Camera interface to OMAP camera capture drivers
* Camera interface hardware driver should implement this interface
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef OMAP_CAMERA_HW_IF_H
#define OMAP_CAMERA_HW_IF_H
#define LEN_HW_IF_NAME 31
struct sgdma_state;
struct camera_hardware {
unsigned int version; //version of camera driver module
char name[LEN_HW_IF_NAME + 1];
void *(*init)(void);
int (*cleanup)(void *);
int (*open)(void *); /* acquire h/w resources (irq,DMA), etc. */
int (*close)(void *); /* free h/w resources, stop i/f */
int (*enable)(void *);
int (*disable)(void *);
int (*abort)(void *);
int (*set_xclk)(int, void *);
int (*init_dma)(void *);
int (*start_dma)(struct sgdma_state *, void (*)(void *arg1, void *arg2),
void *, void *, void *);
int (*finish_dma)(void *);
};
#endif /* OMAP_CAMERA_HW_IF_H */
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/*
* drivers/media/video/omap/omap16xxcam.h
*
* Copyright (C) 2004 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef OMAP_16XX_CAM_H
#define OMAP_16XX_CAM_H
#define DMA_ELEM_SIZE 4
#define FIFO_TRIGGER_LVL (32)
/*
* ---------------------------------------------------------------------------
* OMAP1610 Camera Interface
* ---------------------------------------------------------------------------
*/
#ifdef CONFIG_MACH_OMAP_H3
#define CAMERA_BASE (0x2007d800)
#else
#define CAMERA_BASE (IO_PHYS + 0x6800)
#endif
#define CAM_CTRLCLOCK_REG (CAMERA_BASE + 0x00)
#define CAM_IT_STATUS_REG (CAMERA_BASE + 0x04)
#define CAM_MODE_REG (CAMERA_BASE + 0x08)
#define CAM_STATUS_REG (CAMERA_BASE + 0x0C)
#define CAM_CAMDATA_REG (CAMERA_BASE + 0x10)
#define CAM_GPIO_REG (CAMERA_BASE + 0x14)
#define CAM_PEAK_CTR_REG (CAMERA_BASE + 0x18)
#define CAMERA_IOSIZE 0x1C
/* CTRLCLOCK bit shifts */
#define FOSCMOD_BIT 0
#define FOSCMOD_MASK (0x7 << FOSCMOD_BIT)
#define FOSCMOD_12MHz 0x0
#define FOSCMOD_6MHz 0x2
#define FOSCMOD_9_6MHz 0x4
#define FOSCMOD_24MHz 0x5
#define FOSCMOD_8MHz 0x6
#define FOSCMOD_TC2_CK2 0x3
#define FOSCMOD_TC2_CK3 0x1
#define FOSCMOD_TC2_CK4 0x5
#define FOSCMOD_TC2_CK8 0x0
#define FOSCMOD_TC2_CK10 0x4
#define FOSCMOD_TC2_CK12 0x6
#define FOSCMOD_TC2_CK16 0x2
#define POLCLK (1<<3)
#define CAMEXCLK_EN (1<<4)
#define MCLK_EN (1<<5)
#define DPLL_EN (1<<6)
#define LCLK_EN (1<<7)
/* IT_STATUS bit shifts */
#define V_UP (1<<0)
#define V_DOWN (1<<1)
#define H_UP (1<<2)
#define H_DOWN (1<<3)
#define FIFO_FULL (1<<4)
#define DATA_XFER (1<<5)
/* MODE bit shifts */
#define CAMOSC (1<<0)
#define IMGSIZE_BIT 1
#define IMGSIZE_MASK (0x3 << IMGSIZE_BIT)
#define IMGSIZE_CIF (0x0 << IMGSIZE_BIT) /* 352x288 */
#define IMGSIZE_QCIF (0x1 << IMGSIZE_BIT) /* 176x144 */
#define IMGSIZE_VGA (0x2 << IMGSIZE_BIT) /* 640x480 */
#define IMGSIZE_QVGA (0x3 << IMGSIZE_BIT) /* 320x240 */
#define ORDERCAMD (1<<3)
#define EN_V_UP (1<<4)
#define EN_V_DOWN (1<<5)
#define EN_H_UP (1<<6)
#define EN_H_DOWN (1<<7)
#define EN_DMA (1<<8)
#define THRESHOLD (1<<9)
#define THRESHOLD_BIT 9
#define THRESHOLD_MASK (0x7f<<9)
#define EN_NIRQ (1<<16)
#define EN_FIFO_FULL (1<<17)
#define RAZ_FIFO (1<<18)
/* STATUS bit shifts */
#define VSTATUS (1<<0)
#define HSTATUS (1<<1)
/* GPIO bit shifts */
#define CAM_RST (1<<0)
#define XCLK_6MHZ 6000000
#define XCLK_8MHZ 8000000
#define XCLK_9_6MHZ 9000000
#define XCLK_12MHZ 12000000
#define XCLK_24MHZ 24000000
#endif /* OMAP_16XX_CAM_H */
/*
* drivers/media/video/omap/ov9640.h
*
* Register definitions for the OmniVision OV9640 CameraChip.
*
* Author: Andy Lowe (source@mvista.com)
*
* Copyright (C) 2004 MontaVista Software, Inc.
* Copyright (C) 2004 Texas Instruments.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#ifndef OV9640_H
#define OV9640_H
/* The OV9640 I2C sensor chip has a fixed slave address of 0x30. */
#ifdef CONFIG_OMAP24XX_VIRTIO
#define OV9640_I2C_ADDR 0x60
#else
#define OV9640_I2C_ADDR 0x30
#endif
/* define register offsets for the OV9640 sensor chip */
#define OV9640_GAIN 0x00
#define OV9640_BLUE 0x01
#define OV9640_RED 0x02
#define OV9640_VREF 0x03
#define OV9640_COM1 0x04
#define OV9640_BAVE 0x05
#define OV9640_GEAVE 0x06
#define OV9640_RAVE 0x08
#define OV9640_COM2 0x09
#define OV9640_PID 0x0A
#define OV9640_VER 0x0B
#define OV9640_COM3 0x0C
#define OV9640_COM4 0x0D
#define OV9640_COM5 0x0E
#define OV9640_COM6 0x0F
#define OV9640_AECH 0x10
#define OV9640_CLKRC 0x11
#define OV9640_COM7 0x12
#define OV9640_COM8 0x13
#define OV9640_COM9 0x14
#define OV9640_COM10 0x15
#define OV9640_HSTRT 0x17
#define OV9640_HSTOP 0x18
#define OV9640_VSTRT 0x19
#define OV9640_VSTOP 0x1A
#define OV9640_PSHFT 0x1B
#define OV9640_MIDH 0x1C
#define OV9640_MIDL 0x1D
#define OV9640_MVFP 0x1E
#define OV9640_LAEC 0x1F
#define OV9640_BOS 0x20
#define OV9640_GBOS 0x21
#define OV9640_GROS 0x22
#define OV9640_ROS 0x23
#define OV9640_AEW 0x24
#define OV9640_AEB 0x25
#define OV9640_VPT 0x26
#define OV9640_BBIAS 0x27
#define OV9640_GBBIAS 0x28
#define OV9640_EXHCH 0x2A
#define OV9640_EXHCL 0x2B
#define OV9640_RBIAS 0x2C
#define OV9640_ADVFL 0x2D
#define OV9640_ADVFH 0x2E
#define OV9640_YAVE 0x2F
#define OV9640_HSYST 0x30
#define OV9640_HSYEN 0x31
#define OV9640_HREF 0x32
#define OV9640_CHLF 0x33
#define OV9640_ARBLM 0x34
#define OV9640_ADC 0x37
#define OV9640_ACOM 0x38
#define OV9640_OFON 0x39
#define OV9640_TSLB 0x3A
#define OV9640_COM11 0x3B
#define OV9640_COM12 0x3C
#define OV9640_COM13 0x3D
#define OV9640_COM14 0x3E
#define OV9640_EDGE 0x3F
#define OV9640_COM15 0x40
#define OV9640_COM16 0x41
#define OV9640_COM17 0x42
#define OV9640_MTX1 0x4F
#define OV9640_MTX2 0x50
#define OV9640_MTX3 0x51
#define OV9640_MTX4 0x52
#define OV9640_MTX5 0x53
#define OV9640_MTX6 0x54
#define OV9640_MTX7 0x55
#define OV9640_MTX8 0x56
#define OV9640_MTX9 0x57
#define OV9640_MTXS 0x58
#define OV9640_LCC1 0x62
#define OV9640_LCC2 0x63
#define OV9640_LCC3 0x64
#define OV9640_LCC4 0x65
#define OV9640_LCC5 0x66
#define OV9640_MANU 0x67
#define OV9640_MANV 0x68
#define OV9640_HV 0x69
#define OV9640_MBD 0x6A
#define OV9640_DBLV 0x6B
#define OV9640_GSP1 0x6C
#define OV9640_GSP2 0x6D
#define OV9640_GSP3 0x6E
#define OV9640_GSP4 0x6F
#define OV9640_GSP5 0x70
#define OV9640_GSP6 0x71
#define OV9640_GSP7 0x72
#define OV9640_GSP8 0x73
#define OV9640_GSP9 0x74
#define OV9640_GSP10 0x75
#define OV9640_GSP11 0x76
#define OV9640_GSP12 0x77
#define OV9640_GSP13 0x78
#define OV9640_GSP14 0x79
#define OV9640_GSP15 0x7A
#define OV9640_GSP16 0x7B
#define OV9640_GST1 0x7C
#define OV9640_GST2 0x7D
#define OV9640_GST3 0x7E
#define OV9640_GST4 0x7F
#define OV9640_GST5 0x80
#define OV9640_GST6 0x81
#define OV9640_GST7 0x82
#define OV9640_GST8 0x83
#define OV9640_GST9 0x84
#define OV9640_GST10 0x85
#define OV9640_GST11 0x86
#define OV9640_GST12 0x87
#define OV9640_GST13 0x88
#define OV9640_GST14 0x89
#define OV9640_GST15 0x8A
#define OV9640_NUM_REGS (OV9640_GST15 + 1)
#define OV9640_PID_MAGIC 0x96 /* high byte of product ID number */
#define OV9640_VER_REV2 0x48 /* low byte of product ID number */
#define OV9640_VER_REV3 0x49 /* low byte of product ID number */
#define OV9640_MIDH_MAGIC 0x7F /* high byte of mfg ID */
#define OV9640_MIDL_MAGIC 0xA2 /* low byte of mfg ID */
/* define a structure for ov9640 register initialization values */
struct ov9640_reg {
unsigned char reg;
unsigned char val;
};
enum image_size { QQCIF, QQVGA, QCIF, QVGA, CIF, VGA, SXGA };
enum pixel_format { YUV, RGB565, RGB555 };
#define NUM_IMAGE_SIZES 7
#define NUM_PIXEL_FORMATS 3
struct capture_size {
unsigned long width;
unsigned long height;
};
/* Array of image sizes supported by OV9640. These must be ordered from
* smallest image size to largest.
*/
const static struct capture_size ov9640_sizes[] = {
{ 88, 72 }, /* QQCIF */
{ 160, 120 }, /* QQVGA */
{ 176, 144 }, /* QCIF */
{ 320, 240 }, /* QVGA */
{ 352, 288 }, /* CIF */
{ 640, 480 }, /* VGA */
{ 1280, 960 }, /* SXGA */
};
#endif /* ifndef OV9640_H */
/*
* drivers/media/video/omap/sensor_if.h
*
* Copyright (C) 2004 Texas Instruments, Inc.
*
* Sensor interface to OMAP camera capture drivers
* Sensor driver should implement this interface
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef OMAP_SENSOR_IF_H
#define OMAP_SENSOR_IF_H
#define LEN_SENSOR_NAME 31
struct camera_sensor {
unsigned int version;
char name[LEN_SENSOR_NAME + 1];
void *(*init)(struct v4l2_pix_format *);
int (*cleanup)(void *);
int (*power_on)(void *);
int (*power_off)(void *);
int (*enum_pixformat)(struct v4l2_fmtdesc *, void *);
int (*try_format) (struct v4l2_pix_format *, void *);
unsigned long (*calc_xclk) (struct v4l2_pix_format *,
struct v4l2_fract *, void *);
int (*configure) (struct v4l2_pix_format *, unsigned long,
struct v4l2_fract *, void *);
int (*query_control) (struct v4l2_queryctrl *, void *);
int (*get_control) (struct v4l2_control *, void *);
int (*set_control) (struct v4l2_control *, void *);
};
#endif
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/*
* OMAP-1510 camera interface
*
* FIXME: This will go to same directory with the camera driver
*/
#define CAMERA_BASE 0xfffb6800
#define CAM_CTRLCLOCK_REG (CAMERA_BASE + 0x00)
#define CAM_IT_STATUS_REG (CAMERA_BASE + 0x04)
#define CAM_MODE_REG (CAMERA_BASE + 0x08)
#define CAM_STATUS_REG (CAMERA_BASE + 0x0C)
#define CAM_CAMDATA_REG (CAMERA_BASE + 0x10)
#define CAM_GPIO_REG (CAMERA_BASE + 0x14)
#define CAM_PEAK_CTR_REG (CAMERA_BASE + 0x18)
#ifndef __ASSEMBLY__
typedef struct {
__u32 ctrlclock; /* 00 */
__u32 it_status; /* 04 */
__u32 mode; /* 08 */
__u32 status; /* 0C */
__u32 camdata; /* 10 */
__u32 gpio; /* 14 */
__u32 peak_counter; /* 18 */
} camera_regs_t;
#endif
/* CTRLCLOCK bit shifts */
#define FOSCMOD_BIT 0
#define FOSCMOD_MASK (0x7 << FOSCMOD_BIT)
#define FOSCMOD_12MHz 0x0
#define FOSCMOD_6MHz 0x2
#define FOSCMOD_9_6MHz 0x4
#define FOSCMOD_24MHz 0x5
#define FOSCMOD_8MHz 0x6
#define POLCLK (1<<3)
#define CAMEXCLK_EN (1<<4)
#define MCLK_EN (1<<5)
#define DPLL_EN (1<<6)
#define LCLK_EN (1<<7)
/* IT_STATUS bit shifts */
#define V_UP (1<<0)
#define V_DOWN (1<<1)
#define H_UP (1<<2)
#define H_DOWN (1<<3)
#define FIFO_FULL (1<<4)
#define DATA_XFER (1<<5)
/* MODE bit shifts */
#define CAMOSC (1<<0)
#define IMGSIZE_BIT 1
#define IMGSIZE_MASK (0x3 << IMGSIZE_BIT)
#define IMGSIZE_CIF (0x0 << IMGSIZE_BIT) /* 352x288 */
#define IMGSIZE_QCIF (0x1 << IMGSIZE_BIT) /* 176x144 */
#define IMGSIZE_VGA (0x2 << IMGSIZE_BIT) /* 640x480 */
#define IMGSIZE_QVGA (0x3 << IMGSIZE_BIT) /* 320x240 */
#define ORDERCAMD (1<<3)
#define EN_V_UP (1<<4)
#define EN_V_DOWN (1<<5)
#define EN_H_UP (1<<6)
#define EN_H_DOWN (1<<7)
#define EN_DMA (1<<8)
#define THRESHOLD (1<<9)
#define THRESHOLD_BIT 9
#define THRESHOLD_MASK (0x7f<<9)
#define EN_NIRQ (1<<16)
#define EN_FIFO_FULL (1<<17)
#define RAZ_FIFO (1<<18)
/* STATUS bit shifts */
#define VSTATUS (1<<0)
#define HSTATUS (1<<1)
/* GPIO bit shifts */
#define CAM_RST (1<<0)
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