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linux
linux-davinci
Commits
81b66995
Commit
81b66995
authored
Sep 17, 2008
by
Paul Mundt
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sh: Consolidate struct sh_cpuinfo definitions across _32/_64 split.
Signed-off-by:
Paul Mundt
<
lethal@linux-sh.org
>
parent
8a80a5e9
Changes
3
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3 changed files
with
39 additions
and
61 deletions
+39
-61
arch/sh/include/asm/processor.h
arch/sh/include/asm/processor.h
+39
-1
arch/sh/include/asm/processor_32.h
arch/sh/include/asm/processor_32.h
+0
-19
arch/sh/include/asm/processor_64.h
arch/sh/include/asm/processor_64.h
+0
-41
No files found.
arch/sh/include/asm/processor.h
View file @
81b66995
...
...
@@ -3,6 +3,7 @@
#include <asm/cpu-features.h>
#include <asm/segment.h>
#include <asm/cache.h>
#ifndef __ASSEMBLY__
/*
...
...
@@ -43,8 +44,45 @@ enum cpu_type {
CPU_SH_NONE
};
/*
* TLB information structure
*
* Defined for both I and D tlb, per-processor.
*/
struct
tlb_info
{
unsigned
long
long
next
;
unsigned
long
long
first
;
unsigned
long
long
last
;
unsigned
int
entries
;
unsigned
int
step
;
unsigned
long
flags
;
};
struct
sh_cpuinfo
{
unsigned
int
type
;
int
cut_major
,
cut_minor
;
unsigned
long
loops_per_jiffy
;
unsigned
long
asid_cache
;
struct
cache_info
icache
;
/* Primary I-cache */
struct
cache_info
dcache
;
/* Primary D-cache */
struct
cache_info
scache
;
/* Secondary cache */
/* TLB info */
struct
tlb_info
itlb
;
struct
tlb_info
dtlb
;
unsigned
long
flags
;
}
__attribute__
((
aligned
(
L1_CACHE_BYTES
)));
extern
struct
sh_cpuinfo
cpu_data
[];
#define boot_cpu_data cpu_data[0]
#define current_cpu_data cpu_data[smp_processor_id()]
#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
/* Forward decl */
struct
sh_cpuinfo
;
struct
seq_operations
;
extern
struct
pt_regs
fake_swapper_regs
;
...
...
arch/sh/include/asm/processor_32.h
View file @
81b66995
...
...
@@ -13,7 +13,6 @@
#include <linux/linkage.h>
#include <asm/page.h>
#include <asm/types.h>
#include <asm/cache.h>
#include <asm/ptrace.h>
/*
...
...
@@ -27,24 +26,6 @@
#define CCN_CVR 0xff000040
#define CCN_PRR 0xff000044
struct
sh_cpuinfo
{
unsigned
int
type
;
int
cut_major
,
cut_minor
;
unsigned
long
loops_per_jiffy
;
unsigned
long
asid_cache
;
struct
cache_info
icache
;
/* Primary I-cache */
struct
cache_info
dcache
;
/* Primary D-cache */
struct
cache_info
scache
;
/* Secondary cache */
unsigned
long
flags
;
}
__attribute__
((
aligned
(
L1_CACHE_BYTES
)));
extern
struct
sh_cpuinfo
cpu_data
[];
#define boot_cpu_data cpu_data[0]
#define current_cpu_data cpu_data[smp_processor_id()]
#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
asmlinkage
void
__init
sh_cpu_init
(
void
);
/*
...
...
arch/sh/include/asm/processor_64.h
View file @
81b66995
...
...
@@ -17,7 +17,6 @@
#include <linux/compiler.h>
#include <asm/page.h>
#include <asm/types.h>
#include <asm/cache.h>
#include <asm/ptrace.h>
#include <cpu/registers.h>
...
...
@@ -36,46 +35,6 @@ __asm__("gettr tr0, %1\n\t" \
: "1" (__dummy)); \
pc; })
/*
* TLB information structure
*
* Defined for both I and D tlb, per-processor.
*/
struct
tlb_info
{
unsigned
long
long
next
;
unsigned
long
long
first
;
unsigned
long
long
last
;
unsigned
int
entries
;
unsigned
int
step
;
unsigned
long
flags
;
};
struct
sh_cpuinfo
{
enum
cpu_type
type
;
unsigned
long
loops_per_jiffy
;
unsigned
long
asid_cache
;
unsigned
int
cpu_clock
,
master_clock
,
bus_clock
,
module_clock
;
/* Cache info */
struct
cache_info
icache
;
struct
cache_info
dcache
;
struct
cache_info
scache
;
/* TLB info */
struct
tlb_info
itlb
;
struct
tlb_info
dtlb
;
unsigned
long
flags
;
};
extern
struct
sh_cpuinfo
cpu_data
[];
#define boot_cpu_data cpu_data[0]
#define current_cpu_data cpu_data[smp_processor_id()]
#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
#endif
/*
...
...
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