Commit 7f02d687 authored by Thomas Hellstrom's avatar Thomas Hellstrom Committed by Dave Jones

[AGPGART] Fix PCI-posting flush typo.

Unfortunately there was a typo in one of the patches I sent,
(The one now committed to the agpgart tree).
It may cause a bus error on i810 type hardware.
Signed-off-by: default avatarThomas Hellstrom <thomas@tungstengraphics.com>
Signed-off-by: default avatarDave Jones <davej@redhat.com>
parent c41e0deb
......@@ -253,7 +253,7 @@ insert:
mem->memory[i], mem->type),
intel_i810_private.registers+I810_PTE_BASE+(j*4));
}
readl(intel_i810_private.registers+I810_PTE_BASE+(j-1*4)); /* PCI Posting. */
readl(intel_i810_private.registers+I810_PTE_BASE+((j-1)*4)); /* PCI Posting. */
agp_bridge->driver->tlb_flush(mem);
return 0;
......
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