Commit 79778a27 authored by James Bottomley's avatar James Bottomley Committed by James Bottomley

[SCSI] aic7xxx: upport all sequencer and core fixes from adaptec version 6.3.9

This patch upports all relevant code fixes and bumps the driver version
to 7.0 to signify starting a new tree.
Signed-off-by: default avatarJames Bottomley <James.Bottomley@SteelEye.com>
parent 52b5cfb3
==================================================================== ====================================================================
= Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v6.2.28 = = Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v7.0 =
= README for = = README for =
= The Linux Operating System = = The Linux Operating System =
==================================================================== ====================================================================
...@@ -131,6 +131,10 @@ The following information is available in this file: ...@@ -131,6 +131,10 @@ The following information is available in this file:
SCSI "stub" effects. SCSI "stub" effects.
2. Version History 2. Version History
7.0 (4th August, 2005)
- Updated driver to use SCSI transport class infrastructure
- Upported sequencer and core fixes from last adaptec released
version of the driver.
6.2.36 (June 3rd, 2003) 6.2.36 (June 3rd, 2003)
- Correct code that disables PCI parity error checking. - Correct code that disables PCI parity error checking.
- Correct and simplify handling of the ignore wide residue - Correct and simplify handling of the ignore wide residue
......
...@@ -37,7 +37,7 @@ ...@@ -37,7 +37,7 @@
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES. * POSSIBILITY OF SUCH DAMAGES.
* *
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.h#79 $ * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.h#85 $
* *
* $FreeBSD$ * $FreeBSD$
*/ */
...@@ -243,7 +243,7 @@ typedef enum { ...@@ -243,7 +243,7 @@ typedef enum {
*/ */
AHC_AIC7850_FE = AHC_SPIOCAP|AHC_AUTOPAUSE|AHC_TARGETMODE|AHC_ULTRA, AHC_AIC7850_FE = AHC_SPIOCAP|AHC_AUTOPAUSE|AHC_TARGETMODE|AHC_ULTRA,
AHC_AIC7860_FE = AHC_AIC7850_FE, AHC_AIC7860_FE = AHC_AIC7850_FE,
AHC_AIC7870_FE = AHC_TARGETMODE, AHC_AIC7870_FE = AHC_TARGETMODE|AHC_AUTOPAUSE,
AHC_AIC7880_FE = AHC_AIC7870_FE|AHC_ULTRA, AHC_AIC7880_FE = AHC_AIC7870_FE|AHC_ULTRA,
/* /*
* Although we have space for both the initiator and * Although we have space for both the initiator and
......
...@@ -39,7 +39,7 @@ ...@@ -39,7 +39,7 @@
* *
* $FreeBSD$ * $FreeBSD$
*/ */
VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#39 $" VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $"
/* /*
* This file is processed by the aic7xxx_asm utility for use in assembling * This file is processed by the aic7xxx_asm utility for use in assembling
...@@ -1306,7 +1306,6 @@ scratch_ram { ...@@ -1306,7 +1306,6 @@ scratch_ram {
*/ */
MWI_RESIDUAL { MWI_RESIDUAL {
size 1 size 1
alias TARG_IMMEDIATE_SCB
} }
/* /*
* SCBID of the next SCB to be started by the controller. * SCBID of the next SCB to be started by the controller.
...@@ -1461,6 +1460,7 @@ scratch_ram { ...@@ -1461,6 +1460,7 @@ scratch_ram {
*/ */
LAST_MSG { LAST_MSG {
size 1 size 1
alias TARG_IMMEDIATE_SCB
} }
/* /*
......
...@@ -40,7 +40,7 @@ ...@@ -40,7 +40,7 @@
* $FreeBSD$ * $FreeBSD$
*/ */
VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#56 $" VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $"
PATCH_ARG_LIST = "struct ahc_softc *ahc" PATCH_ARG_LIST = "struct ahc_softc *ahc"
PREFIX = "ahc_" PREFIX = "ahc_"
...@@ -679,6 +679,7 @@ await_busfree: ...@@ -679,6 +679,7 @@ await_busfree:
clr SCSIBUSL; /* Prevent bit leakage durint SELTO */ clr SCSIBUSL; /* Prevent bit leakage durint SELTO */
} }
and SXFRCTL0, ~SPIOEN; and SXFRCTL0, ~SPIOEN;
mvi SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT;
test SSTAT1,REQINIT|BUSFREE jz .; test SSTAT1,REQINIT|BUSFREE jz .;
test SSTAT1, BUSFREE jnz poll_for_work; test SSTAT1, BUSFREE jnz poll_for_work;
mvi MISSED_BUSFREE call set_seqint; mvi MISSED_BUSFREE call set_seqint;
...@@ -1097,7 +1098,7 @@ ultra2_dmahalt: ...@@ -1097,7 +1098,7 @@ ultra2_dmahalt:
test SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jz dma_mid_sg; test SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jz dma_mid_sg;
if ((ahc->flags & AHC_TARGETROLE) != 0) { if ((ahc->flags & AHC_TARGETROLE) != 0) {
test SSTAT0, TARGET jz dma_last_sg; test SSTAT0, TARGET jz dma_last_sg;
if ((ahc->flags & AHC_TMODE_WIDEODD_BUG) != 0) { if ((ahc->bugs & AHC_TMODE_WIDEODD_BUG) != 0) {
test DMAPARAMS, DIRECTION jz dma_mid_sg; test DMAPARAMS, DIRECTION jz dma_mid_sg;
} }
} }
......
...@@ -28,9 +28,7 @@ ...@@ -28,9 +28,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
* *
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx_93cx6.c#17 $ * $Id: //depot/aic7xxx/aic7xxx/aic7xxx_93cx6.c#19 $
*
* $FreeBSD$
*/ */
/* /*
...@@ -64,7 +62,6 @@ ...@@ -64,7 +62,6 @@
* is preceded by an initial zero (leading 0, followed by 16-bits, MSB * is preceded by an initial zero (leading 0, followed by 16-bits, MSB
* first). The clock cycling from low to high initiates the next data * first). The clock cycling from low to high initiates the next data
* bit to be sent from the chip. * bit to be sent from the chip.
*
*/ */
#ifdef __linux__ #ifdef __linux__
...@@ -81,14 +78,22 @@ ...@@ -81,14 +78,22 @@
* Right now, we only have to read the SEEPROM. But we make it easier to * Right now, we only have to read the SEEPROM. But we make it easier to
* add other 93Cx6 functions. * add other 93Cx6 functions.
*/ */
static struct seeprom_cmd { struct seeprom_cmd {
uint8_t len; uint8_t len;
uint8_t bits[9]; uint8_t bits[11];
} seeprom_read = {3, {1, 1, 0}}; };
/* Short opcodes for the c46 */
static struct seeprom_cmd seeprom_ewen = {9, {1, 0, 0, 1, 1, 0, 0, 0, 0}}; static struct seeprom_cmd seeprom_ewen = {9, {1, 0, 0, 1, 1, 0, 0, 0, 0}};
static struct seeprom_cmd seeprom_ewds = {9, {1, 0, 0, 0, 0, 0, 0, 0, 0}}; static struct seeprom_cmd seeprom_ewds = {9, {1, 0, 0, 0, 0, 0, 0, 0, 0}};
/* Long opcodes for the C56/C66 */
static struct seeprom_cmd seeprom_long_ewen = {11, {1, 0, 0, 1, 1, 0, 0, 0, 0}};
static struct seeprom_cmd seeprom_long_ewds = {11, {1, 0, 0, 0, 0, 0, 0, 0, 0}};
/* Common opcodes */
static struct seeprom_cmd seeprom_write = {3, {1, 0, 1}}; static struct seeprom_cmd seeprom_write = {3, {1, 0, 1}};
static struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
/* /*
* Wait for the SEERDY to go high; about 800 ns. * Wait for the SEERDY to go high; about 800 ns.
...@@ -222,12 +227,25 @@ int ...@@ -222,12 +227,25 @@ int
ahc_write_seeprom(struct seeprom_descriptor *sd, uint16_t *buf, ahc_write_seeprom(struct seeprom_descriptor *sd, uint16_t *buf,
u_int start_addr, u_int count) u_int start_addr, u_int count)
{ {
struct seeprom_cmd *ewen, *ewds;
uint16_t v; uint16_t v;
uint8_t temp; uint8_t temp;
int i, k; int i, k;
/* Place the chip into write-enable mode */ /* Place the chip into write-enable mode */
send_seeprom_cmd(sd, &seeprom_ewen); if (sd->sd_chip == C46) {
ewen = &seeprom_ewen;
ewds = &seeprom_ewds;
} else if (sd->sd_chip == C56_66) {
ewen = &seeprom_long_ewen;
ewds = &seeprom_long_ewds;
} else {
printf("ahc_write_seeprom: unsupported seeprom type %d\n",
sd->sd_chip);
return (0);
}
send_seeprom_cmd(sd, ewen);
reset_seeprom(sd); reset_seeprom(sd);
/* Write all requested data out to the seeprom. */ /* Write all requested data out to the seeprom. */
...@@ -277,7 +295,7 @@ ahc_write_seeprom(struct seeprom_descriptor *sd, uint16_t *buf, ...@@ -277,7 +295,7 @@ ahc_write_seeprom(struct seeprom_descriptor *sd, uint16_t *buf,
} }
/* Put the chip back into write-protect mode */ /* Put the chip back into write-protect mode */
send_seeprom_cmd(sd, &seeprom_ewds); send_seeprom_cmd(sd, ewds);
reset_seeprom(sd); reset_seeprom(sd);
return (1); return (1);
......
...@@ -37,9 +37,7 @@ ...@@ -37,9 +37,7 @@
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES. * POSSIBILITY OF SUCH DAMAGES.
* *
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.c#134 $ * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.c#155 $
*
* $FreeBSD$
*/ */
#ifdef __linux__ #ifdef __linux__
...@@ -287,10 +285,19 @@ ahc_restart(struct ahc_softc *ahc) ...@@ -287,10 +285,19 @@ ahc_restart(struct ahc_softc *ahc)
ahc_outb(ahc, SEQ_FLAGS2, ahc_outb(ahc, SEQ_FLAGS2,
ahc_inb(ahc, SEQ_FLAGS2) & ~SCB_DMA); ahc_inb(ahc, SEQ_FLAGS2) & ~SCB_DMA);
} }
/*
* Clear any pending sequencer interrupt. It is no
* longer relevant since we're resetting the Program
* Counter.
*/
ahc_outb(ahc, CLRINT, CLRSEQINT);
ahc_outb(ahc, MWI_RESIDUAL, 0); ahc_outb(ahc, MWI_RESIDUAL, 0);
ahc_outb(ahc, SEQCTL, ahc->seqctl); ahc_outb(ahc, SEQCTL, ahc->seqctl);
ahc_outb(ahc, SEQADDR0, 0); ahc_outb(ahc, SEQADDR0, 0);
ahc_outb(ahc, SEQADDR1, 0); ahc_outb(ahc, SEQADDR1, 0);
ahc_unpause(ahc); ahc_unpause(ahc);
} }
...@@ -1174,19 +1181,20 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat) ...@@ -1174,19 +1181,20 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
scb_index); scb_index);
} }
#endif #endif
/*
* Force a renegotiation with this target just in
* case the cable was pulled and will later be
* re-attached. The target may forget its negotiation
* settings with us should it attempt to reselect
* during the interruption. The target will not issue
* a unit attention in this case, so we must always
* renegotiate.
*/
ahc_scb_devinfo(ahc, &devinfo, scb); ahc_scb_devinfo(ahc, &devinfo, scb);
ahc_force_renegotiation(ahc, &devinfo);
ahc_set_transaction_status(scb, CAM_SEL_TIMEOUT); ahc_set_transaction_status(scb, CAM_SEL_TIMEOUT);
ahc_freeze_devq(ahc, scb); ahc_freeze_devq(ahc, scb);
/*
* Cancel any pending transactions on the device
* now that it seems to be missing. This will
* also revert us to async/narrow transfers until
* we can renegotiate with the device.
*/
ahc_handle_devreset(ahc, &devinfo,
CAM_SEL_TIMEOUT,
"Selection Timeout",
/*verbose_level*/1);
} }
ahc_outb(ahc, CLRINT, CLRSCSIINT); ahc_outb(ahc, CLRINT, CLRSCSIINT);
ahc_restart(ahc); ahc_restart(ahc);
...@@ -3763,8 +3771,9 @@ ahc_handle_devreset(struct ahc_softc *ahc, struct ahc_devinfo *devinfo, ...@@ -3763,8 +3771,9 @@ ahc_handle_devreset(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
/*period*/0, /*offset*/0, /*ppr_options*/0, /*period*/0, /*offset*/0, /*ppr_options*/0,
AHC_TRANS_CUR, /*paused*/TRUE); AHC_TRANS_CUR, /*paused*/TRUE);
ahc_send_async(ahc, devinfo->channel, devinfo->target, if (status != CAM_SEL_TIMEOUT)
CAM_LUN_WILDCARD, AC_SENT_BDR, NULL); ahc_send_async(ahc, devinfo->channel, devinfo->target,
CAM_LUN_WILDCARD, AC_SENT_BDR, NULL);
if (message != NULL if (message != NULL
&& (verbose_level <= bootverbose)) && (verbose_level <= bootverbose))
...@@ -4003,14 +4012,6 @@ ahc_reset(struct ahc_softc *ahc, int reinit) ...@@ -4003,14 +4012,6 @@ ahc_reset(struct ahc_softc *ahc, int reinit)
* to disturb the integrity of the bus. * to disturb the integrity of the bus.
*/ */
ahc_pause(ahc); ahc_pause(ahc);
if ((ahc_inb(ahc, HCNTRL) & CHIPRST) != 0) {
/*
* The chip has not been initialized since
* PCI/EISA/VLB bus reset. Don't trust
* "left over BIOS data".
*/
ahc->flags |= AHC_NO_BIOS_INIT;
}
sxfrctl1_b = 0; sxfrctl1_b = 0;
if ((ahc->chip & AHC_CHIPID_MASK) == AHC_AIC7770) { if ((ahc->chip & AHC_CHIPID_MASK) == AHC_AIC7770) {
u_int sblkctl; u_int sblkctl;
...@@ -5036,14 +5037,23 @@ ahc_pause_and_flushwork(struct ahc_softc *ahc) ...@@ -5036,14 +5037,23 @@ ahc_pause_and_flushwork(struct ahc_softc *ahc)
ahc->flags |= AHC_ALL_INTERRUPTS; ahc->flags |= AHC_ALL_INTERRUPTS;
paused = FALSE; paused = FALSE;
do { do {
if (paused) if (paused) {
ahc_unpause(ahc); ahc_unpause(ahc);
/*
* Give the sequencer some time to service
* any active selections.
*/
ahc_delay(500);
}
ahc_intr(ahc); ahc_intr(ahc);
ahc_pause(ahc); ahc_pause(ahc);
paused = TRUE; paused = TRUE;
ahc_outb(ahc, SCSISEQ, ahc_inb(ahc, SCSISEQ) & ~ENSELO); ahc_outb(ahc, SCSISEQ, ahc_inb(ahc, SCSISEQ) & ~ENSELO);
ahc_clear_critical_section(ahc);
intstat = ahc_inb(ahc, INTSTAT); intstat = ahc_inb(ahc, INTSTAT);
if ((intstat & INT_PEND) == 0) {
ahc_clear_critical_section(ahc);
intstat = ahc_inb(ahc, INTSTAT);
}
} while (--maxloops } while (--maxloops
&& (intstat != 0xFF || (ahc->features & AHC_REMOVABLE) == 0) && (intstat != 0xFF || (ahc->features & AHC_REMOVABLE) == 0)
&& ((intstat & INT_PEND) != 0 && ((intstat & INT_PEND) != 0
......
...@@ -635,6 +635,8 @@ ahc_linux_slave_alloc(struct scsi_device *sdev) ...@@ -635,6 +635,8 @@ ahc_linux_slave_alloc(struct scsi_device *sdev)
targ->sdev[sdev->lun] = sdev; targ->sdev[sdev->lun] = sdev;
spi_period(starget) = 0;
return 0; return 0;
} }
......
...@@ -265,7 +265,7 @@ ahc_scb_timer_reset(struct scb *scb, u_int usec) ...@@ -265,7 +265,7 @@ ahc_scb_timer_reset(struct scb *scb, u_int usec)
/***************************** SMP support ************************************/ /***************************** SMP support ************************************/
#include <linux/spinlock.h> #include <linux/spinlock.h>
#define AIC7XXX_DRIVER_VERSION "6.2.36" #define AIC7XXX_DRIVER_VERSION "7.0"
/*************************** Device Data Structures ***************************/ /*************************** Device Data Structures ***************************/
/* /*
......
...@@ -2,8 +2,8 @@ ...@@ -2,8 +2,8 @@
* DO NOT EDIT - This file is automatically generated * DO NOT EDIT - This file is automatically generated
* from the following source files: * from the following source files:
* *
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#56 $ * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#39 $ * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $
*/ */
typedef int (ahc_reg_print_t)(u_int, u_int *, u_int); typedef int (ahc_reg_print_t)(u_int, u_int *, u_int);
typedef struct ahc_reg_parse_entry { typedef struct ahc_reg_parse_entry {
...@@ -1298,7 +1298,6 @@ ahc_reg_print_t ahc_sg_cache_pre_print; ...@@ -1298,7 +1298,6 @@ ahc_reg_print_t ahc_sg_cache_pre_print;
#define CMDSIZE_TABLE_TAIL 0x34 #define CMDSIZE_TABLE_TAIL 0x34
#define MWI_RESIDUAL 0x38 #define MWI_RESIDUAL 0x38
#define TARG_IMMEDIATE_SCB 0x38
#define NEXT_QUEUED_SCB 0x39 #define NEXT_QUEUED_SCB 0x39
...@@ -1380,6 +1379,7 @@ ahc_reg_print_t ahc_sg_cache_pre_print; ...@@ -1380,6 +1379,7 @@ ahc_reg_print_t ahc_sg_cache_pre_print;
#define RETURN_2 0x52 #define RETURN_2 0x52
#define LAST_MSG 0x53 #define LAST_MSG 0x53
#define TARG_IMMEDIATE_SCB 0x53
#define SCSISEQ_TEMPLATE 0x54 #define SCSISEQ_TEMPLATE 0x54
#define ENSELO 0x40 #define ENSELO 0x40
......
...@@ -2,8 +2,8 @@ ...@@ -2,8 +2,8 @@
* DO NOT EDIT - This file is automatically generated * DO NOT EDIT - This file is automatically generated
* from the following source files: * from the following source files:
* *
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#56 $ * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#39 $ * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $
*/ */
#include "aic7xxx_osm.h" #include "aic7xxx_osm.h"
......
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