Commit 6f3c6ea6 authored by C A Subramaniam's avatar C A Subramaniam Committed by Hari Kanigeri

SYSLINK PROCMGR Fix to support multiple load/run of ducati samples

Fixed the bug where the L4 peripheral address table was getting
corrupted after calling mmu module's function to update TLB entry.
this resulted in the consecutive runs failure as wrong addresses
gets programmed due to L4 peripheral table corruption.
Signed-off-by: default avatarC A Subramaniam <subramaniam.ca@ti.com>
Signed-off-by: default avatarHari Kanigeri <h-kanigeri2@ti.com>
parent 773631ec
......@@ -1105,8 +1105,10 @@ int ducati_mmu_init(u32 a_phy_addr)
printk(KERN_INFO "PA [0x%x] VA [0x%x] size [0x%x]\n",
l4_map[i].ul_phy_addr, l4_map[i].ul_virt_addr,
l4_map[i].ul_size);
ret_val = add_dsp_mmu_entry((u32 *)&l4_map[i].ul_phy_addr,
(u32 *)&l4_map[i].ul_virt_addr, (l4_map[i].ul_size));
virt_addr = l4_map[i].ul_virt_addr;
phys_addr = l4_map[i].ul_phy_addr;
ret_val = add_dsp_mmu_entry(&phys_addr,
&virt_addr, (l4_map[i].ul_size));
if (WARN_ON(ret_val < 0)) {
DPRINTK("**** Failed to map Peripheral ****");
......
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