Commit 6c9f3355 authored by Manikandan Pillai's avatar Manikandan Pillai Committed by Tony Lindgren

Default MUX configuration added - GPIO140-143, GPIO0 and GPIO9

Default MUX configurations for GPIO on OMAP3 EVM boards are added.
Fixed for "_UP" naming convention for GPIOs comment.
Signed-off-by: default avatarManikandan Pillai <mani.pillai@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent e8b22165
...@@ -459,6 +459,19 @@ MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa, ...@@ -459,6 +459,19 @@ MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT) OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6, MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT) OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
MUX_CFG_34XX("AF26_34XX_GPIO0", 0x1e0,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
MUX_CFG_34XX("AF22_34XX_GPIO9", 0xa18,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
MUX_CFG_34XX("AF6_34XX_GPIO140_UP", 0x16c,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
MUX_CFG_34XX("AE6_34XX_GPIO141", 0x16e,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
MUX_CFG_34XX("AF5_34XX_GPIO142", 0x170,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
MUX_CFG_34XX("AE5_34XX_GPIO143", 0x172,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
}; };
#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
......
...@@ -790,6 +790,12 @@ enum omap34xx_index { ...@@ -790,6 +790,12 @@ enum omap34xx_index {
*/ */
AH8_34XX_GPIO29, AH8_34XX_GPIO29,
J25_34XX_GPIO170, J25_34XX_GPIO170,
AF26_34XX_GPIO0,
AF22_34XX_GPIO9,
AF6_34XX_GPIO140_UP,
AE6_34XX_GPIO141,
AF5_34XX_GPIO142,
AE5_34XX_GPIO143
}; };
struct omap_mux_cfg { struct omap_mux_cfg {
......
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