Commit 6a581e93 authored by Dhananjay Phadke's avatar Dhananjay Phadke Committed by David S. Miller

netxen: firmware hang detection

Implement state machine to detect firmware hung state
and recover. Since firmware will be shared by all PCI
functions that have different class drivers (NIC or
FCOE or iSCSI), explicit hardware based serialization
is required for initializing firmware.

o Used global scratchpad register to maintain device
  reference count. Every probed pci function adds to
  ref count.

o Implement timer (delayed work) for each pci func
  that checks firmware heartbit every 5 sec and detaches
  itself if firmware is dead. Last detaching function
  reloads firmware. Other functions wait for firmware
  init, and re-attach themselves.

Heartbit is not supported by NX2031 firmware.
Signed-off-by: default avatarAmit Kumar Salecha <amit@netxen.com>
Signed-off-by: default avatarDhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent db4cfd8a
......@@ -229,6 +229,8 @@
#define MPORT_SINGLE_FUNCTION_MODE 0x1111
#define MPORT_MULTI_FUNCTION_MODE 0x2222
#define NX_MAX_PCI_FUNC 8
/*
* NetXen host-peg signal message structure
*
......@@ -1101,6 +1103,10 @@ typedef struct {
#define NETXEN_ADAPTER_UP_MAGIC 777
#define NETXEN_NIC_PEG_TUNE 0
#define __NX_FW_ATTACHED 0
#define __NX_DEV_UP 1
#define __NX_RESETTING 2
struct netxen_dummy_dma {
void *addr;
dma_addr_t phys_addr;
......@@ -1137,7 +1143,9 @@ struct netxen_adapter {
u8 max_mc_count;
u8 rss_supported;
u8 link_changed;
u32 resv3;
u8 fw_wait_cnt;
u8 fw_fail_cnt;
u16 resv4;
u8 has_link_events;
u8 fw_type;
......@@ -1156,7 +1164,7 @@ struct netxen_adapter {
u32 temp;
u32 msi_tgt_status;
u32 resv4;
u32 heartbit;
struct netxen_adapter_stats stats;
......@@ -1187,14 +1195,15 @@ struct netxen_adapter {
struct netxen_dummy_dma dummy_dma;
struct work_struct watchdog_task;
struct timer_list watchdog_timer;
struct delayed_work fw_work;
struct work_struct tx_timeout_task;
struct net_device_stats net_stats;
nx_nic_intr_coalesce_t coal;
unsigned long state;
u32 resv5;
u32 fw_version;
const struct firmware *fw;
......
......@@ -678,6 +678,9 @@ int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
if (test_and_set_bit(__NX_FW_ATTACHED, &adapter->state))
goto done;
err = nx_fw_cmd_create_rx_ctx(adapter);
if (err)
goto err_out_free;
......@@ -690,6 +693,7 @@ int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
goto err_out_free;
}
done:
return 0;
err_out_free:
......@@ -708,6 +712,9 @@ void netxen_free_hw_resources(struct netxen_adapter *adapter)
int port = adapter->portnum;
if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
if (!test_and_clear_bit(__NX_FW_ATTACHED, &adapter->state))
goto done;
nx_fw_cmd_destroy_rx_ctx(adapter);
nx_fw_cmd_destroy_tx_ctx(adapter);
} else {
......@@ -720,6 +727,7 @@ void netxen_free_hw_resources(struct netxen_adapter *adapter)
/* Allow dma queues to drain after context reset */
msleep(20);
done:
recv_ctx = &adapter->recv_ctx;
if (recv_ctx->hwctx != NULL) {
......
......@@ -433,6 +433,7 @@ enum {
#define NETXEN_CRB_PEG_NET_1 NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_PGN1)
#define NETXEN_CRB_PEG_NET_2 NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_PGN2)
#define NETXEN_CRB_PEG_NET_3 NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_PGN3)
#define NETXEN_CRB_PEG_NET_4 NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_SQS2)
#define NETXEN_CRB_PEG_NET_D NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_PGND)
#define NETXEN_CRB_PEG_NET_I NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_PGNI)
#define NETXEN_CRB_DDR_NET NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_MN)
......@@ -945,6 +946,28 @@ enum {
#define NETXEN_DMA_WATCHDOG_CTRL (NETXEN_CAM_RAM(0x14))
#define NETXEN_PEG_ALIVE_COUNTER (NETXEN_CAM_RAM(0xb0))
#define NETXEN_PEG_HALT_STATUS1 (NETXEN_CAM_RAM(0xa8))
#define NETXEN_PEG_HALT_STATUS2 (NETXEN_CAM_RAM(0xac))
#define NX_CRB_DEV_REF_COUNT (NETXEN_CAM_RAM(0x138))
#define NX_CRB_DEV_STATE (NETXEN_CAM_RAM(0x140))
/* Device State */
#define NX_DEV_COLD 1
#define NX_DEV_INITALIZING 2
#define NX_DEV_READY 3
#define NX_DEV_NEED_RESET 4
#define NX_DEV_NEED_QUISCENT 5
#define NX_DEV_FAILED 6
#define NX_RCODE_DRIVER_INFO 0x20000000
#define NX_RCODE_DRIVER_CAN_RELOAD 0x40000000
#define NX_RCODE_FATAL_ERROR 0x80000000
#define NX_FWERROR_PEGNUM(code) ((code) & 0xff)
#define NX_FWERROR_CODE(code) ((code >> 8) & 0xfffff)
#define FW_POLL_DELAY (2 * HZ)
#define FW_FAIL_THRESH 3
#define FW_POLL_THRESH 10
#define ISR_MSI_INT_TRIGGER(FUNC) (NETXEN_PCIX_PS_REG(PCIX_MSI_F(FUNC)))
#define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200)
......
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