Commit 67834fa9 authored by Jie Zhang's avatar Jie Zhang Committed by Mike Frysinger

Blackfin: rename bfin_addr_dcachable to bfin_addr_dcacheable

The latter naming convention is much more common.
Signed-off-by: default avatarJie Zhang <jie.zhang@analog.com>
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent aa286ba3
...@@ -97,7 +97,7 @@ do { memcpy(dst, src, len); \ ...@@ -97,7 +97,7 @@ do { memcpy(dst, src, len); \
extern unsigned long reserved_mem_dcache_on; extern unsigned long reserved_mem_dcache_on;
extern unsigned long reserved_mem_icache_on; extern unsigned long reserved_mem_icache_on;
static inline int bfin_addr_dcachable(unsigned long addr) static inline int bfin_addr_dcacheable(unsigned long addr)
{ {
#ifdef CONFIG_BFIN_DCACHE #ifdef CONFIG_BFIN_DCACHE
if (addr < (_ramend - DMA_UNCACHED_REGION)) if (addr < (_ramend - DMA_UNCACHED_REGION))
......
...@@ -453,10 +453,10 @@ void *dma_memcpy(void *pdst, const void *psrc, size_t size) ...@@ -453,10 +453,10 @@ void *dma_memcpy(void *pdst, const void *psrc, size_t size)
unsigned long src = (unsigned long)psrc; unsigned long src = (unsigned long)psrc;
size_t bulk, rest; size_t bulk, rest;
if (bfin_addr_dcachable(src)) if (bfin_addr_dcacheable(src))
blackfin_dcache_flush_range(src, src + size); blackfin_dcache_flush_range(src, src + size);
if (bfin_addr_dcachable(dst)) if (bfin_addr_dcacheable(dst))
blackfin_dcache_invalidate_range(dst, dst + size); blackfin_dcache_invalidate_range(dst, dst + size);
bulk = size & ~0xffff; bulk = size & ~0xffff;
......
...@@ -151,7 +151,7 @@ static noinline int dcplb_miss(unsigned int cpu) ...@@ -151,7 +151,7 @@ static noinline int dcplb_miss(unsigned int cpu)
d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB; d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB;
#ifdef CONFIG_BFIN_DCACHE #ifdef CONFIG_BFIN_DCACHE
if (bfin_addr_dcachable(addr)) { if (bfin_addr_dcacheable(addr)) {
d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND;
#ifdef CONFIG_BFIN_WT #ifdef CONFIG_BFIN_WT
d_data |= CPLB_L1_AOW | CPLB_WT; d_data |= CPLB_L1_AOW | CPLB_WT;
......
...@@ -803,7 +803,7 @@ static void bfin_spi_pump_transfers(unsigned long data) ...@@ -803,7 +803,7 @@ static void bfin_spi_pump_transfers(unsigned long data)
drv_data->rx, drv_data->len_in_bytes); drv_data->rx, drv_data->len_in_bytes);
/* invalidate caches, if needed */ /* invalidate caches, if needed */
if (bfin_addr_dcachable((unsigned long) drv_data->rx)) if (bfin_addr_dcacheable((unsigned long) drv_data->rx))
invalidate_dcache_range((unsigned long) drv_data->rx, invalidate_dcache_range((unsigned long) drv_data->rx,
(unsigned long) (drv_data->rx + (unsigned long) (drv_data->rx +
drv_data->len_in_bytes)); drv_data->len_in_bytes));
...@@ -816,7 +816,7 @@ static void bfin_spi_pump_transfers(unsigned long data) ...@@ -816,7 +816,7 @@ static void bfin_spi_pump_transfers(unsigned long data)
dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n"); dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n");
/* flush caches, if needed */ /* flush caches, if needed */
if (bfin_addr_dcachable((unsigned long) drv_data->tx)) if (bfin_addr_dcacheable((unsigned long) drv_data->tx))
flush_dcache_range((unsigned long) drv_data->tx, flush_dcache_range((unsigned long) drv_data->tx,
(unsigned long) (drv_data->tx + (unsigned long) (drv_data->tx +
drv_data->len_in_bytes)); drv_data->len_in_bytes));
......
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