Commit 635b3c9d authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel

* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: (23 commits)
  drm/i915: remove full registers dump debug
  drm/i915: Add DP dpll limit on ironlake and use existing DPLL search function
  drm/i915: Select the correct BPC for LVDS on Ironlake
  drm/i915: Make the BPC in FDI rx/transcoder be consistent with that in pipeconf on Ironlake
  drm/i915: Enable/disable the dithering for LVDS based on VBT setting
  drm/i915: Permit pinning whilst the device is 'suspended'
  drm/i915: Hold struct mutex whilst pinning power context bo.
  drm/i915: fix unused var
  drm/i915: Storage class should be before const qualifier
  drm/i915: remove render reclock support
  drm/i915: Fix RC6 suspend/resume
  drm/i915: execbuf2 support
  drm/i915: Reload hangcheck timer too for Ironlake
  drm/i915: only enable hotplug for detected outputs
  drm/i915: Track whether cursor needs physical address in intel_device_info
  drm/i915: Implement IS_* macros using static tables
  drm/i915: Move PCI IDs into i915 driver
  drm/i915: Update LVDS connector status when receiving ACPI LID event
  drm/i915: Add MALATA PC-81005 to ACPI LID quirk list
  drm/i915: implement new pm ops for i915
  ...
parents 7959722b 823f68fd
...@@ -272,7 +272,7 @@ static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_co ...@@ -272,7 +272,7 @@ static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_co
mem = kmap_atomic(pages[page], KM_USER0); mem = kmap_atomic(pages[page], KM_USER0);
for (i = 0; i < PAGE_SIZE; i += 4) for (i = 0; i < PAGE_SIZE; i += 4)
seq_printf(m, "%08x : %08x\n", i, mem[i / 4]); seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
kunmap_atomic(pages[page], KM_USER0); kunmap_atomic(mem, KM_USER0);
} }
} }
...@@ -386,34 +386,6 @@ out: ...@@ -386,34 +386,6 @@ out:
return 0; return 0;
} }
static int i915_registers_info(struct seq_file *m, void *data) {
struct drm_info_node *node = (struct drm_info_node *) m->private;
struct drm_device *dev = node->minor->dev;
drm_i915_private_t *dev_priv = dev->dev_private;
uint32_t reg;
#define DUMP_RANGE(start, end) \
for (reg=start; reg < end; reg += 4) \
seq_printf(m, "%08x\t%08x\n", reg, I915_READ(reg));
DUMP_RANGE(0x00000, 0x00fff); /* VGA registers */
DUMP_RANGE(0x02000, 0x02fff); /* instruction, memory, interrupt control registers */
DUMP_RANGE(0x03000, 0x031ff); /* FENCE and PPGTT control registers */
DUMP_RANGE(0x03200, 0x03fff); /* frame buffer compression registers */
DUMP_RANGE(0x05000, 0x05fff); /* I/O control registers */
DUMP_RANGE(0x06000, 0x06fff); /* clock control registers */
DUMP_RANGE(0x07000, 0x07fff); /* 3D internal debug registers */
DUMP_RANGE(0x07400, 0x088ff); /* GPE debug registers */
DUMP_RANGE(0x0a000, 0x0afff); /* display palette registers */
DUMP_RANGE(0x10000, 0x13fff); /* MMIO MCHBAR */
DUMP_RANGE(0x30000, 0x3ffff); /* overlay registers */
DUMP_RANGE(0x60000, 0x6ffff); /* display engine pipeline registers */
DUMP_RANGE(0x70000, 0x72fff); /* display and cursor registers */
DUMP_RANGE(0x73000, 0x73fff); /* performance counters */
return 0;
}
static int static int
i915_wedged_open(struct inode *inode, i915_wedged_open(struct inode *inode,
struct file *filp) struct file *filp)
...@@ -519,7 +491,6 @@ static int i915_wedged_create(struct dentry *root, struct drm_minor *minor) ...@@ -519,7 +491,6 @@ static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
} }
static struct drm_info_list i915_debugfs_list[] = { static struct drm_info_list i915_debugfs_list[] = {
{"i915_regs", i915_registers_info, 0},
{"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST}, {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
{"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST}, {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
{"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST}, {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
......
...@@ -813,9 +813,13 @@ static int i915_getparam(struct drm_device *dev, void *data, ...@@ -813,9 +813,13 @@ static int i915_getparam(struct drm_device *dev, void *data,
case I915_PARAM_HAS_PAGEFLIPPING: case I915_PARAM_HAS_PAGEFLIPPING:
value = 1; value = 1;
break; break;
case I915_PARAM_HAS_EXECBUF2:
/* depends on GEM */
value = dev_priv->has_gem;
break;
default: default:
DRM_DEBUG_DRIVER("Unknown parameter %d\n", DRM_DEBUG_DRIVER("Unknown parameter %d\n",
param->param); param->param);
return -EINVAL; return -EINVAL;
} }
...@@ -1117,7 +1121,8 @@ static void i915_setup_compression(struct drm_device *dev, int size) ...@@ -1117,7 +1121,8 @@ static void i915_setup_compression(struct drm_device *dev, int size)
{ {
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_mm_node *compressed_fb, *compressed_llb; struct drm_mm_node *compressed_fb, *compressed_llb;
unsigned long cfb_base, ll_base; unsigned long cfb_base;
unsigned long ll_base = 0;
/* Leave 1M for line length buffer & misc. */ /* Leave 1M for line length buffer & misc. */
compressed_fb = drm_mm_search_free(&dev_priv->vram, size, 4096, 0); compressed_fb = drm_mm_search_free(&dev_priv->vram, size, 4096, 0);
...@@ -1200,14 +1205,6 @@ static int i915_load_modeset_init(struct drm_device *dev, ...@@ -1200,14 +1205,6 @@ static int i915_load_modeset_init(struct drm_device *dev,
dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) & dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) &
0xff000000; 0xff000000;
if (IS_MOBILE(dev) || IS_I9XX(dev))
dev_priv->cursor_needs_physical = true;
else
dev_priv->cursor_needs_physical = false;
if (IS_I965G(dev) || IS_G33(dev))
dev_priv->cursor_needs_physical = false;
/* Basic memrange allocator for stolen space (aka vram) */ /* Basic memrange allocator for stolen space (aka vram) */
drm_mm_init(&dev_priv->vram, 0, prealloc_size); drm_mm_init(&dev_priv->vram, 0, prealloc_size);
DRM_INFO("set up %ldM of stolen space\n", prealloc_size / (1024*1024)); DRM_INFO("set up %ldM of stolen space\n", prealloc_size / (1024*1024));
...@@ -1257,6 +1254,8 @@ static int i915_load_modeset_init(struct drm_device *dev, ...@@ -1257,6 +1254,8 @@ static int i915_load_modeset_init(struct drm_device *dev,
if (ret) if (ret)
goto destroy_ringbuffer; goto destroy_ringbuffer;
intel_modeset_init(dev);
ret = drm_irq_install(dev); ret = drm_irq_install(dev);
if (ret) if (ret)
goto destroy_ringbuffer; goto destroy_ringbuffer;
...@@ -1271,8 +1270,6 @@ static int i915_load_modeset_init(struct drm_device *dev, ...@@ -1271,8 +1270,6 @@ static int i915_load_modeset_init(struct drm_device *dev,
I915_WRITE(INSTPM, (1 << 5) | (1 << 21)); I915_WRITE(INSTPM, (1 << 5) | (1 << 21));
intel_modeset_init(dev);
drm_helper_initial_config(dev); drm_helper_initial_config(dev);
return 0; return 0;
...@@ -1360,7 +1357,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) ...@@ -1360,7 +1357,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
{ {
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
resource_size_t base, size; resource_size_t base, size;
int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1; int ret = 0, mmio_bar;
uint32_t agp_size, prealloc_size, prealloc_start; uint32_t agp_size, prealloc_size, prealloc_start;
/* i915 has 4 more counters */ /* i915 has 4 more counters */
...@@ -1376,8 +1373,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) ...@@ -1376,8 +1373,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
dev->dev_private = (void *)dev_priv; dev->dev_private = (void *)dev_priv;
dev_priv->dev = dev; dev_priv->dev = dev;
dev_priv->info = (struct intel_device_info *) flags;
/* Add register map (needed for suspend/resume) */ /* Add register map (needed for suspend/resume) */
mmio_bar = IS_I9XX(dev) ? 0 : 1;
base = drm_get_resource_start(dev, mmio_bar); base = drm_get_resource_start(dev, mmio_bar);
size = drm_get_resource_len(dev, mmio_bar); size = drm_get_resource_len(dev, mmio_bar);
...@@ -1652,6 +1651,7 @@ struct drm_ioctl_desc i915_ioctls[] = { ...@@ -1652,6 +1651,7 @@ struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH), DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH),
DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH),
DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY), DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY), DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH), DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH),
......
...@@ -33,7 +33,6 @@ ...@@ -33,7 +33,6 @@
#include "i915_drm.h" #include "i915_drm.h"
#include "i915_drv.h" #include "i915_drv.h"
#include "drm_pciids.h"
#include <linux/console.h> #include <linux/console.h>
#include "drm_crtc_helper.h" #include "drm_crtc_helper.h"
...@@ -48,8 +47,124 @@ module_param_named(powersave, i915_powersave, int, 0400); ...@@ -48,8 +47,124 @@ module_param_named(powersave, i915_powersave, int, 0400);
static struct drm_driver driver; static struct drm_driver driver;
static struct pci_device_id pciidlist[] = { #define INTEL_VGA_DEVICE(id, info) { \
i915_PCI_IDS .class = PCI_CLASS_DISPLAY_VGA << 8, \
.class_mask = 0xffff00, \
.vendor = 0x8086, \
.device = id, \
.subvendor = PCI_ANY_ID, \
.subdevice = PCI_ANY_ID, \
.driver_data = (unsigned long) info }
const static struct intel_device_info intel_i830_info = {
.is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
};
const static struct intel_device_info intel_845g_info = {
.is_i8xx = 1,
};
const static struct intel_device_info intel_i85x_info = {
.is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i865g_info = {
.is_i8xx = 1,
};
const static struct intel_device_info intel_i915g_info = {
.is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i915gm_info = {
.is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
.cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i945g_info = {
.is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i945gm_info = {
.is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
.has_hotplug = 1, .cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i965g_info = {
.is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
};
const static struct intel_device_info intel_i965gm_info = {
.is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
.is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
.has_hotplug = 1,
};
const static struct intel_device_info intel_g33_info = {
.is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
.has_hotplug = 1,
};
const static struct intel_device_info intel_g45_info = {
.is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
.has_pipe_cxsr = 1,
.has_hotplug = 1,
};
const static struct intel_device_info intel_gm45_info = {
.is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
.is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
.has_pipe_cxsr = 1,
.has_hotplug = 1,
};
const static struct intel_device_info intel_pineview_info = {
.is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
.has_pipe_cxsr = 1,
.has_hotplug = 1,
};
const static struct intel_device_info intel_ironlake_d_info = {
.is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
.has_pipe_cxsr = 1,
.has_hotplug = 1,
};
const static struct intel_device_info intel_ironlake_m_info = {
.is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
.need_gfx_hws = 1, .has_rc6 = 1,
.has_hotplug = 1,
};
const static struct pci_device_id pciidlist[] = {
INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
{0, 0, 0}
}; };
#if defined(CONFIG_DRM_I915_KMS) #if defined(CONFIG_DRM_I915_KMS)
...@@ -284,6 +399,52 @@ i915_pci_resume(struct pci_dev *pdev) ...@@ -284,6 +399,52 @@ i915_pci_resume(struct pci_dev *pdev)
return i915_resume(dev); return i915_resume(dev);
} }
static int
i915_pm_suspend(struct device *dev)
{
return i915_pci_suspend(to_pci_dev(dev), PMSG_SUSPEND);
}
static int
i915_pm_resume(struct device *dev)
{
return i915_pci_resume(to_pci_dev(dev));
}
static int
i915_pm_freeze(struct device *dev)
{
return i915_pci_suspend(to_pci_dev(dev), PMSG_FREEZE);
}
static int
i915_pm_thaw(struct device *dev)
{
/* thaw during hibernate, do nothing! */
return 0;
}
static int
i915_pm_poweroff(struct device *dev)
{
return i915_pci_suspend(to_pci_dev(dev), PMSG_HIBERNATE);
}
static int
i915_pm_restore(struct device *dev)
{
return i915_pci_resume(to_pci_dev(dev));
}
const struct dev_pm_ops i915_pm_ops = {
.suspend = i915_pm_suspend,
.resume = i915_pm_resume,
.freeze = i915_pm_freeze,
.thaw = i915_pm_thaw,
.poweroff = i915_pm_poweroff,
.restore = i915_pm_restore,
};
static struct vm_operations_struct i915_gem_vm_ops = { static struct vm_operations_struct i915_gem_vm_ops = {
.fault = i915_gem_fault, .fault = i915_gem_fault,
.open = drm_gem_vm_open, .open = drm_gem_vm_open,
...@@ -303,8 +464,6 @@ static struct drm_driver driver = { ...@@ -303,8 +464,6 @@ static struct drm_driver driver = {
.lastclose = i915_driver_lastclose, .lastclose = i915_driver_lastclose,
.preclose = i915_driver_preclose, .preclose = i915_driver_preclose,
.postclose = i915_driver_postclose, .postclose = i915_driver_postclose,
.suspend = i915_suspend,
.resume = i915_resume,
.device_is_agp = i915_driver_device_is_agp, .device_is_agp = i915_driver_device_is_agp,
.enable_vblank = i915_enable_vblank, .enable_vblank = i915_enable_vblank,
.disable_vblank = i915_disable_vblank, .disable_vblank = i915_disable_vblank,
...@@ -344,10 +503,7 @@ static struct drm_driver driver = { ...@@ -344,10 +503,7 @@ static struct drm_driver driver = {
.id_table = pciidlist, .id_table = pciidlist,
.probe = i915_pci_probe, .probe = i915_pci_probe,
.remove = i915_pci_remove, .remove = i915_pci_remove,
#ifdef CONFIG_PM .driver.pm = &i915_pm_ops,
.resume = i915_pci_resume,
.suspend = i915_pci_suspend,
#endif
}, },
.name = DRIVER_NAME, .name = DRIVER_NAME,
......
...@@ -172,9 +172,31 @@ struct drm_i915_display_funcs { ...@@ -172,9 +172,31 @@ struct drm_i915_display_funcs {
struct intel_overlay; struct intel_overlay;
struct intel_device_info {
u8 is_mobile : 1;
u8 is_i8xx : 1;
u8 is_i915g : 1;
u8 is_i9xx : 1;
u8 is_i945gm : 1;
u8 is_i965g : 1;
u8 is_i965gm : 1;
u8 is_g33 : 1;
u8 need_gfx_hws : 1;
u8 is_g4x : 1;
u8 is_pineview : 1;
u8 is_ironlake : 1;
u8 has_fbc : 1;
u8 has_rc6 : 1;
u8 has_pipe_cxsr : 1;
u8 has_hotplug : 1;
u8 cursor_needs_physical : 1;
};
typedef struct drm_i915_private { typedef struct drm_i915_private {
struct drm_device *dev; struct drm_device *dev;
const struct intel_device_info *info;
int has_gem; int has_gem;
void __iomem *regs; void __iomem *regs;
...@@ -232,8 +254,6 @@ typedef struct drm_i915_private { ...@@ -232,8 +254,6 @@ typedef struct drm_i915_private {
int hangcheck_count; int hangcheck_count;
uint32_t last_acthd; uint32_t last_acthd;
bool cursor_needs_physical;
struct drm_mm vram; struct drm_mm vram;
unsigned long cfb_size; unsigned long cfb_size;
...@@ -287,8 +307,6 @@ typedef struct drm_i915_private { ...@@ -287,8 +307,6 @@ typedef struct drm_i915_private {
u32 saveDSPACNTR; u32 saveDSPACNTR;
u32 saveDSPBCNTR; u32 saveDSPBCNTR;
u32 saveDSPARB; u32 saveDSPARB;
u32 saveRENDERSTANDBY;
u32 savePWRCTXA;
u32 saveHWS; u32 saveHWS;
u32 savePIPEACONF; u32 savePIPEACONF;
u32 savePIPEBCONF; u32 savePIPEBCONF;
...@@ -561,6 +579,7 @@ typedef struct drm_i915_private { ...@@ -561,6 +579,7 @@ typedef struct drm_i915_private {
u16 orig_clock; u16 orig_clock;
int child_dev_num; int child_dev_num;
struct child_device_config *child_dev; struct child_device_config *child_dev;
struct drm_connector *int_lvds_connector;
} drm_i915_private_t; } drm_i915_private_t;
/** driver private structure attached to each drm_gem_object */ /** driver private structure attached to each drm_gem_object */
...@@ -794,6 +813,8 @@ int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data, ...@@ -794,6 +813,8 @@ int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv); struct drm_file *file_priv);
int i915_gem_execbuffer(struct drm_device *dev, void *data, int i915_gem_execbuffer(struct drm_device *dev, void *data,
struct drm_file *file_priv); struct drm_file *file_priv);
int i915_gem_execbuffer2(struct drm_device *dev, void *data,
struct drm_file *file_priv);
int i915_gem_pin_ioctl(struct drm_device *dev, void *data, int i915_gem_pin_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv); struct drm_file *file_priv);
int i915_gem_unpin_ioctl(struct drm_device *dev, void *data, int i915_gem_unpin_ioctl(struct drm_device *dev, void *data,
...@@ -860,6 +881,9 @@ void i915_gem_shrinker_exit(void); ...@@ -860,6 +881,9 @@ void i915_gem_shrinker_exit(void);
void i915_gem_detect_bit_6_swizzle(struct drm_device *dev); void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
void i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj); void i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj);
void i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj); void i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj);
bool i915_tiling_ok(struct drm_device *dev, int stride, int size,
int tiling_mode);
bool i915_obj_fenceable(struct drm_device *dev, struct drm_gem_object *obj);
/* i915_gem_debug.c */ /* i915_gem_debug.c */
void i915_gem_dump_object(struct drm_gem_object *obj, int len, void i915_gem_dump_object(struct drm_gem_object *obj, int len,
...@@ -982,67 +1006,33 @@ extern void g4x_disable_fbc(struct drm_device *dev); ...@@ -982,67 +1006,33 @@ extern void g4x_disable_fbc(struct drm_device *dev);
extern int i915_wrap_ring(struct drm_device * dev); extern int i915_wrap_ring(struct drm_device * dev);
extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
#define IS_I830(dev) ((dev)->pci_device == 0x3577) #define INTEL_INFO(dev) (((struct drm_i915_private *) (dev)->dev_private)->info)
#define IS_845G(dev) ((dev)->pci_device == 0x2562)
#define IS_I85X(dev) ((dev)->pci_device == 0x3582) #define IS_I830(dev) ((dev)->pci_device == 0x3577)
#define IS_I865G(dev) ((dev)->pci_device == 0x2572) #define IS_845G(dev) ((dev)->pci_device == 0x2562)
#define IS_I8XX(dev) (IS_I830(dev) || IS_845G(dev) || IS_I85X(dev) || IS_I865G(dev)) #define IS_I85X(dev) ((dev)->pci_device == 0x3582)
#define IS_I865G(dev) ((dev)->pci_device == 0x2572)
#define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a) #define IS_I8XX(dev) (INTEL_INFO(dev)->is_i8xx)
#define IS_I915GM(dev) ((dev)->pci_device == 0x2592) #define IS_I915G(dev) (INTEL_INFO(dev)->is_i915g)
#define IS_I945G(dev) ((dev)->pci_device == 0x2772) #define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\ #define IS_I945G(dev) ((dev)->pci_device == 0x2772)
(dev)->pci_device == 0x27AE) #define IS_I945GM(dev) (INTEL_INFO(dev)->is_i945gm)
#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \ #define IS_I965G(dev) (INTEL_INFO(dev)->is_i965g)
(dev)->pci_device == 0x2982 || \ #define IS_I965GM(dev) (INTEL_INFO(dev)->is_i965gm)
(dev)->pci_device == 0x2992 || \ #define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
(dev)->pci_device == 0x29A2 || \ #define IS_G4X(dev) (INTEL_INFO(dev)->is_g4x)
(dev)->pci_device == 0x2A02 || \ #define IS_PINEVIEW_G(dev) ((dev)->pci_device == 0xa001)
(dev)->pci_device == 0x2A12 || \ #define IS_PINEVIEW_M(dev) ((dev)->pci_device == 0xa011)
(dev)->pci_device == 0x2A42 || \ #define IS_PINEVIEW(dev) (INTEL_INFO(dev)->is_pineview)
(dev)->pci_device == 0x2E02 || \ #define IS_G33(dev) (INTEL_INFO(dev)->is_g33)
(dev)->pci_device == 0x2E12 || \
(dev)->pci_device == 0x2E22 || \
(dev)->pci_device == 0x2E32 || \
(dev)->pci_device == 0x2E42 || \
(dev)->pci_device == 0x0042 || \
(dev)->pci_device == 0x0046)
#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02 || \
(dev)->pci_device == 0x2A12)
#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
(dev)->pci_device == 0x2E12 || \
(dev)->pci_device == 0x2E22 || \
(dev)->pci_device == 0x2E32 || \
(dev)->pci_device == 0x2E42 || \
IS_GM45(dev))
#define IS_PINEVIEW_G(dev) ((dev)->pci_device == 0xa001)
#define IS_PINEVIEW_M(dev) ((dev)->pci_device == 0xa011)
#define IS_PINEVIEW(dev) (IS_PINEVIEW_G(dev) || IS_PINEVIEW_M(dev))
#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
(dev)->pci_device == 0x29B2 || \
(dev)->pci_device == 0x29D2 || \
(IS_PINEVIEW(dev)))
#define IS_IRONLAKE_D(dev) ((dev)->pci_device == 0x0042) #define IS_IRONLAKE_D(dev) ((dev)->pci_device == 0x0042)
#define IS_IRONLAKE_M(dev) ((dev)->pci_device == 0x0046) #define IS_IRONLAKE_M(dev) ((dev)->pci_device == 0x0046)
#define IS_IRONLAKE(dev) (IS_IRONLAKE_D(dev) || IS_IRONLAKE_M(dev)) #define IS_IRONLAKE(dev) (INTEL_INFO(dev)->is_ironlake)
#define IS_I9XX(dev) (INTEL_INFO(dev)->is_i9xx)
#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \ #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)
IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev) || \
IS_IRONLAKE(dev))
#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \ #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev) || \
IS_PINEVIEW(dev) || IS_IRONLAKE_M(dev))
#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev) || \
IS_IRONLAKE(dev))
/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
* rows, which changed the alignment requirements and fence programming. * rows, which changed the alignment requirements and fence programming.
*/ */
...@@ -1054,17 +1044,14 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); ...@@ -1054,17 +1044,14 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
#define SUPPORTS_EDP(dev) (IS_IRONLAKE_M(dev)) #define SUPPORTS_EDP(dev) (IS_IRONLAKE_M(dev))
#define SUPPORTS_TV(dev) (IS_I9XX(dev) && IS_MOBILE(dev) && \ #define SUPPORTS_TV(dev) (IS_I9XX(dev) && IS_MOBILE(dev) && \
!IS_IRONLAKE(dev) && !IS_PINEVIEW(dev)) !IS_IRONLAKE(dev) && !IS_PINEVIEW(dev))
#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev) || IS_I965G(dev)) #define I915_HAS_HOTPLUG(dev) (INTEL_INFO(dev)->has_hotplug)
/* dsparb controlled by hw only */ /* dsparb controlled by hw only */
#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IRONLAKE(dev)) #define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IRONLAKE(dev))
#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IRONLAKE(dev)) #define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IRONLAKE(dev))
#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IRONLAKE(dev)) #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \ #define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
(IS_I9XX(dev) || IS_GM45(dev)) && \ #define I915_HAS_RC6(dev) (INTEL_INFO(dev)->has_rc6)
!IS_PINEVIEW(dev) && \
!IS_IRONLAKE(dev))
#define I915_HAS_RC6(dev) (IS_I965GM(dev) || IS_GM45(dev) || IS_IRONLAKE_M(dev))
#define PRIMARY_RINGBUFFER_SIZE (128*1024) #define PRIMARY_RINGBUFFER_SIZE (128*1024)
......
This diff is collapsed.
...@@ -304,35 +304,39 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev) ...@@ -304,35 +304,39 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
/** /**
* Returns the size of the fence for a tiled object of the given size. * Returns whether an object is currently fenceable. If not, it may need
* to be unbound and have its pitch adjusted.
*/ */
static int bool
i915_get_fence_size(struct drm_device *dev, int size) i915_obj_fenceable(struct drm_device *dev, struct drm_gem_object *obj)
{ {
int i; struct drm_i915_gem_object *obj_priv = obj->driver_private;
int start;
if (IS_I965G(dev)) { if (IS_I965G(dev)) {
/* The 965 can have fences at any page boundary. */ /* The 965 can have fences at any page boundary. */
return ALIGN(size, 4096); if (obj->size & 4095)
return false;
return true;
} else if (IS_I9XX(dev)) {
if (obj_priv->gtt_offset & ~I915_FENCE_START_MASK)
return false;
} else { } else {
/* Align the size to a power of two greater than the smallest if (obj_priv->gtt_offset & ~I830_FENCE_START_MASK)
* fence size. return false;
*/ }
if (IS_I9XX(dev))
start = 1024 * 1024;
else
start = 512 * 1024;
for (i = start; i < size; i <<= 1) /* Power of two sized... */
; if (obj->size & (obj->size - 1))
return false;
return i; /* Objects must be size aligned as well */
} if (obj_priv->gtt_offset & (obj->size - 1))
return false;
return true;
} }
/* Check pitch constriants for all chips & tiling formats */ /* Check pitch constriants for all chips & tiling formats */
static bool bool
i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
{ {
int tile_width; int tile_width;
...@@ -384,12 +388,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) ...@@ -384,12 +388,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
if (stride & (stride - 1)) if (stride & (stride - 1))
return false; return false;
/* We don't 0handle the aperture area covered by the fence being bigger
* than the object size.
*/
if (i915_get_fence_size(dev, size) != size)
return false;
return true; return true;
} }
......
...@@ -313,6 +313,8 @@ irqreturn_t ironlake_irq_handler(struct drm_device *dev) ...@@ -313,6 +313,8 @@ irqreturn_t ironlake_irq_handler(struct drm_device *dev)
dev_priv->mm.irq_gem_seqno = seqno; dev_priv->mm.irq_gem_seqno = seqno;
trace_i915_gem_request_complete(dev, seqno); trace_i915_gem_request_complete(dev, seqno);
DRM_WAKEUP(&dev_priv->irq_queue); DRM_WAKEUP(&dev_priv->irq_queue);
dev_priv->hangcheck_count = 0;
mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD);
} }
if (de_iir & DE_GSE) if (de_iir & DE_GSE)
...@@ -1084,6 +1086,10 @@ void i915_driver_irq_preinstall(struct drm_device * dev) ...@@ -1084,6 +1086,10 @@ void i915_driver_irq_preinstall(struct drm_device * dev)
(void) I915_READ(IER); (void) I915_READ(IER);
} }
/*
* Must be called after intel_modeset_init or hotplug interrupts won't be
* enabled correctly.
*/
int i915_driver_irq_postinstall(struct drm_device *dev) int i915_driver_irq_postinstall(struct drm_device *dev)
{ {
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
...@@ -1106,19 +1112,23 @@ int i915_driver_irq_postinstall(struct drm_device *dev) ...@@ -1106,19 +1112,23 @@ int i915_driver_irq_postinstall(struct drm_device *dev)
if (I915_HAS_HOTPLUG(dev)) { if (I915_HAS_HOTPLUG(dev)) {
u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN); u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN);
/* Leave other bits alone */ /* Note HDMI and DP share bits */
hotplug_en |= HOTPLUG_EN_MASK; if (dev_priv->hotplug_supported_mask & HDMIB_HOTPLUG_INT_STATUS)
hotplug_en |= HDMIB_HOTPLUG_INT_EN;
if (dev_priv->hotplug_supported_mask & HDMIC_HOTPLUG_INT_STATUS)
hotplug_en |= HDMIC_HOTPLUG_INT_EN;
if (dev_priv->hotplug_supported_mask & HDMID_HOTPLUG_INT_STATUS)
hotplug_en |= HDMID_HOTPLUG_INT_EN;
if (dev_priv->hotplug_supported_mask & SDVOC_HOTPLUG_INT_STATUS)
hotplug_en |= SDVOC_HOTPLUG_INT_EN;
if (dev_priv->hotplug_supported_mask & SDVOB_HOTPLUG_INT_STATUS)
hotplug_en |= SDVOB_HOTPLUG_INT_EN;
if (dev_priv->hotplug_supported_mask & CRT_HOTPLUG_INT_STATUS)
hotplug_en |= CRT_HOTPLUG_INT_EN;
/* Ignore TV since it's buggy */
I915_WRITE(PORT_HOTPLUG_EN, hotplug_en); I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
dev_priv->hotplug_supported_mask = CRT_HOTPLUG_INT_STATUS |
TV_HOTPLUG_INT_STATUS | SDVOC_HOTPLUG_INT_STATUS |
SDVOB_HOTPLUG_INT_STATUS;
if (IS_G4X(dev)) {
dev_priv->hotplug_supported_mask |=
HDMIB_HOTPLUG_INT_STATUS |
HDMIC_HOTPLUG_INT_STATUS |
HDMID_HOTPLUG_INT_STATUS;
}
/* Enable in IER... */ /* Enable in IER... */
enable_mask |= I915_DISPLAY_PORT_INTERRUPT; enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
/* and unmask in IMR */ /* and unmask in IMR */
......
...@@ -879,13 +879,6 @@ ...@@ -879,13 +879,6 @@
#define CRT_HOTPLUG_DETECT_VOLTAGE_475MV (1 << 2) #define CRT_HOTPLUG_DETECT_VOLTAGE_475MV (1 << 2)
#define CRT_HOTPLUG_MASK (0x3fc) /* Bits 9-2 */ #define CRT_HOTPLUG_MASK (0x3fc) /* Bits 9-2 */
#define CRT_FORCE_HOTPLUG_MASK 0xfffffe1f #define CRT_FORCE_HOTPLUG_MASK 0xfffffe1f
#define HOTPLUG_EN_MASK (HDMIB_HOTPLUG_INT_EN | \
HDMIC_HOTPLUG_INT_EN | \
HDMID_HOTPLUG_INT_EN | \
SDVOB_HOTPLUG_INT_EN | \
SDVOC_HOTPLUG_INT_EN | \
CRT_HOTPLUG_INT_EN)
#define PORT_HOTPLUG_STAT 0x61114 #define PORT_HOTPLUG_STAT 0x61114
#define HDMIB_HOTPLUG_INT_STATUS (1 << 29) #define HDMIB_HOTPLUG_INT_STATUS (1 << 29)
...@@ -982,6 +975,8 @@ ...@@ -982,6 +975,8 @@
#define LVDS_PORT_EN (1 << 31) #define LVDS_PORT_EN (1 << 31)
/* Selects pipe B for LVDS data. Must be set on pre-965. */ /* Selects pipe B for LVDS data. Must be set on pre-965. */
#define LVDS_PIPEB_SELECT (1 << 30) #define LVDS_PIPEB_SELECT (1 << 30)
/* LVDS dithering flag on 965/g4x platform */
#define LVDS_ENABLE_DITHER (1 << 25)
/* Enable border for unscaled (or aspect-scaled) display */ /* Enable border for unscaled (or aspect-scaled) display */
#define LVDS_BORDER_ENABLE (1 << 15) #define LVDS_BORDER_ENABLE (1 << 15)
/* /*
...@@ -1751,6 +1746,8 @@ ...@@ -1751,6 +1746,8 @@
/* Display & cursor control */ /* Display & cursor control */
/* dithering flag on Ironlake */
#define PIPE_ENABLE_DITHER (1 << 4)
/* Pipe A */ /* Pipe A */
#define PIPEADSL 0x70000 #define PIPEADSL 0x70000
#define PIPEACONF 0x70008 #define PIPEACONF 0x70008
......
...@@ -732,12 +732,6 @@ int i915_save_state(struct drm_device *dev) ...@@ -732,12 +732,6 @@ int i915_save_state(struct drm_device *dev)
pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB); pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB);
/* Render Standby */
if (I915_HAS_RC6(dev)) {
dev_priv->saveRENDERSTANDBY = I915_READ(MCHBAR_RENDER_STANDBY);
dev_priv->savePWRCTXA = I915_READ(PWRCTXA);
}
/* Hardware status page */ /* Hardware status page */
dev_priv->saveHWS = I915_READ(HWS_PGA); dev_priv->saveHWS = I915_READ(HWS_PGA);
...@@ -793,12 +787,6 @@ int i915_restore_state(struct drm_device *dev) ...@@ -793,12 +787,6 @@ int i915_restore_state(struct drm_device *dev)
pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB); pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB);
/* Render Standby */
if (I915_HAS_RC6(dev)) {
I915_WRITE(MCHBAR_RENDER_STANDBY, dev_priv->saveRENDERSTANDBY);
I915_WRITE(PWRCTXA, dev_priv->savePWRCTXA);
}
/* Hardware status page */ /* Hardware status page */
I915_WRITE(HWS_PGA, dev_priv->saveHWS); I915_WRITE(HWS_PGA, dev_priv->saveHWS);
......
...@@ -548,4 +548,6 @@ void intel_crt_init(struct drm_device *dev) ...@@ -548,4 +548,6 @@ void intel_crt_init(struct drm_device *dev)
drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
drm_sysfs_connector_add(connector); drm_sysfs_connector_add(connector);
dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
} }
This diff is collapsed.
...@@ -1402,14 +1402,20 @@ intel_dp_init(struct drm_device *dev, int output_reg) ...@@ -1402,14 +1402,20 @@ intel_dp_init(struct drm_device *dev, int output_reg)
break; break;
case DP_B: case DP_B:
case PCH_DP_B: case PCH_DP_B:
dev_priv->hotplug_supported_mask |=
HDMIB_HOTPLUG_INT_STATUS;
name = "DPDDC-B"; name = "DPDDC-B";
break; break;
case DP_C: case DP_C:
case PCH_DP_C: case PCH_DP_C:
dev_priv->hotplug_supported_mask |=
HDMIC_HOTPLUG_INT_STATUS;
name = "DPDDC-C"; name = "DPDDC-C";
break; break;
case DP_D: case DP_D:
case PCH_DP_D: case PCH_DP_D:
dev_priv->hotplug_supported_mask |=
HDMID_HOTPLUG_INT_STATUS;
name = "DPDDC-D"; name = "DPDDC-D";
break; break;
} }
......
...@@ -303,21 +303,26 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg) ...@@ -303,21 +303,26 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
if (sdvox_reg == SDVOB) { if (sdvox_reg == SDVOB) {
intel_output->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT); intel_output->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB"); intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB");
dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
} else if (sdvox_reg == SDVOC) { } else if (sdvox_reg == SDVOC) {
intel_output->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT); intel_output->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
intel_output->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC"); intel_output->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC");
dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
} else if (sdvox_reg == HDMIB) { } else if (sdvox_reg == HDMIB) {
intel_output->clone_mask = (1 << INTEL_HDMID_CLONE_BIT); intel_output->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOE, intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOE,
"HDMIB"); "HDMIB");
dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
} else if (sdvox_reg == HDMIC) { } else if (sdvox_reg == HDMIC) {
intel_output->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT); intel_output->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOD, intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOD,
"HDMIC"); "HDMIC");
dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
} else if (sdvox_reg == HDMID) { } else if (sdvox_reg == HDMID) {
intel_output->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT); intel_output->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOF, intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOF,
"HDMID"); "HDMID");
dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
} }
if (!intel_output->ddc_bus) if (!intel_output->ddc_bus)
goto err_connector; goto err_connector;
......
...@@ -608,6 +608,13 @@ static const struct dmi_system_id bad_lid_status[] = { ...@@ -608,6 +608,13 @@ static const struct dmi_system_id bad_lid_status[] = {
DMI_MATCH(DMI_PRODUCT_NAME, "Aspire one"), DMI_MATCH(DMI_PRODUCT_NAME, "Aspire one"),
}, },
}, },
{
.ident = "PC-81005",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "MALATA"),
DMI_MATCH(DMI_PRODUCT_NAME, "PC-81005"),
},
},
{ } { }
}; };
...@@ -679,7 +686,14 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val, ...@@ -679,7 +686,14 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
struct drm_i915_private *dev_priv = struct drm_i915_private *dev_priv =
container_of(nb, struct drm_i915_private, lid_notifier); container_of(nb, struct drm_i915_private, lid_notifier);
struct drm_device *dev = dev_priv->dev; struct drm_device *dev = dev_priv->dev;
struct drm_connector *connector = dev_priv->int_lvds_connector;
/*
* check and update the status of LVDS connector after receiving
* the LID nofication event.
*/
if (connector)
connector->status = connector->funcs->detect(connector);
if (!acpi_lid_open()) { if (!acpi_lid_open()) {
dev_priv->modeset_on_lid = 1; dev_priv->modeset_on_lid = 1;
return NOTIFY_OK; return NOTIFY_OK;
...@@ -854,65 +868,6 @@ static const struct dmi_system_id intel_no_lvds[] = { ...@@ -854,65 +868,6 @@ static const struct dmi_system_id intel_no_lvds[] = {
{ } /* terminating entry */ { } /* terminating entry */
}; };
#ifdef CONFIG_ACPI
/*
* check_lid_device -- check whether @handle is an ACPI LID device.
* @handle: ACPI device handle
* @level : depth in the ACPI namespace tree
* @context: the number of LID device when we find the device
* @rv: a return value to fill if desired (Not use)
*/
static acpi_status
check_lid_device(acpi_handle handle, u32 level, void *context,
void **return_value)
{
struct acpi_device *acpi_dev;
int *lid_present = context;
acpi_dev = NULL;
/* Get the acpi device for device handle */
if (acpi_bus_get_device(handle, &acpi_dev) || !acpi_dev) {
/* If there is no ACPI device for handle, return */
return AE_OK;
}
if (!strncmp(acpi_device_hid(acpi_dev), "PNP0C0D", 7))
*lid_present = 1;
return AE_OK;
}
/**
* check whether there exists the ACPI LID device by enumerating the ACPI
* device tree.
*/
static int intel_lid_present(void)
{
int lid_present = 0;
if (acpi_disabled) {
/* If ACPI is disabled, there is no ACPI device tree to
* check, so assume the LID device would have been present.
*/
return 1;
}
acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
ACPI_UINT32_MAX,
check_lid_device, NULL, &lid_present, NULL);
return lid_present;
}
#else
static int intel_lid_present(void)
{
/* In the absence of ACPI built in, assume that the LID device would
* have been present.
*/
return 1;
}
#endif
/** /**
* intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
* @dev: drm device * @dev: drm device
...@@ -1031,12 +986,8 @@ void intel_lvds_init(struct drm_device *dev) ...@@ -1031,12 +986,8 @@ void intel_lvds_init(struct drm_device *dev)
if (dmi_check_system(intel_no_lvds)) if (dmi_check_system(intel_no_lvds))
return; return;
/* if (!lvds_is_present_in_vbt(dev)) {
* Assume LVDS is present if there's an ACPI lid device or if the DRM_DEBUG_KMS("LVDS is not present in VBT\n");
* device is present in the VBT.
*/
if (!lvds_is_present_in_vbt(dev) && !intel_lid_present()) {
DRM_DEBUG_KMS("LVDS is not present in VBT and no lid detected\n");
return; return;
} }
...@@ -1180,6 +1131,8 @@ out: ...@@ -1180,6 +1131,8 @@ out:
DRM_DEBUG_KMS("lid notifier registration failed\n"); DRM_DEBUG_KMS("lid notifier registration failed\n");
dev_priv->lid_notifier.notifier_call = NULL; dev_priv->lid_notifier.notifier_call = NULL;
} }
/* keep the LVDS connector */
dev_priv->int_lvds_connector = connector;
drm_sysfs_connector_add(connector); drm_sysfs_connector_add(connector);
return; return;
......
...@@ -2662,6 +2662,7 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) ...@@ -2662,6 +2662,7 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector)
bool intel_sdvo_init(struct drm_device *dev, int output_device) bool intel_sdvo_init(struct drm_device *dev, int output_device)
{ {
struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_connector *connector; struct drm_connector *connector;
struct intel_output *intel_output; struct intel_output *intel_output;
struct intel_sdvo_priv *sdvo_priv; struct intel_sdvo_priv *sdvo_priv;
...@@ -2708,10 +2709,12 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device) ...@@ -2708,10 +2709,12 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS"); intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS");
sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA,
"SDVOB/VGA DDC BUS"); "SDVOB/VGA DDC BUS");
dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
} else { } else {
intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS"); intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS");
sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA,
"SDVOC/VGA DDC BUS"); "SDVOC/VGA DDC BUS");
dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
} }
if (intel_output->ddc_bus == NULL) if (intel_output->ddc_bus == NULL)
......
...@@ -1840,6 +1840,8 @@ intel_tv_init(struct drm_device *dev) ...@@ -1840,6 +1840,8 @@ intel_tv_init(struct drm_device *dev)
drm_connector_attach_property(connector, drm_connector_attach_property(connector,
dev->mode_config.tv_bottom_margin_property, dev->mode_config.tv_bottom_margin_property,
tv_priv->margin[TV_MARGIN_BOTTOM]); tv_priv->margin[TV_MARGIN_BOTTOM]);
dev_priv->hotplug_supported_mask |= TV_HOTPLUG_INT_STATUS;
out: out:
drm_sysfs_connector_add(connector); drm_sysfs_connector_add(connector);
} }
...@@ -188,6 +188,7 @@ typedef struct _drm_i915_sarea { ...@@ -188,6 +188,7 @@ typedef struct _drm_i915_sarea {
#define DRM_I915_GEM_MADVISE 0x26 #define DRM_I915_GEM_MADVISE 0x26
#define DRM_I915_OVERLAY_PUT_IMAGE 0x27 #define DRM_I915_OVERLAY_PUT_IMAGE 0x27
#define DRM_I915_OVERLAY_ATTRS 0x28 #define DRM_I915_OVERLAY_ATTRS 0x28
#define DRM_I915_GEM_EXECBUFFER2 0x29
#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
...@@ -207,6 +208,7 @@ typedef struct _drm_i915_sarea { ...@@ -207,6 +208,7 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t) #define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t)
#define DRM_IOCTL_I915_GEM_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_INIT, struct drm_i915_gem_init) #define DRM_IOCTL_I915_GEM_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_INIT, struct drm_i915_gem_init)
#define DRM_IOCTL_I915_GEM_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER, struct drm_i915_gem_execbuffer) #define DRM_IOCTL_I915_GEM_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER, struct drm_i915_gem_execbuffer)
#define DRM_IOCTL_I915_GEM_EXECBUFFER2 DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER2, struct drm_i915_gem_execbuffer2)
#define DRM_IOCTL_I915_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin) #define DRM_IOCTL_I915_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin)
#define DRM_IOCTL_I915_GEM_UNPIN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin) #define DRM_IOCTL_I915_GEM_UNPIN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin)
#define DRM_IOCTL_I915_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy) #define DRM_IOCTL_I915_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy)
...@@ -272,6 +274,7 @@ typedef struct drm_i915_irq_wait { ...@@ -272,6 +274,7 @@ typedef struct drm_i915_irq_wait {
#define I915_PARAM_NUM_FENCES_AVAIL 6 #define I915_PARAM_NUM_FENCES_AVAIL 6
#define I915_PARAM_HAS_OVERLAY 7 #define I915_PARAM_HAS_OVERLAY 7
#define I915_PARAM_HAS_PAGEFLIPPING 8 #define I915_PARAM_HAS_PAGEFLIPPING 8
#define I915_PARAM_HAS_EXECBUF2 9
typedef struct drm_i915_getparam { typedef struct drm_i915_getparam {
int param; int param;
...@@ -567,6 +570,57 @@ struct drm_i915_gem_execbuffer { ...@@ -567,6 +570,57 @@ struct drm_i915_gem_execbuffer {
__u64 cliprects_ptr; __u64 cliprects_ptr;
}; };
struct drm_i915_gem_exec_object2 {
/**
* User's handle for a buffer to be bound into the GTT for this
* operation.
*/
__u32 handle;
/** Number of relocations to be performed on this buffer */
__u32 relocation_count;
/**
* Pointer to array of struct drm_i915_gem_relocation_entry containing
* the relocations to be performed in this buffer.
*/
__u64 relocs_ptr;
/** Required alignment in graphics aperture */
__u64 alignment;
/**
* Returned value of the updated offset of the object, for future
* presumed_offset writes.
*/
__u64 offset;
#define EXEC_OBJECT_NEEDS_FENCE (1<<0)
__u64 flags;
__u64 rsvd1;
__u64 rsvd2;
};
struct drm_i915_gem_execbuffer2 {
/**
* List of gem_exec_object2 structs
*/
__u64 buffers_ptr;
__u32 buffer_count;
/** Offset in the batchbuffer to start execution from. */
__u32 batch_start_offset;
/** Bytes used in batchbuffer from batch_start_offset */
__u32 batch_len;
__u32 DR1;
__u32 DR4;
__u32 num_cliprects;
/** This is a struct drm_clip_rect *cliprects */
__u64 cliprects_ptr;
__u64 flags; /* currently unused */
__u64 rsvd1;
__u64 rsvd2;
};
struct drm_i915_gem_pin { struct drm_i915_gem_pin {
/** Handle of the buffer to be pinned. */ /** Handle of the buffer to be pinned. */
__u32 handle; __u32 handle;
......
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