Commit 61255ab9 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Kevin Hilman

OMAP3: PM: MPU off-mode support

Adds a 'save_state' option when calling into SRAM idle function
and adds some minor cleanups of SRAM asm code.
Signed-off-by: default avatarRajendra Nayak <rnayak@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent 57f277b0
...@@ -28,6 +28,7 @@ ...@@ -28,6 +28,7 @@
#include <plat/powerdomain.h> #include <plat/powerdomain.h>
#include <plat/control.h> #include <plat/control.h>
#include <plat/serial.h> #include <plat/serial.h>
#include <plat/sdrc.h>
#include <asm/tlbflush.h> #include <asm/tlbflush.h>
...@@ -223,6 +224,9 @@ static void omap_sram_idle(void) ...@@ -223,6 +224,9 @@ static void omap_sram_idle(void)
/* No need to save context */ /* No need to save context */
save_state = 0; save_state = 0;
break; break;
case PWRDM_POWER_OFF:
save_state = 3;
break;
default: default:
/* Invalid state */ /* Invalid state */
printk(KERN_ERR "Invalid mpu state in sram_idle\n"); printk(KERN_ERR "Invalid mpu state in sram_idle\n");
...@@ -248,7 +252,12 @@ static void omap_sram_idle(void) ...@@ -248,7 +252,12 @@ static void omap_sram_idle(void)
prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN); prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
} }
_omap_sram_idle(NULL, save_state); /*
* omap3_arm_context is the location where ARM registers
* get saved. The restore path then reads from this
* location and restores them back.
*/
_omap_sram_idle(omap3_arm_context, save_state);
cpu_init(); cpu_init();
/* Restore table entry modified during MMU restoration */ /* Restore table entry modified during MMU restoration */
......
...@@ -36,12 +36,11 @@ ...@@ -36,12 +36,11 @@
OMAP3430_PM_PREPWSTST) OMAP3430_PM_PREPWSTST)
#define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \ #define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \
OMAP3430_PM_PREPWSTST) OMAP3430_PM_PREPWSTST)
#define PM_PWSTCTRL_MPU_P OMAP34XX_PRM_REGADDR(MPU_MOD, PM_PWSTCTRL) #define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + PM_PWSTCTRL
#define SCRATCHPAD_MEM_OFFS 0x310 /* Move this as correct place is #define SCRATCHPAD_MEM_OFFS 0x310 /* Move this as correct place is
* available */ * available */
#define SCRATCHPAD_BASE_P OMAP343X_CTRL_REGADDR(\ #define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\
OMAP343X_CONTROL_MEM_WKUP +\ + SCRATCHPAD_MEM_OFFS)
SCRATCHPAD_MEM_OFFS)
#define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER) #define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER)
.text .text
...@@ -96,7 +95,7 @@ loop: ...@@ -96,7 +95,7 @@ loop:
ldmfd sp!, {r0-r12, pc} @ restore regs and return ldmfd sp!, {r0-r12, pc} @ restore regs and return
restore: restore:
/* b restore*/ @ Enable to debug restore code /* b restore*/ @ Enable to debug restore code
/* Check what was the reason for mpu reset and store the reason in r9*/ /* Check what was the reason for mpu reset and store the reason in r9*/
/* 1 - Only L1 and logic lost */ /* 1 - Only L1 and logic lost */
/* 2 - Only L2 lost - In this case, we wont be here */ /* 2 - Only L2 lost - In this case, we wont be here */
...@@ -416,8 +415,6 @@ scratchpad_base: ...@@ -416,8 +415,6 @@ scratchpad_base:
.word SCRATCHPAD_BASE_P .word SCRATCHPAD_BASE_P
sdrc_power: sdrc_power:
.word SDRC_POWER_V .word SDRC_POWER_V
context_mem:
.word 0x803E3E14
clk_stabilize_delay: clk_stabilize_delay:
.word 0x000001FF .word 0x000001FF
assoc_mask: assoc_mask:
......
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