mtd-nand: davinci: Correct 4-bit error correction
On TI's DA830/OMAP-L137, DA850/OMAP-L138 and DM365, after setting the 4BITECC_ADD_CALC_START bit in the NAND Flash control register to 1 and before waiting for the NAND Flash status register to be equal to 1, 2 or 3, we have to wait till the ECC HW goes to correction state. Without this wait, ECC correction calculations will not be proper. This has been tested on DA830/OMAP-L137, DA850/OMAP-L138, DM355 and DM365 EVMs. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Acked-by: Sneha Narnakaje <nsnehaprabha@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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