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Commit 563aab55 authored by Paul Walmsley's avatar Paul Walmsley Committed by Tony Lindgren
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OMAP clock: drop RATE_FIXED 

The RATE_FIXED flag currently has no useful purpose.  Fixed rate clocks
should simply not implement the recalc, set_rate, set_parent, and round_rate
function pointers.
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent ed950086
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Showing with 29 additions and 38 deletions
arch/arm/mach-omap1/clock.c
View file @ 563aab55
...@@ -570,9 +570,6 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) ...@@ -570,9 +570,6 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
{ {
int dsor_exp; int dsor_exp;
if (clk->flags & RATE_FIXED)
return clk->rate;
if (clk->flags & RATE_CKCTL) { if (clk->flags & RATE_CKCTL) {
dsor_exp = calc_dsor_exp(clk, rate); dsor_exp = calc_dsor_exp(clk, rate);
if (dsor_exp < 0) if (dsor_exp < 0)
......
arch/arm/mach-omap1/clock.h
View file @ 563aab55
...@@ -554,8 +554,8 @@ static struct uart_clk uart1_16xx = { ...@@ -554,8 +554,8 @@ static struct uart_clk uart1_16xx = {
/* Direct from ULPD, no real parent */ /* Direct from ULPD, no real parent */
.parent = &armper_ck.clk, .parent = &armper_ck.clk,
.rate = 48000000, .rate = 48000000,
.flags = CLOCK_IN_OMAP16XX | RATE_FIXED | .flags = CLOCK_IN_OMAP16XX | ENABLE_REG_32BIT |
ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, CLOCK_NO_IDLE_PARENT,
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 29, .enable_bit = 29,
.enable = &omap1_clk_enable_uart_functional, .enable = &omap1_clk_enable_uart_functional,
...@@ -602,8 +602,8 @@ static struct uart_clk uart3_16xx = { ...@@ -602,8 +602,8 @@ static struct uart_clk uart3_16xx = {
/* Direct from ULPD, no real parent */ /* Direct from ULPD, no real parent */
.parent = &armper_ck.clk, .parent = &armper_ck.clk,
.rate = 48000000, .rate = 48000000,
.flags = CLOCK_IN_OMAP16XX | RATE_FIXED | .flags = CLOCK_IN_OMAP16XX | ENABLE_REG_32BIT |
ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, CLOCK_NO_IDLE_PARENT,
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 31, .enable_bit = 31,
.enable = &omap1_clk_enable_uart_functional, .enable = &omap1_clk_enable_uart_functional,
...@@ -617,7 +617,7 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ ...@@ -617,7 +617,7 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
/* Direct from ULPD, no parent */ /* Direct from ULPD, no parent */
.rate = 6000000, .rate = 6000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT, CLOCK_IN_OMAP310 | ENABLE_REG_32BIT,
.enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL), .enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL),
.enable_bit = USB_MCLK_EN_BIT, .enable_bit = USB_MCLK_EN_BIT,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
...@@ -629,7 +629,7 @@ static struct clk usb_hhc_ck1510 = { ...@@ -629,7 +629,7 @@ static struct clk usb_hhc_ck1510 = {
/* Direct from ULPD, no parent */ /* Direct from ULPD, no parent */
.rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
RATE_FIXED | ENABLE_REG_32BIT, ENABLE_REG_32BIT,
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = USB_HOST_HHC_UHOST_EN, .enable_bit = USB_HOST_HHC_UHOST_EN,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
...@@ -641,8 +641,7 @@ static struct clk usb_hhc_ck16xx = { ...@@ -641,8 +641,7 @@ static struct clk usb_hhc_ck16xx = {
/* Direct from ULPD, no parent */ /* Direct from ULPD, no parent */
.rate = 48000000, .rate = 48000000,
/* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */ /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
.flags = CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP16XX | ENABLE_REG_32BIT,
RATE_FIXED | ENABLE_REG_32BIT,
.enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */ .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */
.enable_bit = 8 /* UHOST_EN */, .enable_bit = 8 /* UHOST_EN */,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
...@@ -653,7 +652,7 @@ static struct clk usb_dc_ck = { ...@@ -653,7 +652,7 @@ static struct clk usb_dc_ck = {
.name = "usb_dc_ck", .name = "usb_dc_ck",
/* Direct from ULPD, no parent */ /* Direct from ULPD, no parent */
.rate = 48000000, .rate = 48000000,
.flags = CLOCK_IN_OMAP16XX | RATE_FIXED, .flags = CLOCK_IN_OMAP16XX,
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
.enable_bit = 4, .enable_bit = 4,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
...@@ -664,9 +663,9 @@ static struct clk mclk_1510 = { ...@@ -664,9 +663,9 @@ static struct clk mclk_1510 = {
.name = "mclk", .name = "mclk",
/* Direct from ULPD, no parent. May be enabled by ext hardware. */ /* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000, .rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED, .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
.enable_bit = 6, .enable_bit = 6,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic, .disable = &omap1_clk_disable_generic,
}; };
...@@ -688,7 +687,7 @@ static struct clk bclk_1510 = { ...@@ -688,7 +687,7 @@ static struct clk bclk_1510 = {
.name = "bclk", .name = "bclk",
/* Direct from ULPD, no parent. May be enabled by ext hardware. */ /* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000, .rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED, .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic, .disable = &omap1_clk_disable_generic,
}; };
...@@ -712,7 +711,7 @@ static struct clk mmc1_ck = { ...@@ -712,7 +711,7 @@ static struct clk mmc1_ck = {
.parent = &armper_ck.clk, .parent = &armper_ck.clk,
.rate = 48000000, .rate = 48000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT | CLOCK_IN_OMAP310 | ENABLE_REG_32BIT |
CLOCK_NO_IDLE_PARENT, CLOCK_NO_IDLE_PARENT,
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 23, .enable_bit = 23,
...@@ -726,8 +725,8 @@ static struct clk mmc2_ck = { ...@@ -726,8 +725,8 @@ static struct clk mmc2_ck = {
/* Functional clock is direct from ULPD, interface clock is ARMPER */ /* Functional clock is direct from ULPD, interface clock is ARMPER */
.parent = &armper_ck.clk, .parent = &armper_ck.clk,
.rate = 48000000, .rate = 48000000,
.flags = CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP16XX | ENABLE_REG_32BIT |
RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, CLOCK_NO_IDLE_PARENT,
.enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 20, .enable_bit = 20,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
......
arch/arm/mach-omap2/clock.c
View file @ 563aab55
...@@ -644,10 +644,6 @@ long omap2_clk_round_rate(struct clk *clk, unsigned long rate) ...@@ -644,10 +644,6 @@ long omap2_clk_round_rate(struct clk *clk, unsigned long rate)
if (clk->round_rate != NULL) if (clk->round_rate != NULL)
return clk->round_rate(clk, rate); return clk->round_rate(clk, rate);
if (clk->flags & RATE_FIXED)
printk(KERN_ERR "clock: generic omap2_clk_round_rate called "
"on fixed-rate clock %s\n", clk->name);
return clk->rate; return clk->rate;
} }
......
arch/arm/mach-omap2/clock24xx.h
View file @ 563aab55
...@@ -628,7 +628,7 @@ static struct clk func_32k_ck = { ...@@ -628,7 +628,7 @@ static struct clk func_32k_ck = {
.name = "func_32k_ck", .name = "func_32k_ck",
.rate = 32000, .rate = 32000,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_FIXED | ALWAYS_ENABLED, ALWAYS_ENABLED,
.clkdm = { .name = "prm_clkdm" }, .clkdm = { .name = "prm_clkdm" },
}; };
...@@ -656,7 +656,7 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */ ...@@ -656,7 +656,7 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */
.name = "alt_ck", .name = "alt_ck",
.rate = 54000000, .rate = 54000000,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_FIXED | ALWAYS_ENABLED, ALWAYS_ENABLED,
.clkdm = { .name = "prm_clkdm" }, .clkdm = { .name = "prm_clkdm" },
}; };
...@@ -703,7 +703,7 @@ static struct clk apll96_ck = { ...@@ -703,7 +703,7 @@ static struct clk apll96_ck = {
.prcm_mod = PLL_MOD, .prcm_mod = PLL_MOD,
.rate = 96000000, .rate = 96000000,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_FIXED | ENABLE_ON_INIT, ENABLE_ON_INIT,
.clkdm = { .name = "prm_clkdm" }, .clkdm = { .name = "prm_clkdm" },
.enable_reg = CM_CLKEN, .enable_reg = CM_CLKEN,
.enable_bit = OMAP24XX_EN_96M_PLL_SHIFT, .enable_bit = OMAP24XX_EN_96M_PLL_SHIFT,
...@@ -717,7 +717,7 @@ static struct clk apll54_ck = { ...@@ -717,7 +717,7 @@ static struct clk apll54_ck = {
.prcm_mod = PLL_MOD, .prcm_mod = PLL_MOD,
.rate = 54000000, .rate = 54000000,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_FIXED | ENABLE_ON_INIT, ENABLE_ON_INIT,
.clkdm = { .name = "prm_clkdm" }, .clkdm = { .name = "prm_clkdm" },
.enable_reg = CM_CLKEN, .enable_reg = CM_CLKEN,
.enable_bit = OMAP24XX_EN_54M_PLL_SHIFT, .enable_bit = OMAP24XX_EN_54M_PLL_SHIFT,
......
arch/arm/mach-omap2/clock34xx.h
View file @ 563aab55
...@@ -66,14 +66,14 @@ static struct clk dpll2_fck; ...@@ -66,14 +66,14 @@ static struct clk dpll2_fck;
static struct clk omap_32k_fck = { static struct clk omap_32k_fck = {
.name = "omap_32k_fck", .name = "omap_32k_fck",
.rate = 32768, .rate = 32768,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED, .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
.clkdm = { .name = "prm_clkdm" }, .clkdm = { .name = "prm_clkdm" },
}; };
static struct clk secure_32k_fck = { static struct clk secure_32k_fck = {
.name = "secure_32k_fck", .name = "secure_32k_fck",
.rate = 32768, .rate = 32768,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED, .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
.clkdm = { .name = "prm_clkdm" }, .clkdm = { .name = "prm_clkdm" },
}; };
...@@ -81,42 +81,42 @@ static struct clk secure_32k_fck = { ...@@ -81,42 +81,42 @@ static struct clk secure_32k_fck = {
static struct clk virt_12m_ck = { static struct clk virt_12m_ck = {
.name = "virt_12m_ck", .name = "virt_12m_ck",
.rate = 12000000, .rate = 12000000,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED, .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
.clkdm = { .name = "prm_clkdm" }, .clkdm = { .name = "prm_clkdm" },
}; };
static struct clk virt_13m_ck = { static struct clk virt_13m_ck = {
.name = "virt_13m_ck", .name = "virt_13m_ck",
.rate = 13000000, .rate = 13000000,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED, .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
.clkdm = { .name = "prm_clkdm" }, .clkdm = { .name = "prm_clkdm" },
}; };
static struct clk virt_16_8m_ck = { static struct clk virt_16_8m_ck = {
.name = "virt_16_8m_ck", .name = "virt_16_8m_ck",
.rate = 16800000, .rate = 16800000,
.flags = CLOCK_IN_OMAP3430ES2 | RATE_FIXED | ALWAYS_ENABLED, .flags = CLOCK_IN_OMAP3430ES2 | ALWAYS_ENABLED,
.clkdm = { .name = "prm_clkdm" }, .clkdm = { .name = "prm_clkdm" },
}; };
static struct clk virt_19_2m_ck = { static struct clk virt_19_2m_ck = {
.name = "virt_19_2m_ck", .name = "virt_19_2m_ck",
.rate = 19200000, .rate = 19200000,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED, .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
.clkdm = { .name = "prm_clkdm" }, .clkdm = { .name = "prm_clkdm" },
}; };
static struct clk virt_26m_ck = { static struct clk virt_26m_ck = {
.name = "virt_26m_ck", .name = "virt_26m_ck",
.rate = 26000000, .rate = 26000000,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED, .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
.clkdm = { .name = "prm_clkdm" }, .clkdm = { .name = "prm_clkdm" },
}; };
static struct clk virt_38_4m_ck = { static struct clk virt_38_4m_ck = {
.name = "virt_38_4m_ck", .name = "virt_38_4m_ck",
.rate = 38400000, .rate = 38400000,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED, .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
.clkdm = { .name = "prm_clkdm" }, .clkdm = { .name = "prm_clkdm" },
}; };
...@@ -170,8 +170,7 @@ static struct clk osc_sys_ck = { ...@@ -170,8 +170,7 @@ static struct clk osc_sys_ck = {
.clksel_mask = OMAP3430_SYS_CLKIN_SEL_MASK, .clksel_mask = OMAP3430_SYS_CLKIN_SEL_MASK,
.clksel = osc_sys_clksel, .clksel = osc_sys_clksel,
/* REVISIT: deal with autoextclkmode? */ /* REVISIT: deal with autoextclkmode? */
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
ALWAYS_ENABLED,
.clkdm = { .name = "prm_clkdm" }, .clkdm = { .name = "prm_clkdm" },
.recalc = &omap2_clksel_recalc, .recalc = &omap2_clksel_recalc,
}; };
......
arch/arm/plat-omap/include/mach/clock.h
View file @ 563aab55
...@@ -153,7 +153,7 @@ void omap_clk_del_child(struct clk *clk, struct clk *clk2); ...@@ -153,7 +153,7 @@ void omap_clk_del_child(struct clk *clk, struct clk *clk2);
/* Clock flags */ /* Clock flags */
#define RATE_CKCTL (1 << 0) /* Main fixed ratio clocks */ #define RATE_CKCTL (1 << 0) /* Main fixed ratio clocks */
#define RATE_FIXED (1 << 1) /* Fixed clock rate */
#define VIRTUAL_CLOCK (1 << 3) /* Composite clock from table */ #define VIRTUAL_CLOCK (1 << 3) /* Composite clock from table */
#define ALWAYS_ENABLED (1 << 4) /* Clock cannot be disabled */ #define ALWAYS_ENABLED (1 << 4) /* Clock cannot be disabled */
......
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