Commit 54189831 authored by Russell King's avatar Russell King

Merge branch 'for-rmk' of git://git.marvell.com/orion

parents 158bc5af 3293576c
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This diff is collapsed.
......@@ -105,7 +105,7 @@ void __init kirkwood_setup_cpu_mbus(void)
setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE,
TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE);
setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE,
TARGET_PCIE, ATTR_PCIE_MEM, -1);
TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE);
/*
* Setup window for NAND controller.
......
......@@ -845,7 +845,7 @@ int __init kirkwood_find_tclk(void)
return 166666667;
}
static void kirkwood_timer_init(void)
static void __init kirkwood_timer_init(void)
{
kirkwood_tclk = kirkwood_find_tclk();
orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
......
......@@ -15,7 +15,7 @@
static inline void __iomem *__io(unsigned long addr)
{
return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_PHYS_BASE)
return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_BUS_BASE)
+ KIRKWOOD_PCIE_IO_VIRT_BASE);
}
......
......@@ -43,6 +43,7 @@
#define KIRKWOOD_REGS_SIZE SZ_1M
#define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000
#define KIRKWOOD_PCIE_MEM_BUS_BASE 0xe0000000
#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M
/*
......
......@@ -70,8 +70,20 @@ static void __init openrd_base_init(void)
kirkwood_ge00_init(&openrd_base_ge00_data);
kirkwood_sata_init(&openrd_base_sata_data);
kirkwood_sdio_init(&openrd_base_mvsdio_data);
kirkwood_i2c_init();
}
static int __init openrd_base_pci_init(void)
{
if (machine_is_openrd_base())
kirkwood_pcie_init();
return 0;
}
subsys_initcall(openrd_base_pci_init);
MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
/* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
.phys_io = KIRKWOOD_REGS_PHYS_BASE,
......
......@@ -93,7 +93,7 @@ static struct pci_ops pcie_ops = {
};
static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
{
struct resource *res;
extern unsigned int kirkwood_clk_ctrl;
......@@ -115,7 +115,7 @@ static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
*/
res[0].name = "PCIe I/O Space";
res[0].flags = IORESOURCE_IO;
res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE;
res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE;
res[0].end = res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;
if (request_resource(&ioport_resource, &res[0]))
panic("Request PCIe IO resource failed\n");
......@@ -126,7 +126,7 @@ static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
*/
res[1].name = "PCIe Memory Space";
res[1].flags = IORESOURCE_MEM;
res[1].start = KIRKWOOD_PCIE_MEM_PHYS_BASE;
res[1].start = KIRKWOOD_PCIE_MEM_BUS_BASE;
res[1].end = res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1;
if (request_resource(&iomem_resource, &res[1]))
panic("Request PCIe Memory resource failed\n");
......
......@@ -845,6 +845,8 @@ static char * __init mv78xx0_id(void)
} else if (dev == MV78100_DEV_ID) {
if (rev == MV78100_REV_A0)
return "MV78100-A0";
else if (rev == MV78100_REV_A1)
return "MV78100-A1";
else
return "MV78100-Rev-Unsupported";
} else if (dev == MV78200_DEV_ID) {
......
......@@ -112,6 +112,7 @@
#define MV78100_DEV_ID 0x7810
#define MV78100_REV_A0 1
#define MV78100_REV_A1 2
#define MV78200_DEV_ID 0x7820
#define MV78200_REV_A0 1
......
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