Commit 52fefcec authored by Linus Torvalds's avatar Linus Torvalds

Merge git://git.kernel.org/pub/scm/linux/kernel/git/czankel/xtensa-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/czankel/xtensa-2.6:
  xtensa: Update platform files to reflect new location of the header files.
  xtensa: switch to packed struct unaligned access implementation
  xtensa: Add xt2000 support files.
  xtensa: move headers files to arch/xtensa/include
  xtensa: use the new byteorder headers
parents a0e280e0 5fee325e
...@@ -33,6 +33,15 @@ KBUILD_CFLAGS += -ffreestanding ...@@ -33,6 +33,15 @@ KBUILD_CFLAGS += -ffreestanding
KBUILD_CFLAGS += -pipe -mlongcalls KBUILD_CFLAGS += -pipe -mlongcalls
vardirs := $(patsubst %,arch/xtensa/variants/%/,$(variant-y))
plfdirs := $(patsubst %,arch/xtensa/platforms/%/,$(platform-y))
ifeq ($(KBUILD_SRC),)
KBUILD_CPPFLAGS += $(patsubst %,-I%include,$(vardirs) $(plfdirs))
else
KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(vardirs) $(plfdirs))
endif
KBUILD_DEFCONFIG := iss_defconfig KBUILD_DEFCONFIG := iss_defconfig
# ramdisk/initrd support # ramdisk/initrd support
...@@ -66,21 +75,6 @@ libs-y += arch/xtensa/lib/ $(LIBGCC) ...@@ -66,21 +75,6 @@ libs-y += arch/xtensa/lib/ $(LIBGCC)
boot := arch/xtensa/boot boot := arch/xtensa/boot
archinc := include/asm-xtensa
archprepare: $(archinc)/.platform
# Update processor variant and platform symlinks if something which affects
# them changed.
$(archinc)/.platform: $(wildcard include/config/arch/*.h) include/config/auto.conf
@echo ' SYMLINK $(archinc)/variant -> $(archinc)/variant-$(VARIANT)'
$(Q)mkdir -p $(archinc)
$(Q)ln -fsn $(srctree)/$(archinc)/variant-$(VARIANT) $(archinc)/variant
@echo ' SYMLINK $(archinc)/platform -> $(archinc)/platform-$(PLATFORM)'
$(Q)ln -fsn $(srctree)/$(archinc)/platform-$(PLATFORM) $(archinc)/platform
@touch $@
all: zImage all: zImage
...@@ -89,10 +83,6 @@ bzImage : zImage ...@@ -89,10 +83,6 @@ bzImage : zImage
zImage zImage.initrd: vmlinux zImage zImage.initrd: vmlinux
$(Q)$(MAKE) $(build)=$(boot) $@ $(Q)$(MAKE) $(build)=$(boot) $@
CLEAN_FILES += arch/xtensa/vmlinux.lds \
$(archinc)/platform $(archinc)/variant \
$(archinc)/.platform
define archhelp define archhelp
@echo '* zImage - Compressed kernel image (arch/xtensa/boot/images/zImage.*)' @echo '* zImage - Compressed kernel image (arch/xtensa/boot/images/zImage.*)'
endef endef
......
#include <asm/variant/core.h> #include <variant/core.h>
OUTPUT_ARCH(xtensa) OUTPUT_ARCH(xtensa)
ENTRY(_ResetVector) ENTRY(_ResetVector)
......
#include <asm/variant/core.h> #include <variant/core.h>
#include <asm/regs.h> #include <asm/regs.h>
#include <asm/asmmacro.h> #include <asm/asmmacro.h>
#include <asm/cacheasm.h> #include <asm/cacheasm.h>
......
...@@ -11,7 +11,7 @@ ...@@ -11,7 +11,7 @@
#ifndef _XTENSA_ASMMACRO_H #ifndef _XTENSA_ASMMACRO_H
#define _XTENSA_ASMMACRO_H #define _XTENSA_ASMMACRO_H
#include <asm/variant/core.h> #include <variant/core.h>
/* /*
* Some little helpers for loops. Use zero-overhead-loops * Some little helpers for loops. Use zero-overhead-loops
......
...@@ -14,7 +14,17 @@ ...@@ -14,7 +14,17 @@
#include <asm/types.h> #include <asm/types.h>
#include <linux/compiler.h> #include <linux/compiler.h>
static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) #ifdef __XTENSA_EL__
# define __LITTLE_ENDIAN
#elif defined(__XTENSA_EB__)
# define __BIG_ENDIAN
#else
# error processor byte order undefined!
#endif
#define __SWAB_64_THRU_32__
static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
{ {
__u32 res; __u32 res;
/* instruction sequence from Xtensa ISA release 2/2000 */ /* instruction sequence from Xtensa ISA release 2/2000 */
...@@ -28,8 +38,9 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) ...@@ -28,8 +38,9 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
); );
return res; return res;
} }
#define __arch_swab32 __arch_swab32
static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
{ {
/* Given that 'short' values are signed (i.e., can be negative), /* Given that 'short' values are signed (i.e., can be negative),
* we cannot assume that the upper 16-bits of the register are * we cannot assume that the upper 16-bits of the register are
...@@ -62,21 +73,8 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) ...@@ -62,21 +73,8 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
return res; return res;
} }
#define __arch_swab16 __arch_swab16
#define __arch__swab32(x) ___arch__swab32(x) #include <linux/byteorder.h>
#define __arch__swab16(x) ___arch__swab16(x)
#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
# define __BYTEORDER_HAS_U64__
# define __SWAB_64_THRU_32__
#endif
#ifdef __XTENSA_EL__
# include <linux/byteorder/little_endian.h>
#elif defined(__XTENSA_EB__)
# include <linux/byteorder/big_endian.h>
#else
# error processor byte order undefined!
#endif
#endif /* _XTENSA_BYTEORDER_H */ #endif /* _XTENSA_BYTEORDER_H */
...@@ -11,7 +11,7 @@ ...@@ -11,7 +11,7 @@
#ifndef _XTENSA_CACHE_H #ifndef _XTENSA_CACHE_H
#define _XTENSA_CACHE_H #define _XTENSA_CACHE_H
#include <asm/variant/core.h> #include <variant/core.h>
#define L1_CACHE_SHIFT XCHAL_DCACHE_LINEWIDTH #define L1_CACHE_SHIFT XCHAL_DCACHE_LINEWIDTH
#define L1_CACHE_BYTES XCHAL_DCACHE_LINESIZE #define L1_CACHE_BYTES XCHAL_DCACHE_LINESIZE
......
...@@ -12,7 +12,7 @@ ...@@ -12,7 +12,7 @@
#define _XTENSA_CHECKSUM_H #define _XTENSA_CHECKSUM_H
#include <linux/in6.h> #include <linux/in6.h>
#include <asm/variant/core.h> #include <variant/core.h>
/* /*
* computes the checksum of a memory block at buff, length len, * computes the checksum of a memory block at buff, length len,
......
...@@ -13,11 +13,11 @@ ...@@ -13,11 +13,11 @@
#define _XTENSA_COPROCESSOR_H #define _XTENSA_COPROCESSOR_H
#include <linux/stringify.h> #include <linux/stringify.h>
#include <asm/variant/tie.h> #include <variant/tie.h>
#include <asm/types.h> #include <asm/types.h>
#ifdef __ASSEMBLY__ #ifdef __ASSEMBLY__
# include <asm/variant/tie-asm.h> # include <variant/tie-asm.h>
.macro xchal_sa_start a b .macro xchal_sa_start a b
.set .Lxchal_pofs_, 0 .set .Lxchal_pofs_, 0
......
...@@ -11,8 +11,8 @@ ...@@ -11,8 +11,8 @@
#ifndef _XTENSA_IRQ_H #ifndef _XTENSA_IRQ_H
#define _XTENSA_IRQ_H #define _XTENSA_IRQ_H
#include <asm/platform/hardware.h> #include <platform/hardware.h>
#include <asm/variant/core.h> #include <variant/core.h>
#ifndef PLATFORM_NR_IRQS #ifndef PLATFORM_NR_IRQS
# define PLATFORM_NR_IRQS 0 # define PLATFORM_NR_IRQS 0
......
/* /*
* include/asm-xtensa/platform.h
*
* Platform specific functions * Platform specific functions
* *
* This file is subject to the terms and conditions of the GNU General * This file is subject to the terms and conditions of the GNU General
......
...@@ -11,7 +11,7 @@ ...@@ -11,7 +11,7 @@
#ifndef _XTENSA_PROCESSOR_H #ifndef _XTENSA_PROCESSOR_H
#define _XTENSA_PROCESSOR_H #define _XTENSA_PROCESSOR_H
#include <asm/variant/core.h> #include <variant/core.h>
#include <asm/coprocessor.h> #include <asm/coprocessor.h>
#include <linux/compiler.h> #include <linux/compiler.h>
......
...@@ -111,7 +111,7 @@ struct pt_regs { ...@@ -111,7 +111,7 @@ struct pt_regs {
unsigned long areg[16]; /* 128 (64) */ unsigned long areg[16]; /* 128 (64) */
}; };
#include <asm/variant/core.h> #include <variant/core.h>
# define task_pt_regs(tsk) ((struct pt_regs*) \ # define task_pt_regs(tsk) ((struct pt_regs*) \
(task_stack_page(tsk) + KERNEL_STACK_SIZE - (XCHAL_NUM_AREGS-16)*4) - 1) (task_stack_page(tsk) + KERNEL_STACK_SIZE - (XCHAL_NUM_AREGS-16)*4) - 1)
......
...@@ -13,6 +13,6 @@ ...@@ -13,6 +13,6 @@
#ifndef _XTENSA_SERIAL_H #ifndef _XTENSA_SERIAL_H
#define _XTENSA_SERIAL_H #define _XTENSA_SERIAL_H
#include <asm/platform/serial.h> #include <platform/serial.h>
#endif /* _XTENSA_SERIAL_H */ #endif /* _XTENSA_SERIAL_H */
...@@ -10,20 +10,20 @@ ...@@ -10,20 +10,20 @@
#ifndef _ASM_XTENSA_UNALIGNED_H #ifndef _ASM_XTENSA_UNALIGNED_H
#define _ASM_XTENSA_UNALIGNED_H #define _ASM_XTENSA_UNALIGNED_H
#ifdef __XTENSA_EL__ #include <asm/byteorder.h>
# include <linux/unaligned/le_memmove.h>
#ifdef __LITTLE_ENDIAN
# include <linux/unaligned/le_struct.h>
# include <linux/unaligned/be_byteshift.h> # include <linux/unaligned/be_byteshift.h>
# include <linux/unaligned/generic.h> # include <linux/unaligned/generic.h>
# define get_unaligned __get_unaligned_le # define get_unaligned __get_unaligned_le
# define put_unaligned __put_unaligned_le # define put_unaligned __put_unaligned_le
#elif defined(__XTENSA_EB__) #else
# include <linux/unaligned/be_memmove.h> # include <linux/unaligned/be_struct.h>
# include <linux/unaligned/le_byteshift.h> # include <linux/unaligned/le_byteshift.h>
# include <linux/unaligned/generic.h> # include <linux/unaligned/generic.h>
# define get_unaligned __get_unaligned_be # define get_unaligned __get_unaligned_be
# define put_unaligned __put_unaligned_be # define put_unaligned __put_unaligned_be
#else
# error processor byte order undefined!
#endif #endif
#endif /* _ASM_XTENSA_UNALIGNED_H */ #endif /* _ASM_XTENSA_UNALIGNED_H */
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