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linux
linux-davinci
Commits
5006d1aa
Commit
5006d1aa
authored
Oct 14, 2008
by
Benjamin Herrenschmidt
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Merge commit 'gcl/gcl-next'
parents
22d660ff
4c3ed7d6
Changes
5
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Showing
5 changed files
with
16 additions
and
11 deletions
+16
-11
arch/powerpc/platforms/52xx/mpc52xx_common.c
arch/powerpc/platforms/52xx/mpc52xx_common.c
+3
-2
arch/powerpc/platforms/52xx/mpc52xx_pci.c
arch/powerpc/platforms/52xx/mpc52xx_pci.c
+9
-4
drivers/i2c/busses/i2c-mpc.c
drivers/i2c/busses/i2c-mpc.c
+0
-1
drivers/of/base.c
drivers/of/base.c
+1
-1
drivers/spi/mpc52xx_psc_spi.c
drivers/spi/mpc52xx_psc_spi.c
+3
-3
No files found.
arch/powerpc/platforms/52xx/mpc52xx_common.c
View file @
5006d1aa
...
...
@@ -90,7 +90,7 @@ mpc5200_setup_xlb_arbiter(void)
of_node_put
(
np
);
if
(
!
xlb
)
{
printk
(
KERN_ERR
__FILE__
": "
"Error mapping XLB in mpc52xx_setup_cpu().
"
"Error mapping XLB in mpc52xx_setup_cpu(). "
"Expect some abnormal behavior
\n
"
);
return
;
}
...
...
@@ -216,7 +216,8 @@ mpc52xx_restart(char *cmd)
out_be32
(
&
mpc52xx_wdt
->
count
,
0x000000ff
);
out_be32
(
&
mpc52xx_wdt
->
mode
,
0x00009004
);
}
else
printk
(
"mpc52xx_restart: Can't access wdt. "
printk
(
KERN_ERR
__FILE__
": "
"mpc52xx_restart: Can't access wdt. "
"Restart impossible, system halted.
\n
"
);
while
(
1
);
...
...
arch/powerpc/platforms/52xx/mpc52xx_pci.c
View file @
5006d1aa
...
...
@@ -265,8 +265,11 @@ mpc52xx_pci_setup(struct pci_controller *hose,
/* Memory windows */
res
=
&
hose
->
mem_resources
[
0
];
if
(
res
->
flags
)
{
pr_debug
(
"mem_resource[0] = {.start=%x, .end=%x, .flags=%lx}
\n
"
,
res
->
start
,
res
->
end
,
res
->
flags
);
pr_debug
(
"mem_resource[0] = "
"{.start=%llx, .end=%llx, .flags=%llx}
\n
"
,
(
unsigned
long
long
)
res
->
start
,
(
unsigned
long
long
)
res
->
end
,
(
unsigned
long
long
)
res
->
flags
);
out_be32
(
&
pci_regs
->
iw0btar
,
MPC52xx_PCI_IWBTAR_TRANSLATION
(
res
->
start
,
res
->
start
,
res
->
end
-
res
->
start
+
1
));
...
...
@@ -297,9 +300,11 @@ mpc52xx_pci_setup(struct pci_controller *hose,
printk
(
KERN_ERR
"%s: Didn't find IO resources
\n
"
,
__FILE__
);
return
;
}
pr_debug
(
".io_resource={.start=%
x,.end=%x,.flags=%
lx} "
pr_debug
(
".io_resource={.start=%
llx,.end=%llx,.flags=%l
lx} "
".io_base_phys=0x%p
\n
"
,
res
->
start
,
res
->
end
,
res
->
flags
,
(
void
*
)
hose
->
io_base_phys
);
(
unsigned
long
long
)
res
->
start
,
(
unsigned
long
long
)
res
->
end
,
(
unsigned
long
long
)
res
->
flags
,
(
void
*
)
hose
->
io_base_phys
);
out_be32
(
&
pci_regs
->
iw2btar
,
MPC52xx_PCI_IWBTAR_TRANSLATION
(
hose
->
io_base_phys
,
res
->
start
,
...
...
drivers/i2c/busses/i2c-mpc.c
View file @
5006d1aa
...
...
@@ -312,7 +312,6 @@ static struct i2c_adapter mpc_ops = {
.
name
=
"MPC adapter"
,
.
id
=
I2C_HW_MPC107
,
.
algo
=
&
mpc_algo
,
.
class
=
I2C_CLASS_HWMON
|
I2C_CLASS_SPD
,
.
timeout
=
1
,
};
...
...
drivers/of/base.c
View file @
5006d1aa
...
...
@@ -410,7 +410,7 @@ struct of_modalias_table {
char
*
modalias
;
};
static
struct
of_modalias_table
of_modalias_table
[]
=
{
/* Empty for now; add entries as needed */
{
"fsl,mcu-mpc8349emitx"
,
"mcu-mpc8349emitx"
},
};
/**
...
...
drivers/spi/mpc52xx_psc_spi.c
View file @
5006d1aa
...
...
@@ -108,13 +108,13 @@ static void mpc52xx_psc_spi_activate_cs(struct spi_device *spi)
* Because psc->ccr is defined as 16bit register instead of 32bit
* just set the lower byte of BitClkDiv
*/
ccr
=
in_be16
(
&
psc
->
ccr
);
ccr
=
in_be16
(
(
u16
__iomem
*
)
&
psc
->
ccr
);
ccr
&=
0xFF00
;
if
(
cs
->
speed_hz
)
ccr
|=
(
MCLK
/
cs
->
speed_hz
-
1
)
&
0xFF
;
else
/* by default SPI Clk 1MHz */
ccr
|=
(
MCLK
/
1000000
-
1
)
&
0xFF
;
out_be16
(
&
psc
->
ccr
,
ccr
);
out_be16
(
(
u16
__iomem
*
)
&
psc
->
ccr
,
ccr
);
mps
->
bits_per_word
=
cs
->
bits_per_word
;
if
(
mps
->
activate_cs
)
...
...
@@ -347,7 +347,7 @@ static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps)
/* Configure 8bit codec mode as a SPI master and use EOF flags */
/* SICR_SIM_CODEC8|SICR_GENCLK|SICR_SPI|SICR_MSTR|SICR_USEEOF */
out_be32
(
&
psc
->
sicr
,
0x0180C800
);
out_be16
(
&
psc
->
ccr
,
0x070F
);
/* by
default SPI Clk 1MHz */
out_be16
(
(
u16
__iomem
*
)
&
psc
->
ccr
,
0x070F
);
/*
default SPI Clk 1MHz */
/* Set 2ms DTL delay */
out_8
(
&
psc
->
ctur
,
0x00
);
...
...
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